From 9535c7aa0f64591428e8c436b9dc4dffebb27665 Mon Sep 17 00:00:00 2001 From: Ben Widawsky Date: Fri, 31 Jul 2020 12:24:17 -0700 Subject: [PATCH] cxl: Collect all DVSEC Device fields Signed-off-by: Ben Widawsky Co-authored-by: Jaxon Haws Signed-off-by: Jaxon Haws --- lib/header.h | 1 + ls-ecaps.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/lib/header.h b/lib/header.h index 525b910..71f7fb0 100644 --- a/lib/header.h +++ b/lib/header.h @@ -1069,6 +1069,7 @@ #define PCI_DVSEC_ID_CXL 0 /* Designated Vendor-Specific ID for Intel CXL */ /* PCIe CXL Designated Vendor-Specific Capabilities, Control, Status */ +#define PCI_CXL_DEV_LEN 0x38 /* CXL Device DVSEC Length */ #define PCI_CXL_CAP 0x0a /* CXL Capability Register */ #define PCI_CXL_CAP_CACHE 0x0001 /* CXL.cache Protocol Support */ #define PCI_CXL_CAP_IO 0x0002 /* CXL.io Protocol Support */ diff --git a/ls-ecaps.c b/ls-ecaps.c index 196a7be..b080a19 100644 --- a/ls-ecaps.c +++ b/ls-ecaps.c @@ -701,7 +701,7 @@ cap_dvsec_cxl(struct device *d, int id, int where) if (id != 0) return; - if (!config_fetch(d, where + PCI_CXL_CAP, 12)) + if (!config_fetch(d, where + PCI_CXL_CAP, PCI_CXL_DEV_LEN - PCI_CXL_CAP)) return; w = get_conf_word(d, where + PCI_CXL_CAP); -- 2.39.2