From 579b19ffe582dca15d89da7f6198edb15eb1e357 Mon Sep 17 00:00:00 2001 From: Martin Mares Date: Thu, 26 Dec 2002 20:24:50 +0000 Subject: [PATCH] Add basic support for AGP3 fields. --- ChangeLog | 7 +++++++ lib/header.h | 32 +++++++++++++++++++++----------- lspci.c | 37 ++++++++++++++++++++++++++----------- 3 files changed, 54 insertions(+), 22 deletions(-) diff --git a/ChangeLog b/ChangeLog index cd9e37e..08e3e0f 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,5 +1,12 @@ 2002-12-26 Martin Mares + * lib/header.h, lspci.c: Dump AGP3 flags and speeds. + + * lib/pci.h, Makefile: Removed HAVE_OWN_HEADER_H. Always use our own header, + there is no reason to prefer the kernel version. + + * lib/proc.c (proc_scan): Don't forget to initialize hdrtype. + * Added preliminary version of NetBSD support by Quentin Garnier . diff --git a/lib/header.h b/lib/header.h index b2668f0..1b75d8e 100644 --- a/lib/header.h +++ b/lib/header.h @@ -1,5 +1,5 @@ /* - * $Id: header.h,v 1.8 2002/03/30 15:39:25 mj Exp $ + * $Id: header.h,v 1.9 2002/12/26 20:24:50 mj Exp $ * * The PCI Library -- PCI Header Structure (extracted from ) * @@ -221,21 +221,31 @@ #define PCI_AGP_RFU 3 /* Rest of capability flags */ #define PCI_AGP_STATUS 4 /* Status register */ #define PCI_AGP_STATUS_RQ_MASK 0xff000000 /* Maximum number of requests - 1 */ +#define PCI_AGP_STATUS_ISOCH 0x10000 /* Isochronous transactions supported */ +#define PCI_AGP_STATUS_ARQSZ_MASK 0xe000 /* log2(optimum async req size in bytes) - 4 */ +#define PCI_AGP_STATUS_CAL_MASK 0x1c00 /* Calibration cycle timing */ #define PCI_AGP_STATUS_SBA 0x0200 /* Sideband addressing supported */ -#define PCI_AGP_STATUS_64BIT 0x0020 /* 64-bit addressing supported */ -#define PCI_AGP_STATUS_FW 0x0010 /* FW transfers supported */ -#define PCI_AGP_STATUS_RATE4 0x0004 /* 4x transfer rate supported */ -#define PCI_AGP_STATUS_RATE2 0x0002 /* 2x transfer rate supported */ -#define PCI_AGP_STATUS_RATE1 0x0001 /* 1x transfer rate supported */ +#define PCI_AGP_STATUS_ITA_COH 0x0100 /* In-aperture accesses always coherent */ +#define PCI_AGP_STATUS_GART64 0x0080 /* 64-bit GART entries supported */ +#define PCI_AGP_STATUS_HTRANS 0x0040 /* If 0, core logic can xlate host CPU accesses thru aperture */ +#define PCI_AGP_STATUS_64BIT 0x0020 /* 64-bit addressing cycles supported */ +#define PCI_AGP_STATUS_FW 0x0010 /* Fast write transfers supported */ +#define PCI_AGP_STATUS_AGP3 0x0008 /* AGP3 mode supported */ +#define PCI_AGP_STATUS_RATE4 0x0004 /* 4x transfer rate supported (RFU in AGP3 mode) */ +#define PCI_AGP_STATUS_RATE2 0x0002 /* 2x transfer rate supported (8x in AGP3 mode) */ +#define PCI_AGP_STATUS_RATE1 0x0001 /* 1x transfer rate supported (4x in AGP3 mode) */ #define PCI_AGP_COMMAND 8 /* Control register */ #define PCI_AGP_COMMAND_RQ_MASK 0xff000000 /* Master: Maximum number of requests */ +#define PCI_AGP_COMMAND_ARQSZ_MASK 0xe000 /* log2(optimum async req size in bytes) - 4 */ +#define PCI_AGP_COMMAND_CAL_MASK 0x1c00 /* Calibration cycle timing */ #define PCI_AGP_COMMAND_SBA 0x0200 /* Sideband addressing enabled */ #define PCI_AGP_COMMAND_AGP 0x0100 /* Allow processing of AGP transactions */ -#define PCI_AGP_COMMAND_64BIT 0x0020 /* Allow processing of 64-bit addresses */ -#define PCI_AGP_COMMAND_FW 0x0010 /* Force FW transfers */ -#define PCI_AGP_COMMAND_RATE4 0x0004 /* Use 4x rate */ -#define PCI_AGP_COMMAND_RATE2 0x0002 /* Use 2x rate */ -#define PCI_AGP_COMMAND_RATE1 0x0001 /* Use 1x rate */ +#define PCI_AGP_COMMAND_GART64 0x0080 /* 64-bit GART entries enabled */ +#define PCI_AGP_COMMAND_64BIT 0x0020 /* Allow generation of 64-bit addr cycles */ +#define PCI_AGP_COMMAND_FW 0x0010 /* Enable FW transfers */ +#define PCI_AGP_COMMAND_RATE4 0x0004 /* Use 4x rate (RFU in AGP3 mode) */ +#define PCI_AGP_COMMAND_RATE2 0x0002 /* Use 2x rate (8x in AGP3 mode) */ +#define PCI_AGP_COMMAND_RATE1 0x0001 /* Use 1x rate (4x in AGP3 mode) */ #define PCI_AGP_SIZEOF 12 /* Slot Identification */ diff --git a/lspci.c b/lspci.c index 16a69af..14825a8 100644 --- a/lspci.c +++ b/lspci.c @@ -1,5 +1,5 @@ /* - * $Id: lspci.c,v 1.42 2002/04/06 12:08:26 mj Exp $ + * $Id: lspci.c,v 1.43 2002/12/26 20:24:50 mj Exp $ * * Linux PCI Utilities -- List All PCI Devices * @@ -409,7 +409,7 @@ show_pm(struct device *d, int where, int cap) } static void -format_agp_rate(int rate, char *buf) +format_agp_rate(int rate, char *buf, int agp3) { char *c = buf; int i; @@ -420,7 +420,7 @@ format_agp_rate(int rate, char *buf) if (c != buf) *c++ = ','; *c++ = 'x'; - *c++ = '0' + (1 << i); + *c++ = '0' + (1 << (i + 2*agp3)); } if (c != buf) *c = 0; @@ -433,26 +433,41 @@ show_agp(struct device *d, int where, int cap) { u32 t; char rate[8]; + int ver, rev; + int agp3 = 0; - t = cap & 0xff; - printf("AGP version %x.%x\n", cap/16, cap%16); + ver = (cap >> 4) & 0x0f; + rev = cap & 0x0f; + printf("AGP version %x.%x\n", ver, rev); if (verbose < 2) return; config_fetch(d, where + PCI_AGP_STATUS, PCI_AGP_SIZEOF - PCI_AGP_STATUS); t = get_conf_long(d, where + PCI_AGP_STATUS); - format_agp_rate(t & 7, rate); - printf("\t\tStatus: RQ=%d SBA%c 64bit%c FW%c Rate=%s\n", - (t & PCI_AGP_STATUS_RQ_MASK) >> 24U, + if (ver >= 3 && (t & PCI_AGP_STATUS_AGP3)) + agp3 = 1; + format_agp_rate(t & 7, rate, agp3); + printf("\t\tStatus: RQ=%d Iso%c ArqSz=%d Cal=%d SBA%c ITACoh%c GART64%c HTrans%c 64bit%c FW%c AGP3%c Rate=%s\n", + ((t & PCI_AGP_STATUS_RQ_MASK) >> 24U) + 1, + FLAG(t, PCI_AGP_STATUS_ISOCH), + ((t & PCI_AGP_STATUS_ARQSZ_MASK) >> 13), + ((t & PCI_AGP_STATUS_CAL_MASK) >> 10), FLAG(t, PCI_AGP_STATUS_SBA), + FLAG(t, PCI_AGP_STATUS_ITA_COH), + FLAG(t, PCI_AGP_STATUS_GART64), + FLAG(t, PCI_AGP_STATUS_HTRANS), FLAG(t, PCI_AGP_STATUS_64BIT), FLAG(t, PCI_AGP_STATUS_FW), + FLAG(t, PCI_AGP_STATUS_AGP3), rate); t = get_conf_long(d, where + PCI_AGP_COMMAND); - format_agp_rate(t & 7, rate); - printf("\t\tCommand: RQ=%d SBA%c AGP%c 64bit%c FW%c Rate=%s\n", - (t & PCI_AGP_COMMAND_RQ_MASK) >> 24U, + format_agp_rate(t & 7, rate, agp3); + printf("\t\tCommand: RQ=%d ArqSz=%d Cal=%d SBA%c AGP%c GART64%c 64bit%c FW%c Rate=%s\n", + ((t & PCI_AGP_COMMAND_RQ_MASK) >> 24U) + 1, + ((t & PCI_AGP_COMMAND_ARQSZ_MASK) >> 13), + ((t & PCI_AGP_COMMAND_CAL_MASK) >> 10), FLAG(t, PCI_AGP_COMMAND_SBA), FLAG(t, PCI_AGP_COMMAND_AGP), + FLAG(t, PCI_AGP_COMMAND_GART64), FLAG(t, PCI_AGP_COMMAND_64BIT), FLAG(t, PCI_AGP_COMMAND_FW), rate); -- 2.39.2