From 33f7720064bfbfd193fe497d1c3b61de7cdeab82 Mon Sep 17 00:00:00 2001 From: Rajat Jain Date: Fri, 30 Sep 2016 17:41:44 -0700 Subject: [PATCH] pciutils: Update the tests/cap-l1-pm with actual device data Update the test data using lspci output taken from a card that supports L1 PM supstates. Signed-off-by: Rajat Jain --- tests/cap-l1-pm | 327 ++++++++++++++++++++++++++++++++++++++++++++---- 1 file changed, 303 insertions(+), 24 deletions(-) diff --git a/tests/cap-l1-pm b/tests/cap-l1-pm index b680135..ddd1905 100644 --- a/tests/cap-l1-pm +++ b/tests/cap-l1-pm @@ -1,26 +1,305 @@ -Sample lspci -vvxxxx output showing first 8 bytes of extended config space for -the L1 Substate Capability. Cannot show more since hardware is unreleased. - -MJ: Added fake header, so that the test parses. - -00:1c.0 PCI bridge: - Capabilities: [200 v1] L1 PM Substates - L1SubCap: PCI-PM_L1.2+, PCI-PM_L1.1+, ASPM_L1.2+, ASPM_L1.1+, L1_PM_Substates+ - PortCommonModeRestoreTime=40us, PortTPowerOnTime=10us -00: 86 80 08 34 47 01 10 00 12 00 04 06 10 00 01 00 -10: 00 00 00 00 00 00 00 00 00 01 01 00 10 10 00 00 -20: 00 e0 90 e0 81 c7 f1 c7 00 00 00 00 00 00 00 00 -30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 01 00 00 -40: 0d 60 00 00 86 80 53 4f 00 00 00 00 00 00 00 00 -50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 -60: 05 90 02 01 20 00 00 00 00 00 00 00 00 00 00 00 -70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +01:00.0 Class 0280: Device 8086:095a (rev 61) + Subsystem: Device 8086:5010 + Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ + Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- SERR-