From 08f734c44598ca90f47f4ab0dfed232c045dd403 Mon Sep 17 00:00:00 2001 From: Martin Mares Date: Tue, 7 Aug 2018 20:35:22 +0200 Subject: [PATCH] ssr: copy of usb --- ssr/.mxproject | 14 + ssr/Inc/app.h | 29 ++ ssr/Inc/main.h | 92 ++++++ ssr/Inc/stm32_assert.h | 73 +++++ ssr/Inc/stm32f1xx_hal_conf.h | 366 +++++++++++++++++++++++ ssr/Inc/stm32f1xx_it.h | 70 +++++ ssr/Inc/usb.h | 237 +++++++++++++++ ssr/Inc/util.h | 45 +++ ssr/Makefile | 219 ++++++++++++++ ssr/STM32F103C8Tx_FLASH.ld | 169 +++++++++++ ssr/Src/bmp085.c | 213 ++++++++++++++ ssr/Src/debug.c | 167 +++++++++++ ssr/Src/display.c | 191 ++++++++++++ ssr/Src/main.c | 458 +++++++++++++++++++++++++++++ ssr/Src/stm32f1xx_hal_msp.c | 139 +++++++++ ssr/Src/stm32f1xx_it.c | 306 +++++++++++++++++++ ssr/Src/system_stm32f1xx.c | 448 ++++++++++++++++++++++++++++ ssr/Src/usb.c | 550 +++++++++++++++++++++++++++++++++++ ssr/Src/usbdev.c | 151 ++++++++++ ssr/host/Makefile | 9 + ssr/host/test.c | 102 +++++++ ssr/mx.scratch | 199 +++++++++++++ ssr/ssr.ioc | 163 +++++++++++ ssr/startup_stm32f103xb.s | 379 ++++++++++++++++++++++++ 24 files changed, 4789 insertions(+) create mode 100644 ssr/.mxproject create mode 100644 ssr/Inc/app.h create mode 100644 ssr/Inc/main.h create mode 100644 ssr/Inc/stm32_assert.h create mode 100644 ssr/Inc/stm32f1xx_hal_conf.h create mode 100644 ssr/Inc/stm32f1xx_it.h create mode 100644 ssr/Inc/usb.h create mode 100644 ssr/Inc/util.h create mode 100644 ssr/Makefile create mode 100644 ssr/STM32F103C8Tx_FLASH.ld create mode 100644 ssr/Src/bmp085.c create mode 100644 ssr/Src/debug.c create mode 100644 ssr/Src/display.c create mode 100644 ssr/Src/main.c create mode 100644 ssr/Src/stm32f1xx_hal_msp.c create mode 100644 ssr/Src/stm32f1xx_it.c create mode 100644 ssr/Src/system_stm32f1xx.c create mode 100644 ssr/Src/usb.c create mode 100644 ssr/Src/usbdev.c create mode 100644 ssr/host/Makefile create mode 100644 ssr/host/test.c create mode 100644 ssr/mx.scratch create mode 100644 ssr/ssr.ioc create mode 100644 ssr/startup_stm32f103xb.s diff --git a/ssr/.mxproject b/ssr/.mxproject new file mode 100644 index 0000000..65e96ee --- /dev/null +++ b/ssr/.mxproject @@ -0,0 +1,14 @@ +[PreviousGenFiles] +HeaderPath=/aux/misc/stm/home/ssr/Inc +HeaderFiles=stm32f1xx_it.h;stm32_assert.h;stm32f1xx_hal_conf.h;main.h;usb_device.h;usbd_conf.h;usbd_desc.h;usbd_dfu_if.h; +SourcePath=/aux/misc/stm/home/ssr/Src +SourceFiles=stm32f1xx_it.c;stm32f1xx_hal_msp.c;main.c;usb_device.c;usbd_conf.c;usbd_desc.c;usbd_dfu_if.c; + +[PreviousLibFiles] +LibFiles=Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_i2c.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_tim_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_tim.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pcd.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pcd_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_usb.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_bus.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_system.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_utils.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_exti.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_ll_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_def.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_rcc_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_gpio_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma_ex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_dma.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_cortex.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_pwr.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash.h;Drivers/STM32F1xx_HAL_Driver/Inc/stm32f1xx_hal_flash_ex.h;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_i2c.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usb.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_utils.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_exti.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f103xb.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Include/system_stm32f1xx.h;Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;Drivers/CMSIS/Include/arm_const_structs.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_armcc_V6.h;Drivers/CMSIS/Include/core_cmFunc.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_cmInstr.h;Drivers/CMSIS/Include/arm_math.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/arm_common_tables.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cmSimd.h; + +[PreviousUsedMakefileFiles] +SourceFiles=Src/main.c;Src/stm32f1xx_it.c;Src/stm32f1xx_hal_msp.c;/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_gpio.c;/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_i2c.c;/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c;/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c;/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd.c;/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd_ex.c;/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usb.c;/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c;/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_utils.c;/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_exti.c;/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;/Src/system_stm32f1xx.c;/aux/misc/stm/F1-package/Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;/aux/misc/stm/testusb///startup_stm32f103xb.s; +HeaderPath=/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Inc;/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Inc/Legacy;/aux/misc/stm/F1-package/Drivers/CMSIS/Device/ST/STM32F1xx/Include;/aux/misc/stm/F1-package/Drivers/CMSIS/Include;Inc; +CDefines=USE_FULL_LL_DRIVER; + diff --git a/ssr/Inc/app.h b/ssr/Inc/app.h new file mode 100644 index 0000000..05a96f2 --- /dev/null +++ b/ssr/Inc/app.h @@ -0,0 +1,29 @@ +// main.c + +// display.c + +void display_init(void); +void display_counter(uint cnt); +void display_buffer(byte *buf); + +// usbdev.c + +extern byte rx_packet[64]; +extern byte tx_packet[64]; +extern volatile byte rx_packet_state, tx_packet_state; + +void tx_packet_send(void); + +// bmp085.c + +extern byte bmp_request; +extern int adjusted_temp; +extern int adjusted_press; +extern u32 bmp_counter; + +extern volatile byte *bmp_i2c_ptr; +extern volatile byte bmp_i2c_len; +extern volatile byte bmp_i2c_addr; + +void bmp_init(void); +void bmp_step(void); diff --git a/ssr/Inc/main.h b/ssr/Inc/main.h new file mode 100644 index 0000000..feddc77 --- /dev/null +++ b/ssr/Inc/main.h @@ -0,0 +1,92 @@ +/** + ****************************************************************************** + * @file : main.h + * @brief : Header for main.c file. + * This file contains the common defines of the application. + ****************************************************************************** + ** This notice applies to any and all portions of this file + * that are not between comment pairs USER CODE BEGIN and + * USER CODE END. Other portions of this file, whether + * inserted by the user or by software development tools + * are owned by their respective copyright owners. + * + * COPYRIGHT(c) 2018 STMicroelectronics + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __MAIN_H__ +#define __MAIN_H__ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f1xx_ll_i2c.h" +#include "stm32f1xx_ll_rcc.h" +#include "stm32f1xx_ll_bus.h" +#include "stm32f1xx_ll_system.h" +#include "stm32f1xx_ll_exti.h" +#include "stm32f1xx_ll_cortex.h" +#include "stm32f1xx_ll_utils.h" +#include "stm32f1xx_ll_pwr.h" +#include "stm32f1xx_ll_dma.h" +#include "stm32f1xx_ll_tim.h" +#include "stm32f1xx.h" +#include "stm32f1xx_ll_gpio.h" + +/* USER CODE BEGIN Includes */ + +/* USER CODE END Includes */ + +/* Private define ------------------------------------------------------------*/ + +#define LED_Pin LL_GPIO_PIN_13 +#define LED_GPIO_Port GPIOC +#define BMP_DONE_Pin LL_GPIO_PIN_5 +#define BMP_DONE_GPIO_Port GPIOB + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* USER CODE BEGIN Private defines */ + +/* USER CODE END Private defines */ + +#ifdef __cplusplus + extern "C" { +#endif +void _Error_Handler(char *, int); + +#define Error_Handler() _Error_Handler(__FILE__, __LINE__) +#ifdef __cplusplus +} +#endif + +#endif /* __MAIN_H__ */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ssr/Inc/stm32_assert.h b/ssr/Inc/stm32_assert.h new file mode 100644 index 0000000..7fa31cf --- /dev/null +++ b/ssr/Inc/stm32_assert.h @@ -0,0 +1,73 @@ +/** + ****************************************************************************** + * @file stm32_assert.h + * @brief STM32 assert file. + ****************************************************************************** + ** This notice applies to any and all portions of this file + * that are not between comment pairs USER CODE BEGIN and + * USER CODE END. Other portions of this file, whether + * inserted by the user or by software development tools + * are owned by their respective copyright owners. + * + * COPYRIGHT(c) 2018 STMicroelectronics + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32_ASSERT_H +#define __STM32_ASSERT_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Includes ------------------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32_ASSERT_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ssr/Inc/stm32f1xx_hal_conf.h b/ssr/Inc/stm32f1xx_hal_conf.h new file mode 100644 index 0000000..9180b49 --- /dev/null +++ b/ssr/Inc/stm32f1xx_hal_conf.h @@ -0,0 +1,366 @@ +/** + ****************************************************************************** + * @file stm32f1xx_hal_conf.h + * @brief HAL configuration file. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT(c) 2018 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F1xx_HAL_CONF_H +#define __STM32F1xx_HAL_CONF_H + +#ifdef __cplusplus + extern "C" { +#endif + +#include "main.h" +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* ########################## Module Selection ############################## */ +/** + * @brief This is the list of modules to be used in the HAL driver + */ + +#define HAL_MODULE_ENABLED +/*#define HAL_ADC_MODULE_ENABLED */ +/*#define HAL_CRYP_MODULE_ENABLED */ +/*#define HAL_CAN_MODULE_ENABLED */ +/*#define HAL_CEC_MODULE_ENABLED */ +/*#define HAL_CORTEX_MODULE_ENABLED */ +/*#define HAL_CRC_MODULE_ENABLED */ +/*#define HAL_DAC_MODULE_ENABLED */ +/*#define HAL_DMA_MODULE_ENABLED */ +/*#define HAL_ETH_MODULE_ENABLED */ +/*#define HAL_FLASH_MODULE_ENABLED */ +/*#define HAL_GPIO_MODULE_ENABLED */ +/*#define HAL_I2C_MODULE_ENABLED */ +/*#define HAL_I2S_MODULE_ENABLED */ +/*#define HAL_IRDA_MODULE_ENABLED */ +/*#define HAL_IWDG_MODULE_ENABLED */ +/*#define HAL_NOR_MODULE_ENABLED */ +/*#define HAL_NAND_MODULE_ENABLED */ +/*#define HAL_PCCARD_MODULE_ENABLED */ +#define HAL_PCD_MODULE_ENABLED +/*#define HAL_HCD_MODULE_ENABLED */ +/*#define HAL_PWR_MODULE_ENABLED */ +/*#define HAL_RCC_MODULE_ENABLED */ +/*#define HAL_RTC_MODULE_ENABLED */ +/*#define HAL_SD_MODULE_ENABLED */ +/*#define HAL_MMC_MODULE_ENABLED */ +/*#define HAL_SDRAM_MODULE_ENABLED */ +/*#define HAL_SMARTCARD_MODULE_ENABLED */ +/*#define HAL_SPI_MODULE_ENABLED */ +/*#define HAL_SRAM_MODULE_ENABLED */ +/*#define HAL_TIM_MODULE_ENABLED */ +/*#define HAL_UART_MODULE_ENABLED */ +/*#define HAL_USART_MODULE_ENABLED */ +/*#define HAL_WWDG_MODULE_ENABLED */ + +#define HAL_CORTEX_MODULE_ENABLED +#define HAL_DMA_MODULE_ENABLED +#define HAL_FLASH_MODULE_ENABLED +#define HAL_GPIO_MODULE_ENABLED +#define HAL_PWR_MODULE_ENABLED +#define HAL_RCC_MODULE_ENABLED + +/* ########################## Oscillator Values adaptation ####################*/ +/** + * @brief Adjust the value of External High Speed oscillator (HSE) used in your application. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSE is used as system clock source, directly or through the PLL). + */ +#if !defined (HSE_VALUE) + #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */ +#endif /* HSE_VALUE */ + +#if !defined (HSE_STARTUP_TIMEOUT) + #define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */ +#endif /* HSE_STARTUP_TIMEOUT */ + +/** + * @brief Internal High Speed oscillator (HSI) value. + * This value is used by the RCC HAL module to compute the system frequency + * (when HSI is used as system clock source, directly or through the PLL). + */ +#if !defined (HSI_VALUE) + #define HSI_VALUE ((uint32_t)8000000) /*!< Value of the Internal oscillator in Hz*/ +#endif /* HSI_VALUE */ + +/** + * @brief Internal Low Speed oscillator (LSI) value. + */ +#if !defined (LSI_VALUE) + #define LSI_VALUE 40000U /*!< LSI Typical Value in Hz */ +#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz + The real value may vary depending on the variations + in voltage and temperature. */ + +/** + * @brief External Low Speed oscillator (LSE) value. + * This value is used by the UART, RTC HAL module to compute the system frequency + */ +#if !defined (LSE_VALUE) + #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External oscillator in Hz*/ +#endif /* LSE_VALUE */ + +#if !defined (LSE_STARTUP_TIMEOUT) + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */ +#endif /* LSE_STARTUP_TIMEOUT */ + +/* Tip: To avoid modifying this file each time you need to use different HSE, + === you can define the HSE value in your toolchain compiler preprocessor. */ + +/* ########################### System Configuration ######################### */ +/** + * @brief This is the HAL system configuration section + */ +#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ +#define TICK_INT_PRIORITY ((uint32_t)0) /*!< tick interrupt priority (lowest by default) */ +#define USE_RTOS 0 +#define PREFETCH_ENABLE 1 + +/* ########################## Assert Selection ############################## */ +/** + * @brief Uncomment the line below to expanse the "assert_param" macro in the + * HAL drivers code + */ +/* #define USE_FULL_ASSERT 1U */ + +/* ################## Ethernet peripheral configuration ##################### */ + +/* Section 1 : Ethernet peripheral configuration */ + +/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */ +#define MAC_ADDR0 2 +#define MAC_ADDR1 0 +#define MAC_ADDR2 0 +#define MAC_ADDR3 0 +#define MAC_ADDR4 0 +#define MAC_ADDR5 0 + +/* Definition of the Ethernet driver buffers size and count */ +#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */ +#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */ +#define ETH_RXBUFNB ((uint32_t)8) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */ +#define ETH_TXBUFNB ((uint32_t)4) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */ + +/* Section 2: PHY configuration section */ + +/* DP83848_PHY_ADDRESS Address*/ +#define DP83848_PHY_ADDRESS 0x01U +/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/ +#define PHY_RESET_DELAY ((uint32_t)0x000000FF) +/* PHY Configuration delay */ +#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFF) + +#define PHY_READ_TO ((uint32_t)0x0000FFFF) +#define PHY_WRITE_TO ((uint32_t)0x0000FFFF) + +/* Section 3: Common PHY Registers */ + +#define PHY_BCR ((uint16_t)0x00) /*!< Transceiver Basic Control Register */ +#define PHY_BSR ((uint16_t)0x01) /*!< Transceiver Basic Status Register */ + +#define PHY_RESET ((uint16_t)0x8000) /*!< PHY Reset */ +#define PHY_LOOPBACK ((uint16_t)0x4000) /*!< Select loop-back mode */ +#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100) /*!< Set the full-duplex mode at 100 Mb/s */ +#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000) /*!< Set the half-duplex mode at 100 Mb/s */ +#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100) /*!< Set the full-duplex mode at 10 Mb/s */ +#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000) /*!< Set the half-duplex mode at 10 Mb/s */ +#define PHY_AUTONEGOTIATION ((uint16_t)0x1000) /*!< Enable auto-negotiation function */ +#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200) /*!< Restart auto-negotiation function */ +#define PHY_POWERDOWN ((uint16_t)0x0800) /*!< Select the power down mode */ +#define PHY_ISOLATE ((uint16_t)0x0400) /*!< Isolate PHY from MII */ + +#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020) /*!< Auto-Negotiation process completed */ +#define PHY_LINKED_STATUS ((uint16_t)0x0004) /*!< Valid link established */ +#define PHY_JABBER_DETECTION ((uint16_t)0x0002) /*!< Jabber condition detected */ + +/* Section 4: Extended PHY Registers */ +#define PHY_SR ((uint16_t)0x10U) /*!< PHY status register Offset */ + +#define PHY_SPEED_STATUS ((uint16_t)0x0002U) /*!< PHY Speed mask */ +#define PHY_DUPLEX_STATUS ((uint16_t)0x0004U) /*!< PHY Duplex mask */ + +/* Includes ------------------------------------------------------------------*/ +/** + * @brief Include module's header file + */ + +#ifdef HAL_RCC_MODULE_ENABLED + #include "stm32f1xx_hal_rcc.h" +#endif /* HAL_RCC_MODULE_ENABLED */ + +#ifdef HAL_GPIO_MODULE_ENABLED + #include "stm32f1xx_hal_gpio.h" +#endif /* HAL_GPIO_MODULE_ENABLED */ + +#ifdef HAL_DMA_MODULE_ENABLED + #include "stm32f1xx_hal_dma.h" +#endif /* HAL_DMA_MODULE_ENABLED */ + +#ifdef HAL_ETH_MODULE_ENABLED + #include "stm32f1xx_hal_eth.h" +#endif /* HAL_ETH_MODULE_ENABLED */ + +#ifdef HAL_CAN_MODULE_ENABLED + #include "stm32f1xx_hal_can.h" +#endif /* HAL_CAN_MODULE_ENABLED */ + +#ifdef HAL_CEC_MODULE_ENABLED + #include "stm32f1xx_hal_cec.h" +#endif /* HAL_CEC_MODULE_ENABLED */ + +#ifdef HAL_CORTEX_MODULE_ENABLED + #include "stm32f1xx_hal_cortex.h" +#endif /* HAL_CORTEX_MODULE_ENABLED */ + +#ifdef HAL_ADC_MODULE_ENABLED + #include "stm32f1xx_hal_adc.h" +#endif /* HAL_ADC_MODULE_ENABLED */ + +#ifdef HAL_CRC_MODULE_ENABLED + #include "stm32f1xx_hal_crc.h" +#endif /* HAL_CRC_MODULE_ENABLED */ + +#ifdef HAL_DAC_MODULE_ENABLED + #include "stm32f1xx_hal_dac.h" +#endif /* HAL_DAC_MODULE_ENABLED */ + +#ifdef HAL_FLASH_MODULE_ENABLED + #include "stm32f1xx_hal_flash.h" +#endif /* HAL_FLASH_MODULE_ENABLED */ + +#ifdef HAL_SRAM_MODULE_ENABLED + #include "stm32f1xx_hal_sram.h" +#endif /* HAL_SRAM_MODULE_ENABLED */ + +#ifdef HAL_NOR_MODULE_ENABLED + #include "stm32f1xx_hal_nor.h" +#endif /* HAL_NOR_MODULE_ENABLED */ + +#ifdef HAL_I2C_MODULE_ENABLED + #include "stm32f1xx_hal_i2c.h" +#endif /* HAL_I2C_MODULE_ENABLED */ + +#ifdef HAL_I2S_MODULE_ENABLED + #include "stm32f1xx_hal_i2s.h" +#endif /* HAL_I2S_MODULE_ENABLED */ + +#ifdef HAL_IWDG_MODULE_ENABLED + #include "stm32f1xx_hal_iwdg.h" +#endif /* HAL_IWDG_MODULE_ENABLED */ + +#ifdef HAL_PWR_MODULE_ENABLED + #include "stm32f1xx_hal_pwr.h" +#endif /* HAL_PWR_MODULE_ENABLED */ + +#ifdef HAL_RTC_MODULE_ENABLED + #include "stm32f1xx_hal_rtc.h" +#endif /* HAL_RTC_MODULE_ENABLED */ + +#ifdef HAL_PCCARD_MODULE_ENABLED + #include "stm32f1xx_hal_pccard.h" +#endif /* HAL_PCCARD_MODULE_ENABLED */ + +#ifdef HAL_SD_MODULE_ENABLED + #include "stm32f1xx_hal_sd.h" +#endif /* HAL_SD_MODULE_ENABLED */ + +#ifdef HAL_MMC_MODULE_ENABLED + #include "stm32f1xx_hal_mmc.h" +#endif /* HAL_MMC_MODULE_ENABLED */ + +#ifdef HAL_NAND_MODULE_ENABLED + #include "stm32f1xx_hal_nand.h" +#endif /* HAL_NAND_MODULE_ENABLED */ + +#ifdef HAL_SPI_MODULE_ENABLED + #include "stm32f1xx_hal_spi.h" +#endif /* HAL_SPI_MODULE_ENABLED */ + +#ifdef HAL_TIM_MODULE_ENABLED + #include "stm32f1xx_hal_tim.h" +#endif /* HAL_TIM_MODULE_ENABLED */ + +#ifdef HAL_UART_MODULE_ENABLED + #include "stm32f1xx_hal_uart.h" +#endif /* HAL_UART_MODULE_ENABLED */ + +#ifdef HAL_USART_MODULE_ENABLED + #include "stm32f1xx_hal_usart.h" +#endif /* HAL_USART_MODULE_ENABLED */ + +#ifdef HAL_IRDA_MODULE_ENABLED + #include "stm32f1xx_hal_irda.h" +#endif /* HAL_IRDA_MODULE_ENABLED */ + +#ifdef HAL_SMARTCARD_MODULE_ENABLED + #include "stm32f1xx_hal_smartcard.h" +#endif /* HAL_SMARTCARD_MODULE_ENABLED */ + +#ifdef HAL_WWDG_MODULE_ENABLED + #include "stm32f1xx_hal_wwdg.h" +#endif /* HAL_WWDG_MODULE_ENABLED */ + +#ifdef HAL_PCD_MODULE_ENABLED + #include "stm32f1xx_hal_pcd.h" +#endif /* HAL_PCD_MODULE_ENABLED */ + +#ifdef HAL_HCD_MODULE_ENABLED + #include "stm32f1xx_hal_hcd.h" +#endif /* HAL_HCD_MODULE_ENABLED */ + + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function + * which reports the name of the source file and the source + * line number of the call that failed. + * If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0U) +#endif /* USE_FULL_ASSERT */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F1xx_HAL_CONF_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ssr/Inc/stm32f1xx_it.h b/ssr/Inc/stm32f1xx_it.h new file mode 100644 index 0000000..e1473ed --- /dev/null +++ b/ssr/Inc/stm32f1xx_it.h @@ -0,0 +1,70 @@ +/** + ****************************************************************************** + * @file stm32f1xx_it.h + * @brief This file contains the headers of the interrupt handlers. + ****************************************************************************** + * + * COPYRIGHT(c) 2018 STMicroelectronics + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F1xx_IT_H +#define __STM32F1xx_IT_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f1xx_hal.h" +#include "main.h" +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ + +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); +void USB_HP_CAN1_TX_IRQHandler(void); +void USB_LP_CAN1_RX0_IRQHandler(void); +void TIM4_IRQHandler(void); +void I2C1_EV_IRQHandler(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32F1xx_IT_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ssr/Inc/usb.h b/ssr/Inc/usb.h new file mode 100644 index 0000000..79b892c --- /dev/null +++ b/ssr/Inc/usb.h @@ -0,0 +1,237 @@ +/*** Configurable parameters ***/ + +#define USB_SELF_POWERED +#define USB_NUM_CONFIGURATIONS 1 +#undef USB_DEBUG + +/*** USB state structure ***/ + +/* + * We have a single buffer for all control transfers. + * It must be able to contain: + * + * - 2-byte status replies + * - UTF-16 versions of all string descriptors + * + * In addition to that, its length must be even. + */ +#define USB_EP0_BUF_SIZE 256 + +struct usb { + PCD_HandleTypeDef *hpcd; + byte state; // USB_STATE_xxx + byte pre_suspend_state; + byte address; // Device address assigned by the host (0=none) + byte config; // Selected configuration (0=none) + byte remote_wakeup; // State of remote wakeup feature + + // State of endpoint 00 + byte ep0_state; // USB_EP0_xxx + u16 ep0_setup_data_length; + u16 ep0_remaining_length; + u16 ep0_total_length; + byte ep0_buf[USB_EP0_BUF_SIZE]; + + // Descriptor data to be filled by the user during usb_dev_reset() + const byte *desc_device; + const byte *desc_config; + const char * const *desc_string; + const byte *desc_languages; + u16 desc_device_len; + u16 desc_config_len; + u16 desc_string_items; + u16 desc_languages_len; + + // Internal use + u16 last_pma_alloc; +}; + +enum usb_device_state { + USB_STATE_DEFAULT, + USB_STATE_ADDRESSED, + USB_STATE_CONFIGURED, + USB_STATE_SUSPENDED, +}; + +enum usb_ep0_state { + USB_EP0_IDLE, + USB_EP0_SETUP, + USB_EP0_DATA_IN, + USB_EP0_DATA_OUT, + USB_EP0_STATUS_IN, + USB_EP0_STATUS_OUT, + USB_EP0_STALL, +}; + +#ifdef USB_DEBUG +#define usb_debug debug_printf +#else +static inline void usb_debug(char *msg, ...) +{ } +#endif + +// Parsed setup request +struct setup_request { + byte bmRequest; + byte bRequest; + u16 wValue; + u16 wIndex; + u16 wLength; +}; + +/*** Functions provided by low-level code ***/ + +void usb_init(struct usb *usb, PCD_HandleTypeDef *hpcd); +void usb_start(struct usb *usb); + +void usb_ctl_send_status(struct usb *usb); +void usb_ctl_recv_status(struct usb *usb); +void usb_ctl_send_data(struct usb *usb, const byte *data, uint len); +void usb_ctl_recv_data(struct usb *usb, byte *data, uint len); +void usb_ctl_error(struct usb *usb); +void usb_ctl_setup_error(struct usb *usb, struct setup_request *setup); + +/*** Callbacks to user code ***/ + +// Device was reset +void usb_dev_reset(struct usb *usb); + +// Configure the device (usb->config is the selected configuration) +void usb_dev_configure(struct usb *usb); + +// Un-configure the device (usb->config is the configuration we are leaving) +void usb_dev_unconfigure(struct usb *usb); + +// Intercept a setup packet. Returns true if default processing should be skipped. +// Remember to check if usb->state == USB_STATE_CONFIGURED for most requests. +bool usb_dev_setup_hook(struct usb *usb, struct setup_request *setup); + +// Finished receiving control packet data requested by usb_ctl_recv_data() +void usb_dev_ctl_recv_done(struct usb *usb); + +// Finished sending control packet data requested by usb_ctl_send_data() +void usb_dev_ctl_send_done(struct usb *usb); + +// Finished receiving data on a non-control endpoint +void usb_dev_recv_done(struct usb *usb, byte epnum); + +// Finished sending data on a non-control endpoint +void usb_dev_send_done(struct usb *usb, byte epnum); + +/*** Constants from USB specs ***/ + +#define USB_REQ_DIRECTION 0x80 + +enum usb_req_type { + USB_REQ_TYPE_STANDARD = 0x00, + USB_REQ_TYPE_CLASS = 0x20, + USB_REQ_TYPE_VENDOR = 0x40, + USB_REQ_TYPE_MASK = 0x60, +}; + +enum usb_req_recipient { + USB_REQ_RECIPIENT_DEVICE = 0x00, + USB_REQ_RECIPIENT_INTERFACE = 0x01, + USB_REQ_RECIPIENT_ENDPOINT = 0x02, + USB_REQ_RECIPIENT_MASK = 0x1f, +}; + +enum usb_req_standard { + USB_REQ_GET_STATUS = 0x00, + USB_REQ_CLEAR_FEATURE = 0x01, + USB_REQ_SET_FEATURE = 0x03, + USB_REQ_SET_ADDRESS = 0x05, + USB_REQ_GET_DESCRIPTOR = 0x06, + USB_REQ_SET_DESCRIPTOR = 0x07, + USB_REQ_GET_CONFIGURATION = 0x08, + USB_REQ_SET_CONFIGURATION = 0x09, + USB_REQ_GET_INTERFACE = 0x0A, + USB_REQ_SET_INTERFACE = 0x0B, + USB_REQ_SYNCH_FRAME = 0x0C, +}; + +enum usb_desc_type { + USB_DESC_TYPE_DEVICE = 1, + USB_DESC_TYPE_CONFIGURATION = 2, + USB_DESC_TYPE_STRING = 3, + USB_DESC_TYPE_INTERFACE = 4, + USB_DESC_TYPE_ENDPOINT = 5, + USB_DESC_TYPE_DEVICE_QUALIFIER = 6, + USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION = 7, + USB_DESC_TYPE_BOS = 0x0F, +}; + +enum usb_dev_status { + USB_DEV_STATUS_REMOTE_WAKEUP = 2, + USB_DEV_STATUS_SELF_POWERED = 1, +}; + +enum usb_feature { + USB_FEATURE_EP_HALT = 0, + USB_FEATURE_REMOTE_WAKEUP = 1, + USB_FEATURE_TEST_MODE = 2, +}; + +#define USB_HS_MAX_PACKET_SIZE 512 +#define USB_FS_MAX_PACKET_SIZE 64 +#define USB_MAX_EP0_SIZE 64 + +enum usb_ep_type { + USB_EP_TYPE_CTRL = 0, + USB_EP_TYPE_ISOC = 1, + USB_EP_TYPE_BULK = 2, + USB_EP_TYPE_INTR = 3, +}; + +/*** Wrappers around HAL routines ***/ + +// Wrappers return HAL_OK / HAL_ERROR / HAL_BUSY / HAL_TIMEOUT + +// Call from configure callback +static inline HAL_StatusTypeDef usb_ep_open(struct usb *usb, byte ep_addr, byte ep_type, byte ep_max_size) +{ + HAL_PCDEx_PMAConfig(usb->hpcd, ep_addr, PCD_SNG_BUF, usb->last_pma_alloc); + usb->last_pma_alloc += (ep_max_size + 7) & ~7U; + return HAL_PCD_EP_Open(usb->hpcd, ep_addr, ep_max_size, ep_type); +} + +// Call from unconfigure callback +static inline HAL_StatusTypeDef usb_ep_close(struct usb *usb, byte ep_addr) +{ + return HAL_PCD_EP_Close(usb->hpcd, ep_addr); +} + +static inline HAL_StatusTypeDef usb_ep_flush(struct usb *usb, byte ep_addr) +{ + return HAL_PCD_EP_Flush(usb->hpcd, ep_addr); +} + +static inline HAL_StatusTypeDef usb_ep_stall(struct usb *usb, byte ep_addr) +{ + return HAL_PCD_EP_SetStall(usb->hpcd, ep_addr); +} + +static inline HAL_StatusTypeDef usb_ep_unstall(struct usb *usb, byte ep_addr) +{ + return HAL_PCD_EP_ClrStall(usb->hpcd, ep_addr); +} + +static inline int usb_ep_is_stalled(struct usb *usb, byte ep_addr) +{ + return ((ep_addr & 0x80) ? usb->hpcd->IN_ep : usb->hpcd->OUT_ep) [ep_addr & 0x7f].is_stall; +} + +static inline HAL_StatusTypeDef usb_ep_send(struct usb *usb, byte ep_addr, const byte *buf, u32 size) +{ + return HAL_PCD_EP_Transmit(usb->hpcd, ep_addr, (byte *) buf, size); +} + +static inline HAL_StatusTypeDef usb_ep_receive(struct usb *usb, byte ep_addr, byte *buf, u32 size) +{ + return HAL_PCD_EP_Receive(usb->hpcd, ep_addr, buf, size); +} + +static inline u32 usb_ep_received_size(struct usb *usb, byte ep_addr) +{ + return HAL_PCD_EP_GetRxCount(usb->hpcd, ep_addr); +} diff --git a/ssr/Inc/util.h b/ssr/Inc/util.h new file mode 100644 index 0000000..0beed7c --- /dev/null +++ b/ssr/Inc/util.h @@ -0,0 +1,45 @@ +#include +#include + +typedef unsigned int uint; +typedef uint8_t byte; +typedef uint16_t u16; +typedef int16_t s16; +typedef uint32_t u32; +typedef int32_t s32; + +#define MIN(x,y) ((x) < (y) ? (x) : (y)) +#define MAX(x,y) ((x) > (y) ? (x) : (y)) + +static inline uint get_u16_le(byte *p) +{ + return (p[1] << 8) | p[0]; +} + +static inline void put_u16_le(byte *p, u16 x) +{ + p[0] = x; + p[1] = x >> 8; +} + +static inline void put_u16_be(byte *p, u16 x) +{ + p[0] = x >> 8; + p[1] = x; +} + +static inline void put_u32_be(byte *p, u32 x) +{ + p[0] = x >> 24; + p[1] = (x >> 16) & 0xff; + p[2] = (x >> 8) & 0xff; + p[3] = x & 0xff; +} + +// debug.c + +#define DEBUG_SEMIHOSTING + +void debug_printf(const char *fmt, ...); +void debug_puts(const char *s); +void debug_putc(int c); diff --git a/ssr/Makefile b/ssr/Makefile new file mode 100644 index 0000000..eda6836 --- /dev/null +++ b/ssr/Makefile @@ -0,0 +1,219 @@ +########################################################################################################################## +# File automatically-generated by tool: [projectgenerator] version: [2.27.0] date: [Fri Jun 29 23:59:44 CEST 2018] +########################################################################################################################## + +# ------------------------------------------------ +# Generic Makefile (based on gcc) +# +# ChangeLog : +# 2017-02-10 - Several enhancements + project update mode +# 2015-07-22 - first version +# ------------------------------------------------ + +###################################### +# target +###################################### +TARGET = testusb + + +###################################### +# building variables +###################################### +# debug build? +DEBUG = 1 +# optimization +OPT = -Og + + +####################################### +# paths +####################################### +# source path +SOURCES_DIR = \ +Drivers \ +Application/User/Src/main.c \ +Application/User/Src \ +Application/User/Src/stm32f1xx_hal_msp.c \ +Drivers/STM32F1xx_HAL_Driver \ +Application/User/Src/stm32f1xx_it.c \ +Application/User \ +Drivers/CMSIS \ +Application + +# firmware library path +PERIFLIB_PATH = + +# Build path +BUILD_DIR = build + +###################################### +# source +###################################### +# C sources +C_SOURCES = \ +/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_exti.c \ +Src/main.c \ +Src/debug.c \ +Src/usb.c \ +Src/usbdev.c \ +Src/display.c \ +Src/bmp085.c \ +/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c \ +/Src/system_stm32f1xx.c \ +Src/stm32f1xx_it.c \ +/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_utils.c \ +/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_gpio.c \ +/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c \ +/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c \ +Src/stm32f1xx_hal_msp.c \ +/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c \ +/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c \ +/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd_ex.c \ +/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c \ +/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c \ +/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c \ +/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c \ +/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c \ +/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c \ +/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c \ +/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c \ +/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c \ +/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd.c \ +/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usb.c \ +/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_i2c.c \ +/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c + +# ASM sources +ASM_SOURCES = \ +startup_stm32f103xb.s + + +###################################### +# firmware library +###################################### +PERIFLIB_SOURCES = + + +####################################### +# binaries +####################################### +BINPATH = /usr/bin +PREFIX = arm-none-eabi- +CC = $(BINPATH)/$(PREFIX)gcc +AS = $(BINPATH)/$(PREFIX)gcc -x assembler-with-cpp +CP = $(BINPATH)/$(PREFIX)objcopy +AR = $(BINPATH)/$(PREFIX)ar +SZ = $(BINPATH)/$(PREFIX)size +HEX = $(CP) -O ihex +BIN = $(CP) -O binary -S + +####################################### +# CFLAGS +####################################### +# cpu +CPU = -mcpu=cortex-m3 + +# fpu +# NONE for Cortex-M0/M0+/M3 + +# float-abi + + +# mcu +MCU = $(CPU) -mthumb $(FPU) $(FLOAT-ABI) + +# macros for gcc +# AS defines +AS_DEFS = + +# C defines +C_DEFS = \ +-DUSE_FULL_LL_DRIVER \ +-DSTM32F103xB \ +-DUSE_HAL_DRIVER + + +# AS includes +AS_INCLUDES = + +# C includes +C_INCLUDES = \ +-IInc \ +-I/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Inc \ +-I/aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Inc/Legacy \ +-I/aux/misc/stm/F1-package/Drivers/CMSIS/Include \ +-I/aux/misc/stm/F1-package/Drivers/CMSIS/Device/ST/STM32F1xx/Include + + +# compile gcc flags +ASFLAGS = $(MCU) $(AS_DEFS) $(AS_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections + +CFLAGS = $(MCU) $(C_DEFS) $(C_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections + +ifeq ($(DEBUG), 1) +CFLAGS += -g -gdwarf-2 +endif + + +# Generate dependency information +CFLAGS += -MMD -MF"$(@:%.o=%.d)" + + +####################################### +# LDFLAGS +####################################### +# link script +LDSCRIPT = STM32F103C8Tx_FLASH.ld + +# libraries +LIBS = -lc -lm -lnosys +LIBDIR = +LDFLAGS = $(MCU) -specs=nano.specs -T$(LDSCRIPT) $(LIBDIR) $(LIBS) -Wl,-Map=$(BUILD_DIR)/$(TARGET).map,--cref -Wl,--gc-sections + +# default action: build all +all: $(BUILD_DIR)/$(TARGET).elf $(BUILD_DIR)/$(TARGET).hex $(BUILD_DIR)/$(TARGET).bin + +flash: all + ../bin/st-flash write $(BUILD_DIR)/$(TARGET).bin 0x8000000 + +####################################### +# build the application +####################################### +# list of objects +OBJECTS = $(addprefix $(BUILD_DIR)/,$(notdir $(C_SOURCES:.c=.o))) +vpath %.c $(sort $(dir $(C_SOURCES))) +# list of ASM program objects +OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(ASM_SOURCES:.s=.o))) +vpath %.s $(sort $(dir $(ASM_SOURCES))) + +$(BUILD_DIR)/%.o: %.c Makefile | $(BUILD_DIR) + $(CC) -c $(CFLAGS) -Wa,-a,-ad,-alms=$(BUILD_DIR)/$(notdir $(<:.c=.lst)) $< -o $@ + +$(BUILD_DIR)/%.o: %.s Makefile | $(BUILD_DIR) + $(AS) -c $(CFLAGS) $< -o $@ + +$(BUILD_DIR)/$(TARGET).elf: $(OBJECTS) Makefile + $(CC) $(OBJECTS) $(LDFLAGS) -o $@ + $(SZ) $@ + +$(BUILD_DIR)/%.hex: $(BUILD_DIR)/%.elf | $(BUILD_DIR) + $(HEX) $< $@ + +$(BUILD_DIR)/%.bin: $(BUILD_DIR)/%.elf | $(BUILD_DIR) + $(BIN) $< $@ + +$(BUILD_DIR): + mkdir $@ + +####################################### +# clean up +####################################### +clean: + -rm -fR $(BUILD_DIR) + +####################################### +# dependencies +####################################### +-include $(wildcard $(BUILD_DIR)/*.d) + +# *** EOF *** diff --git a/ssr/STM32F103C8Tx_FLASH.ld b/ssr/STM32F103C8Tx_FLASH.ld new file mode 100644 index 0000000..55d753a --- /dev/null +++ b/ssr/STM32F103C8Tx_FLASH.ld @@ -0,0 +1,169 @@ +/* +***************************************************************************** +** + +** File : LinkerScript.ld +** +** Abstract : Linker script for STM32F103C8Tx Device with +** 64KByte FLASH, 20KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** +** Distribution: The file is distributed as is, without any warranty +** of any kind. +** +** (c)Copyright Ac6. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Ac6 permit registered System Workbench for MCU users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the System Workbench for MCU toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20005000; /* end of RAM */ +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ +RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 20K +FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 64K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data goes into FLASH */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} + + diff --git a/ssr/Src/bmp085.c b/ssr/Src/bmp085.c new file mode 100644 index 0000000..45039b7 --- /dev/null +++ b/ssr/Src/bmp085.c @@ -0,0 +1,213 @@ +#include "stm32f1xx.h" +#include "stm32f1xx_hal.h" + +#include "util.h" +#include "app.h" + +#undef TEST_VECTOR + +#if 0 +#define bmp_debug debug_printf +#else +static inline void bmp_debug(char *msg, ...) +{ } +#endif + +static byte bmp_i2c_buf[4]; +volatile byte *bmp_i2c_ptr; +volatile byte bmp_i2c_len; +volatile byte bmp_i2c_addr; + +static uint bmp_read(uint reg, uint bytes) +{ + bmp_i2c_buf[0] = reg; + bmp_i2c_ptr = bmp_i2c_buf; + bmp_i2c_len = 1; + bmp_i2c_addr = 0xee; + + LL_I2C_GenerateStartCondition(I2C1); + LL_I2C_EnableIT_TX(I2C1); + + while (bmp_i2c_len) + ; + + bmp_i2c_ptr = bmp_i2c_buf; + bmp_i2c_len = bytes; + bmp_i2c_addr = 0xef; + + LL_I2C_GenerateStartCondition(I2C1); + LL_I2C_EnableIT_RX(I2C1); + + while (bmp_i2c_len) + ; + + uint d = 0; + for (uint i=0; i>= (8-oss); + + int X1 = (UT-AC6)*AC5 / (1<<15); + int X2 = MC*(1<<11) / (X1+MD); + int B5 = X1 + X2; + int T = (B5+8) / (1<<4); + *tt = T; + + int B6 = B5 - 4000; + X1 = (B2*(B6*B6/(1<<12))) / (1<<11); + X2 = AC2 * B6 / (1<<11); + int X3 = X1 + X2; + int B3 = (((AC1*4 + X3) << oss) + 2) / 4; + X1 = AC3 * B6 / (1<<13); + X2 = (B1*(B6*B6/(1<<12))) / (1<<16); + X3 = ((X1+X2) + 2) / (1<<2); + uint B4 = (uint)(AC4 * (X3 + 32768)) / (1U<<15); + uint B7 = (uint)(UP-B3) * (uint)(50000>>oss); + int p; + if (B7 < 0x80000000) + p = (B7*2) / B4; + else + p = B7 / B4 * 2; + X1 = (p/(1<<8)) * (p/(1<<8)); + X1 = (X1*3038) / (1<<16); + X2 = (-7357*p) / (1<<16); + p = p + (X1 + X2 + 3791) / (1<<4); + *pp = p; +} + +#ifdef TEST_VECTOR + +#define BMP_OSS 0 +static u16 bmp_constants[11] = { + 408, + -72, + -14383, + 32741, + 32757, + 23153, + 6190, + 4, + 32768, + -8711, + 2868, +}; + +void bmp_init(void) +{ + bmp_debug("BMP: Test constants\n"); +} + +#else + +#define BMP_OSS 3 +static u16 bmp_constants[11]; + +void bmp_init(void) +{ + bmp_debug("BMP: Reading constants\n"); + for (uint i=0; i<11; i++) + { + bmp_constants[i] = bmp_read(0xaa + 2*i, 2); + bmp_debug("BMP: const[%d] = %04x\n", i, bmp_constants[i]); + } +} + +#endif + +enum bmp_state { + BMP_IDLE, + BMP_TEMP, + BMP_PRESSURE, +}; + +byte bmp_request; +static byte bmp_state = BMP_IDLE; +static u16 raw_temp; +static u32 raw_press; +int adjusted_temp; +int adjusted_press; +u32 bmp_counter; + +void bmp_step(void) +{ + switch (bmp_state) + { + case BMP_IDLE: + if (!bmp_request) + return; + bmp_request = 0; + bmp_debug("BMP: Start measure\n"); + bmp_start_measure(0x2e); + bmp_state++; + break; + case BMP_TEMP: + if (!LL_GPIO_IsInputPinSet(BMP_DONE_GPIO_Port, BMP_DONE_Pin)) + return; + bmp_debug("BMP: Temperature measured\n"); +#ifdef TEST_VECTOR + raw_temp = 27898; +#else + raw_temp = bmp_read(0xf6, 2); +#endif + bmp_debug("BMP: Raw temperature: %04x\n", raw_temp); + bmp_start_measure(0xf4 | (BMP_OSS<<6)); + bmp_state++; + break; + case BMP_PRESSURE: + if (!LL_GPIO_IsInputPinSet(BMP_DONE_GPIO_Port, BMP_DONE_Pin)) + return; + bmp_debug("BMP: Pressure measured\n"); +#ifdef TEST_VECTOR + raw_press = 23843 << 8; +#else + raw_press = bmp_read(0xf6, 3); +#endif + bmp_debug("BMP: Raw pressure: %06x\n", raw_press); + bmp_recalc(raw_temp, raw_press, BMP_OSS, bmp_constants, &adjusted_temp, &adjusted_press); + bmp_debug("BMP: Adjusted temp %d, press %d\n", adjusted_temp, adjusted_press); + bmp_counter++; + bmp_state = BMP_IDLE; + break; + } +} diff --git a/ssr/Src/debug.c b/ssr/Src/debug.c new file mode 100644 index 0000000..d8b3d63 --- /dev/null +++ b/ssr/Src/debug.c @@ -0,0 +1,167 @@ +#include "util.h" +#include "stm32f1xx_hal.h" + +#include +#include + +void semi_put_char(char c) +{ +#ifdef DEBUG_SEMIHOSTING + // This is tricky, we need to work around GCC bugs + volatile char cc = c; + asm volatile ( + "mov r0, #0x03\n" /* SYS_WRITEC */ + "mov r1, %[msg]\n" + "bkpt #0xAB\n" + : + : [msg] "r" (&cc) + : "r0", "r1" + ); +#endif +} + +void semi_write_string(char *c) +{ +#ifdef DEBUG_SEMIHOSTING + asm volatile ( + "mov r0, #0x04\n" /* SYS_WRITE0 */ + "mov r1, %[msg]\n" + "bkpt #0xAB\n" + : + : [msg] "r" (c) + : "r0", "r1" + ); +#endif +} + +void debug_putc(int c) +{ + static char debug_buf[128]; + static int debug_i; + debug_buf[debug_i++] = c; + if (c == '\n' || debug_i >= sizeof(debug_buf) - 1) + { + debug_buf[debug_i] = 0; + semi_write_string(debug_buf); + debug_i = 0; + } +} + +void debug_puts(const char *s) +{ + while (*s) + debug_putc(*s++); +} + +enum printf_flags { + PF_ZERO_PAD = 1, + PF_SIGNED = 2, + PF_NEGATIVE = 4, + PF_UPPERCASE = 8, + PF_LEFT = 16, +}; + +static void printf_string(const char *s, uint width, uint flags) +{ + uint len = strlen(s); + uint pad = (len < width) ? width - len : 0; + char pad_char = (flags & PF_ZERO_PAD) ? '0' : ' '; + + if (flags & PF_LEFT) + debug_puts(s); + while (pad--) + debug_putc(pad_char); + if (!(flags & PF_LEFT)) + debug_puts(s); +} + +static void printf_number(uint i, uint width, uint flags, uint base) +{ + char buf[16]; + char *w = buf + sizeof(buf); + + if (flags & PF_SIGNED) + { + if ((int) i < 0) + { + i = - (int) i; + flags |= PF_NEGATIVE; + } + } + + *--w = 0; + do + { + uint digit = i % base; + if (digit < 10) + *--w = '0' + digit; + else + *--w = ((flags & PF_UPPERCASE) ? 'A' : 'a') + digit - 10; + i /= base; + } + while (i); + + if (flags & PF_NEGATIVE) + *--w = '-'; + + printf_string(w, width, flags); +} + +void debug_printf(const char *fmt, ...) +{ + va_list args; + va_start(args, fmt); + + while (*fmt) + { + int c = *fmt++; + if (c != '%') + { + debug_putc(c); + continue; + } + + uint width = 0; + uint flags = 0; + + if (*fmt == '-') + { + fmt++; + flags |= PF_LEFT; + } + + if (*fmt == '0') + { + fmt++; + flags |= PF_ZERO_PAD; + } + + while (*fmt >= '0' && *fmt <= '9') + width = 10*width + *fmt++ - '0'; + + c = *fmt++; + switch (c) + { + case 'd': + printf_number(va_arg(args, int), width, flags | PF_SIGNED, 10); + break; + case 'u': + printf_number(va_arg(args, int), width, flags, 10); + break; + case 'X': + flags |= PF_UPPERCASE; + // fall-thru + case 'x': + printf_number(va_arg(args, int), width, flags, 16); + break; + case 's': + printf_string(va_arg(args, char *), width, flags); + break; + default: + debug_putc(c); + continue; + } + } + + va_end(args); +} diff --git a/ssr/Src/display.c b/ssr/Src/display.c new file mode 100644 index 0000000..2af6ad1 --- /dev/null +++ b/ssr/Src/display.c @@ -0,0 +1,191 @@ +#include "util.h" +#include "main.h" +#include "app.h" + +static const byte Gentium23x32[] = { + 0x17, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF8, 0x1F, 0x00, 0x80, 0xFF, 0xFF, 0x00, 0xE0, 0xFF, 0xFF, 0x03, 0xF0, 0xFF, 0xFF, 0x0F, 0xF8, 0xFF, 0xFF, 0x1F, 0xFC, 0xFF, 0xFF, 0x3F, 0xFE, 0x01, 0xE0, 0x3F, 0x3E, 0x00, 0x00, 0x7F, 0x1F, 0x00, 0x00, 0x7C, 0x0F, 0x00, 0x00, 0x78, 0x0F, 0x00, 0x00, 0x78, 0x1F, 0x00, 0x00, 0x78, 0x3F, 0x00, 0x00, 0x78, 0x7F, 0x00, 0x00, 0x3E, 0xFE, 0x07, 0xC0, 0x3F, 0xFE, 0xFF, 0xFF, 0x1F, 0xFC, 0xFF, 0xFF, 0x0F, 0xF8, 0xFF, 0xFF, 0x07, 0xE0, 0xFF, 0xFF, 0x03, 0x80, 0xFF, 0xFF, 0x00, 0x00, 0xFC, 0x0F, 0x00, // Code for char 0 + 0x16, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 0x70, 0x78, 0x00, 0x00, 0x70, 0x78, 0x00, 0x00, 0x78, 0x78, 0x00, 0x00, 0x78, 0x7C, 0x00, 0x00, 0x78, 0x3C, 0x00, 0x00, 0x78, 0xFE, 0xFF, 0xFF, 0x7F, 0xFE, 0xFF, 0xFF, 0x7F, 0xFE, 0xFF, 0xFF, 0x7F, 0xFF, 0xFF, 0xFF, 0x7F, 0xFF, 0xFF, 0xFF, 0x7F, 0xFE, 0xFF, 0xFF, 0x7F, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 0x00, 0x70, 0x00, 0x00, 0x00, 0x00, // Code for char 1 + 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x80, 0x01, 0x00, 0x78, 0xE0, 0x03, 0x00, 0x7C, 0xF0, 0x03, 0x00, 0x7E, 0xF8, 0x03, 0x80, 0x7F, 0xFC, 0x01, 0xC0, 0x7F, 0xFE, 0x01, 0xE0, 0x7F, 0x3E, 0x00, 0xF0, 0x7F, 0x1E, 0x00, 0xFC, 0x7F, 0x0F, 0x00, 0xFE, 0x79, 0x0F, 0x00, 0xFF, 0x78, 0x0F, 0xC0, 0x7F, 0x78, 0x1F, 0xE0, 0x3F, 0x78, 0x3F, 0xF8, 0x0F, 0x78, 0xFF, 0xFF, 0x07, 0x78, 0xFE, 0xFF, 0x03, 0x78, 0xFE, 0xFF, 0x00, 0x7C, 0xFC, 0x7F, 0x80, 0x7F, 0xF8, 0x1F, 0x80, 0x7F, 0xE0, 0x07, 0x80, 0x7F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // Code for char 2 + 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0xC0, 0x00, 0x00, 0x1F, 0xF0, 0x01, 0x00, 0x1E, 0xF8, 0x01, 0x00, 0x3E, 0xFC, 0x01, 0x00, 0x3C, 0xFE, 0x00, 0x00, 0x7C, 0xFE, 0x00, 0x00, 0x78, 0x1E, 0xE0, 0x00, 0x78, 0x0F, 0xF0, 0x00, 0x78, 0x0F, 0xF0, 0x00, 0x78, 0x0F, 0xF0, 0x00, 0x78, 0x1F, 0xF8, 0x01, 0x7C, 0x3F, 0xFC, 0x01, 0x7C, 0xFF, 0xFF, 0x07, 0x3F, 0xFE, 0xFF, 0xFF, 0x3F, 0xFE, 0xFF, 0xFF, 0x1F, 0xFC, 0xCF, 0xFF, 0x0F, 0xF8, 0xC7, 0xFF, 0x07, 0xE0, 0x83, 0xFF, 0x03, 0x00, 0x00, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // Code for char 3 + 0x17, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x38, 0x00, 0x00, 0x00, 0x3E, 0x00, 0x00, 0x80, 0x3F, 0x00, 0x00, 0xC0, 0x3F, 0x00, 0x00, 0xF0, 0x3F, 0x00, 0x00, 0xF8, 0x3F, 0x00, 0x00, 0xFE, 0x3D, 0x00, 0x00, 0xFF, 0x3C, 0x70, 0xC0, 0x3F, 0x3C, 0x70, 0xE0, 0x1F, 0x3C, 0x70, 0xF8, 0x07, 0x3C, 0x78, 0xFC, 0x03, 0x3C, 0x78, 0xFE, 0xFF, 0xFF, 0x7F, 0xFE, 0xFF, 0xFF, 0x7F, 0xFE, 0xFF, 0xFF, 0x7F, 0xFF, 0xFF, 0xFF, 0x7F, 0xFF, 0xFF, 0xFF, 0x7F, 0xFE, 0xFF, 0xFF, 0x7F, 0x00, 0x00, 0x3C, 0x78, 0x00, 0x00, 0x3C, 0x70, 0x00, 0x00, 0x1C, 0x70, 0x00, 0x00, 0x08, 0x00, // Code for char 4 + 0x16, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0C, 0x00, 0xC0, 0x00, 0x1F, 0x00, 0xFE, 0x01, 0x1E, 0xFC, 0xFF, 0x01, 0x3E, 0xFC, 0xFF, 0x00, 0x3C, 0xFC, 0xFF, 0x00, 0x3C, 0xFC, 0x7F, 0x00, 0x78, 0x3C, 0x78, 0x00, 0x78, 0x3C, 0x78, 0x00, 0x78, 0x3C, 0x78, 0x00, 0x78, 0x3C, 0x78, 0x00, 0x78, 0x3C, 0xF8, 0x00, 0x7C, 0x3C, 0xF8, 0x00, 0x7E, 0x3C, 0xF0, 0x03, 0x3F, 0x3C, 0xF0, 0xFF, 0x3F, 0x3C, 0xF0, 0xFF, 0x1F, 0x1E, 0xE0, 0xFF, 0x0F, 0x0F, 0xC0, 0xFF, 0x07, 0x06, 0x80, 0xFF, 0x03, 0x00, 0x00, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, // Code for char 5 + 0x17, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x7F, 0x00, 0x00, 0xF8, 0xFF, 0x01, 0x00, 0xFE, 0xFF, 0x07, 0x80, 0xFF, 0xFF, 0x0F, 0xC0, 0xFF, 0xFF, 0x1F, 0xE0, 0xFF, 0xFF, 0x3F, 0xF0, 0xFF, 0xC1, 0x3F, 0xF8, 0xF7, 0x00, 0x7E, 0xF8, 0x71, 0x00, 0x7C, 0xFC, 0x78, 0x00, 0x78, 0x7C, 0x78, 0x00, 0x78, 0x3E, 0x78, 0x00, 0x78, 0x1E, 0xF8, 0x00, 0x7C, 0x1E, 0xF8, 0x03, 0x3E, 0x0F, 0xF0, 0xFF, 0x3F, 0x0F, 0xF0, 0xFF, 0x1F, 0x0F, 0xE0, 0xFF, 0x0F, 0x06, 0xE0, 0xFF, 0x07, 0x00, 0x80, 0xFF, 0x03, 0x00, 0x00, 0x7E, 0x00, // Code for char 6 + 0x17, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xC0, 0x01, 0x00, 0x00, 0xF8, 0x01, 0x00, 0x00, 0xFC, 0x01, 0x00, 0x00, 0xFC, 0x01, 0x00, 0x20, 0x7C, 0x00, 0x00, 0x78, 0x3C, 0x00, 0x00, 0x7E, 0x3C, 0x00, 0x80, 0x7F, 0x3C, 0x00, 0xE0, 0x3F, 0x3C, 0x00, 0xF8, 0x3F, 0x3C, 0x00, 0xFE, 0x1F, 0x3C, 0x80, 0xFF, 0x0F, 0x3C, 0xE0, 0xFF, 0x01, 0x3C, 0xF8, 0x7F, 0x00, 0x3C, 0xFE, 0x0F, 0x00, 0xFC, 0xFF, 0x03, 0x00, 0xFC, 0xFF, 0x00, 0x00, 0xFC, 0x1F, 0x00, 0x00, 0xFC, 0x07, 0x00, 0x00, 0xFC, 0x01, 0x00, 0x00, 0x7C, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, // Code for char 7 + 0x16, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xF0, 0x03, 0xC0, 0x07, 0xFC, 0x07, 0xF0, 0x1F, 0xFE, 0x1F, 0xF8, 0x3F, 0xFF, 0x1F, 0xFC, 0xBF, 0xFF, 0x3F, 0xFE, 0xFF, 0xFF, 0x3F, 0xFE, 0xFF, 0x0F, 0x7E, 0x1F, 0xFE, 0x03, 0x7C, 0x0F, 0xFC, 0x01, 0x78, 0x0F, 0xF8, 0x01, 0x78, 0x0F, 0xF8, 0x01, 0x78, 0x0F, 0xF8, 0x03, 0x78, 0x1F, 0xFC, 0x07, 0x7C, 0xFF, 0xFF, 0x0F, 0x3E, 0xFE, 0xFF, 0xFF, 0x3F, 0xFE, 0xDF, 0xFF, 0x1F, 0xFC, 0xCF, 0xFF, 0x0F, 0xF8, 0x87, 0xFF, 0x07, 0xF0, 0x01, 0xFF, 0x03, 0x00, 0x00, 0xFC, 0x00, 0x00, 0x00, 0x00, 0x00, // Code for char 8 + 0x17, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3F, 0x00, 0x00, 0xC0, 0xFF, 0x00, 0x00, 0xF0, 0xFF, 0x01, 0x60, 0xF8, 0xFF, 0x03, 0xE0, 0xFC, 0xFF, 0x07, 0xF0, 0xFC, 0xFF, 0x07, 0xF0, 0x7E, 0xE0, 0x0F, 0xF8, 0x1E, 0x80, 0x0F, 0x78, 0x0F, 0x00, 0x0F, 0x7C, 0x0F, 0x00, 0x0F, 0x7C, 0x0F, 0x00, 0x0F, 0x3E, 0x0F, 0x00, 0x0F, 0x3F, 0x1F, 0x00, 0x87, 0x1F, 0x3F, 0x80, 0xE7, 0x1F, 0xFE, 0xC1, 0xFB, 0x0F, 0xFE, 0xFF, 0xFF, 0x07, 0xFC, 0xFF, 0xFF, 0x03, 0xF8, 0xFF, 0xFF, 0x01, 0xF0, 0xFF, 0x7F, 0x00, 0xC0, 0xFF, 0x1F, 0x00, 0x00, 0xFF, 0x03, 0x00, // Code for char 9 + 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xE0, 0x03, 0xC0, 0x07, 0xF0, 0x07, 0xE0, 0x0F, 0xF8, 0x07, 0xF0, 0x0F, 0xF8, 0x07, 0xF0, 0x0F, 0xF8, 0x07, 0xF0, 0x0F, 0xF8, 0x07, 0xF0, 0x0F, 0xF8, 0x03, 0xF0, 0x07, 0xF0, 0x01, 0xE0, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 // Code for char : +}; + +// Based on https://github.com/adafruit/Adafruit_SSD1306 + +#define SSD1306_SETLOWCOLUMN 0x00 +#define SSD1306_SETHIGHCOLUMN 0x10 +#define SSD1306_MEMORYMODE 0x20 +#define SSD1306_SETSTARTLINE 0x40 +#define SSD1306_SETCONTRAST 0x81 +#define SSD1306_CHARGEPUMP 0x8D +#define SSD1306_SEGREMAP 0xA0 +#define SSD1306_DISPLAYALLON_RESUME 0xA4 +#define SSD1306_DISPLAYALLON 0xA5 +#define SSD1306_NORMALDISPLAY 0xA6 +#define SSD1306_INVERTDISPLAY 0xA7 +#define SSD1306_SETMULTIPLEX 0xA8 +#define SSD1306_DISPLAYOFF 0xAE +#define SSD1306_DISPLAYON 0xAF +#define SSD1306_SETSTARTPAGE 0xB0 +#define SSD1306_COMSCANINC 0xC0 +#define SSD1306_COMSCANDEC 0xC8 +#define SSD1306_SETDISPLAYOFFSET 0xD3 +#define SSD1306_SETCOMPINS 0xDA +#define SSD1306_SETVCOMDETECT 0xDB +#define SSD1306_SETDISPLAYCLOCKDIV 0xD5 +#define SSD1306_SETPRECHARGE 0xD9 +#define SSD1306_NOP 0xE3 + +static const byte display_init_cmds[] = { + SSD1306_DISPLAYOFF, + SSD1306_SETDISPLAYCLOCKDIV, 0x80, // the suggested ratio 0x80 + SSD1306_SETMULTIPLEX, 0x1F, // ratio 32 + SSD1306_SETDISPLAYOFFSET,0x0, // no offset + SSD1306_SETSTARTLINE | 0x0, // line #0 + SSD1306_CHARGEPUMP, 0x14, // internal vcc + SSD1306_MEMORYMODE, 0x02, // page mode + SSD1306_SEGREMAP | 0x0, // column 0 mapped to SEG0 + SSD1306_COMSCANINC, // column scan direction not reversed + SSD1306_SETCOMPINS, 0x02, // sequential COM pins, disable remap + SSD1306_SETCONTRAST, 0x7F, // contrast level 127 + SSD1306_SETPRECHARGE, 0xF1, // pre-charge period (1, 15) + SSD1306_SETVCOMDETECT, 0x40, // vcomh regulator level- + SSD1306_DISPLAYALLON_RESUME, + SSD1306_NORMALDISPLAY, + SSD1306_DISPLAYON, +}; + +static void display_send_byte(byte d) +{ + while (!LL_I2C_IsActiveFlag_TXE(I2C2)) + ; + LL_I2C_TransmitData8(I2C2, d); +} + +static void display_cmd(byte cmd) +{ + LL_I2C_GenerateStartCondition(I2C2); + while (!LL_I2C_IsActiveFlag_SB(I2C2)) + ; + LL_I2C_TransmitData8(I2C2, 0x78); // Address + while (!LL_I2C_IsActiveFlag_ADDR(I2C2)) + ; + LL_I2C_ClearFlag_ADDR(I2C2); + display_send_byte(0x00); // Will send a command + display_send_byte(cmd); + while (!LL_I2C_IsActiveFlag_TXE(I2C2)) + ; + LL_I2C_GenerateStopCondition(I2C2); +} + +static void display_data_start(void) +{ + LL_I2C_GenerateStartCondition(I2C2); + while (!LL_I2C_IsActiveFlag_SB(I2C2)) + ; + LL_I2C_TransmitData8(I2C2, 0x78); // Address + while (!LL_I2C_IsActiveFlag_ADDR(I2C2)) + ; + LL_I2C_ClearFlag_ADDR(I2C2); + display_send_byte(0x40); // Will send data +} + +static void display_data(byte d) +{ + display_send_byte(d); +} + +static void display_data_end(void) +{ + while (!LL_I2C_IsActiveFlag_TXE(I2C2)) + ; + LL_I2C_GenerateStopCondition(I2C2); +} + +void display_init(void) +{ + for (uint i=0; i < sizeof(display_init_cmds); i++) + display_cmd(display_init_cmds[i]); + + for (uint p=0; p<4; p++) + { + display_cmd(SSD1306_SETSTARTPAGE + p); + display_cmd(SSD1306_SETHIGHCOLUMN); + display_cmd(SSD1306_SETLOWCOLUMN); + display_data_start(); + for (uint i=0; i<128; i++) + display_data(0); + display_data_end(); + } +} + +void display_counter(uint cnt) +{ + byte d[5]; + for (uint i=0; i<4; i++) + { + d[3-i] = cnt % 10; + cnt /= 10; + } + d[4] = d[3]; + d[3] = d[2]; + d[2] = 10; + + for (uint p=0; p<4; p++) + { + display_cmd(SSD1306_SETSTARTPAGE + p); + display_cmd(SSD1306_SETHIGHCOLUMN); + display_cmd(SSD1306_SETLOWCOLUMN); + display_data_start(); + for (uint i=0; i<5; i++) + { + for (uint j=0; j<23; j++) + { + byte x = Gentium23x32[(23*4+1)*d[i] + 1 + 4*j + p]; + display_data(x); + } + display_data(0); + display_data(0); + display_data(0); + } + display_data_end(); + } +} + +void display_buffer(byte *buf) +{ + for (uint p=0; p<4; p++) + { + display_cmd(SSD1306_SETSTARTPAGE + p); + display_cmd(SSD1306_SETHIGHCOLUMN); + display_cmd(SSD1306_SETLOWCOLUMN); + display_data_start(); + for (uint i=0; i<5; i++) + { + uint ch = buf[i]; + if (ch <= 10) + { + for (uint j=0; j<23; j++) + { + byte x = Gentium23x32[(23*4+1)*ch + 1 + 4*j + p]; + display_data(x); + } + } + else + { + for (uint j=0; j<23; j++) + display_data(0); + } + display_data(0); + display_data(0); + display_data(0); + } + display_data_end(); + } +} diff --git a/ssr/Src/main.c b/ssr/Src/main.c new file mode 100644 index 0000000..e934fa9 --- /dev/null +++ b/ssr/Src/main.c @@ -0,0 +1,458 @@ + +/** + ****************************************************************************** + * @file : main.c + * @brief : Main program body + ****************************************************************************** + ** This notice applies to any and all portions of this file + * that are not between comment pairs USER CODE BEGIN and + * USER CODE END. Other portions of this file, whether + * inserted by the user or by software development tools + * are owned by their respective copyright owners. + * + * COPYRIGHT(c) 2018 STMicroelectronics + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ +/* Includes ------------------------------------------------------------------*/ +#include "main.h" +#include "stm32f1xx_hal.h" + +/* USER CODE BEGIN Includes */ +#include "util.h" +#include "usb.h" +#include "app.h" + +#include + +/* USER CODE END Includes */ + +/* Private variables ---------------------------------------------------------*/ + +PCD_HandleTypeDef hpcd_USB_FS; + +/* USER CODE BEGIN PV */ +/* Private variables ---------------------------------------------------------*/ +struct usb usb; + +/* USER CODE END PV */ + +/* Private function prototypes -----------------------------------------------*/ +void SystemClock_Config(void); +static void MX_GPIO_Init(void); +static void MX_I2C1_Init(void); +static void MX_I2C2_Init(void); +static void MX_USB_PCD_Init(void); +static void MX_TIM4_Init(void); + +/* USER CODE BEGIN PFP */ +/* Private function prototypes -----------------------------------------------*/ + +/* USER CODE END PFP */ + +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ + +/** + * @brief The application entry point. + * + * @retval None + */ +int main(void) +{ + /* USER CODE BEGIN 1 */ + + /* USER CODE END 1 */ + + /* MCU Configuration----------------------------------------------------------*/ + + /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ + HAL_Init(); + + /* USER CODE BEGIN Init */ + + /* USER CODE END Init */ + + /* Configure the system clock */ + SystemClock_Config(); + + /* USER CODE BEGIN SysInit */ + usb_init(&usb, &hpcd_USB_FS); + + /* USER CODE END SysInit */ + + /* Initialize all configured peripherals */ + MX_GPIO_Init(); + + // A hack to let USB host reset us + LL_GPIO_InitTypeDef gpio; + gpio.Pin = LL_GPIO_PIN_12 | LL_GPIO_PIN_13; + gpio.Mode = LL_GPIO_MODE_OUTPUT; + gpio.Speed = LL_GPIO_SPEED_FREQ_HIGH; + gpio.OutputType = LL_GPIO_OUTPUT_OPENDRAIN; + LL_GPIO_Init(GPIOA, &gpio); + LL_GPIO_ResetOutputPin(GPIOA, LL_GPIO_PIN_12); + LL_GPIO_ResetOutputPin(GPIOA, LL_GPIO_PIN_13); + LL_mDelay(1000); + + MX_I2C1_Init(); + MX_I2C2_Init(); + MX_USB_PCD_Init(); + MX_TIM4_Init(); + /* USER CODE BEGIN 2 */ + display_init(); + usb_start(&usb); + bmp_init(); + + LL_TIM_EnableCounter(TIM4); + LL_TIM_EnableIT_UPDATE(TIM4); + LL_TIM_GenerateEvent_UPDATE(TIM4); + + { + byte buf[5] = { 0xff, 0xff, 10, 0xff, 0xff }; + display_buffer(buf); + } + + /* USER CODE END 2 */ + + /* Infinite loop */ + /* USER CODE BEGIN WHILE */ + while (1) + { + if (rx_packet_state == 1 && !tx_packet_state) + { + static byte led_state; + if (led_state) + LL_GPIO_SetOutputPin(LED_GPIO_Port, LED_Pin); + else + LL_GPIO_ResetOutputPin(LED_GPIO_Port, LED_Pin); + led_state ^= 1; + + display_buffer(rx_packet); + tx_packet_state = 1; + put_u32_be(tx_packet, adjusted_temp); + put_u32_be(tx_packet + 4, adjusted_press); + put_u32_be(tx_packet + 8, bmp_counter); + usb_ep_send(&usb, 0x82, tx_packet, 12); + rx_packet_state = 0; + usb_ep_receive(&usb, 0x01, rx_packet, 64); + bmp_request = 1; + } + + bmp_step(); + + // debug_printf("Counter = %d\n", cnt); + // display_counter(cnt); + + __WFI(); + + /* USER CODE END WHILE */ + + /* USER CODE BEGIN 3 */ + + } + /* USER CODE END 3 */ + +} + +/** + * @brief System Clock Configuration + * @retval None + */ +void SystemClock_Config(void) +{ + + LL_FLASH_SetLatency(LL_FLASH_LATENCY_2); + + if(LL_FLASH_GetLatency() != LL_FLASH_LATENCY_2) + { + Error_Handler(); + } + LL_RCC_HSE_Enable(); + + /* Wait till HSE is ready */ + while(LL_RCC_HSE_IsReady() != 1) + { + + } + LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE_DIV_1, LL_RCC_PLL_MUL_9); + + LL_RCC_PLL_Enable(); + + /* Wait till PLL is ready */ + while(LL_RCC_PLL_IsReady() != 1) + { + + } + LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1); + + LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_2); + + LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1); + + LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL); + + /* Wait till System clock is ready */ + while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL) + { + + } + LL_Init1msTick(72000000); + + LL_SYSTICK_SetClkSource(LL_SYSTICK_CLKSOURCE_HCLK); + + LL_SetSystemCoreClock(72000000); + + LL_RCC_SetUSBClockSource(LL_RCC_USB_CLKSOURCE_PLL_DIV_1_5); + + /* SysTick_IRQn interrupt configuration */ + NVIC_SetPriority(SysTick_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); +} + +/* I2C1 init function */ +static void MX_I2C1_Init(void) +{ + + LL_I2C_InitTypeDef I2C_InitStruct; + + LL_GPIO_InitTypeDef GPIO_InitStruct; + + /**I2C1 GPIO Configuration + PB6 ------> I2C1_SCL + PB7 ------> I2C1_SDA + */ + GPIO_InitStruct.Pin = LL_GPIO_PIN_6|LL_GPIO_PIN_7; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_OPENDRAIN; + LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /* Peripheral clock enable */ + LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C1); + + /* I2C1 interrupt Init */ + NVIC_SetPriority(I2C1_EV_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); + NVIC_EnableIRQ(I2C1_EV_IRQn); + + /**I2C Initialization + */ + I2C_InitStruct.PeripheralMode = LL_I2C_MODE_I2C; + I2C_InitStruct.ClockSpeed = 400000; + I2C_InitStruct.DutyCycle = LL_I2C_DUTYCYCLE_2; + I2C_InitStruct.OwnAddress1 = 0; + I2C_InitStruct.TypeAcknowledge = LL_I2C_ACK; + I2C_InitStruct.OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT; + LL_I2C_Init(I2C1, &I2C_InitStruct); + + LL_I2C_SetOwnAddress2(I2C1, 0); + + LL_I2C_DisableOwnAddress2(I2C1); + + LL_I2C_DisableGeneralCall(I2C1); + + LL_I2C_EnableClockStretching(I2C1); + +} + +/* I2C2 init function */ +static void MX_I2C2_Init(void) +{ + + LL_I2C_InitTypeDef I2C_InitStruct; + + LL_GPIO_InitTypeDef GPIO_InitStruct; + + /**I2C2 GPIO Configuration + PB10 ------> I2C2_SCL + PB11 ------> I2C2_SDA + */ + GPIO_InitStruct.Pin = LL_GPIO_PIN_10|LL_GPIO_PIN_11; + GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_OPENDRAIN; + LL_GPIO_Init(GPIOB, &GPIO_InitStruct); + + /* Peripheral clock enable */ + LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C2); + + /**I2C Initialization + */ + I2C_InitStruct.PeripheralMode = LL_I2C_MODE_I2C; + I2C_InitStruct.ClockSpeed = 400000; + I2C_InitStruct.DutyCycle = LL_I2C_DUTYCYCLE_2; + I2C_InitStruct.OwnAddress1 = 0; + I2C_InitStruct.TypeAcknowledge = LL_I2C_ACK; + I2C_InitStruct.OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT; + LL_I2C_Init(I2C2, &I2C_InitStruct); + + LL_I2C_SetOwnAddress2(I2C2, 0); + + LL_I2C_DisableOwnAddress2(I2C2); + + LL_I2C_DisableGeneralCall(I2C2); + + LL_I2C_EnableClockStretching(I2C2); + +} + +/* TIM4 init function */ +static void MX_TIM4_Init(void) +{ + + LL_TIM_InitTypeDef TIM_InitStruct; + LL_TIM_OC_InitTypeDef TIM_OC_InitStruct; + + /* Peripheral clock enable */ + LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM4); + + /* TIM4 interrupt Init */ + NVIC_SetPriority(TIM4_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),0, 0)); + NVIC_EnableIRQ(TIM4_IRQn); + + TIM_InitStruct.Prescaler = 7200; + TIM_InitStruct.CounterMode = LL_TIM_COUNTERMODE_UP; + TIM_InitStruct.Autoreload = 1000; + TIM_InitStruct.ClockDivision = LL_TIM_CLOCKDIVISION_DIV1; + LL_TIM_Init(TIM4, &TIM_InitStruct); + + LL_TIM_DisableARRPreload(TIM4); + + LL_TIM_SetClockSource(TIM4, LL_TIM_CLOCKSOURCE_INTERNAL); + + TIM_OC_InitStruct.OCMode = LL_TIM_OCMODE_FROZEN; + TIM_OC_InitStruct.OCState = LL_TIM_OCSTATE_DISABLE; + TIM_OC_InitStruct.OCNState = LL_TIM_OCSTATE_DISABLE; + TIM_OC_InitStruct.CompareValue = 0; + TIM_OC_InitStruct.OCPolarity = LL_TIM_OCPOLARITY_HIGH; + LL_TIM_OC_Init(TIM4, LL_TIM_CHANNEL_CH1, &TIM_OC_InitStruct); + + LL_TIM_OC_DisableFast(TIM4, LL_TIM_CHANNEL_CH1); + + LL_TIM_SetTriggerOutput(TIM4, LL_TIM_TRGO_RESET); + + LL_TIM_DisableMasterSlaveMode(TIM4); + +} + +/* USB init function */ +static void MX_USB_PCD_Init(void) +{ + + hpcd_USB_FS.Instance = USB; + hpcd_USB_FS.Init.dev_endpoints = 8; + hpcd_USB_FS.Init.speed = PCD_SPEED_FULL; + hpcd_USB_FS.Init.ep0_mps = DEP0CTL_MPS_64; + hpcd_USB_FS.Init.low_power_enable = DISABLE; + hpcd_USB_FS.Init.lpm_enable = DISABLE; + hpcd_USB_FS.Init.battery_charging_enable = DISABLE; + if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK) + { + _Error_Handler(__FILE__, __LINE__); + } + +} + +/** Configure pins as + * Analog + * Input + * Output + * EVENT_OUT + * EXTI +*/ +static void MX_GPIO_Init(void) +{ + + LL_GPIO_InitTypeDef GPIO_InitStruct; + + /* GPIO Ports Clock Enable */ + LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOC); + LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOD); + LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOB); + LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA); + + /**/ + LL_GPIO_ResetOutputPin(LED_GPIO_Port, LED_Pin); + + /**/ + GPIO_InitStruct.Pin = LED_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT; + GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_HIGH; + GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_OPENDRAIN; + LL_GPIO_Init(LED_GPIO_Port, &GPIO_InitStruct); + + /**/ + GPIO_InitStruct.Pin = BMP_DONE_Pin; + GPIO_InitStruct.Mode = LL_GPIO_MODE_FLOATING; + LL_GPIO_Init(BMP_DONE_GPIO_Port, &GPIO_InitStruct); + +} + +/* USER CODE BEGIN 4 */ + +/* USER CODE END 4 */ + +/** + * @brief This function is executed in case of error occurrence. + * @param file: The file name as string. + * @param line: The line in file as a number. + * @retval None + */ +void _Error_Handler(char *file, int line) +{ + /* USER CODE BEGIN Error_Handler_Debug */ + /* User can add his own implementation to report the HAL error return state */ + while(1) + { + } + /* USER CODE END Error_Handler_Debug */ +} + +#ifdef USE_FULL_ASSERT +/** + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(uint8_t* file, uint32_t line) +{ + /* USER CODE BEGIN 6 */ + /* User can add his own implementation to report the file name and line number, + tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + /* USER CODE END 6 */ +} +#endif /* USE_FULL_ASSERT */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ssr/Src/stm32f1xx_hal_msp.c b/ssr/Src/stm32f1xx_hal_msp.c new file mode 100644 index 0000000..217a826 --- /dev/null +++ b/ssr/Src/stm32f1xx_hal_msp.c @@ -0,0 +1,139 @@ +/** + ****************************************************************************** + * File Name : stm32f1xx_hal_msp.c + * Description : This file provides code for the MSP Initialization + * and de-Initialization codes. + ****************************************************************************** + ** This notice applies to any and all portions of this file + * that are not between comment pairs USER CODE BEGIN and + * USER CODE END. Other portions of this file, whether + * inserted by the user or by software development tools + * are owned by their respective copyright owners. + * + * COPYRIGHT(c) 2018 STMicroelectronics + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ +/* Includes ------------------------------------------------------------------*/ +#include "stm32f1xx_hal.h" + +extern void _Error_Handler(char *, int); +/* USER CODE BEGIN 0 */ + +/* USER CODE END 0 */ +/** + * Initializes the Global MSP. + */ +void HAL_MspInit(void) +{ + /* USER CODE BEGIN MspInit 0 */ + + /* USER CODE END MspInit 0 */ + + __HAL_RCC_AFIO_CLK_ENABLE(); + + HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); + + /* System interrupt init*/ + /* MemoryManagement_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(MemoryManagement_IRQn, 0, 0); + /* BusFault_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(BusFault_IRQn, 0, 0); + /* UsageFault_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(UsageFault_IRQn, 0, 0); + /* SVCall_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(SVCall_IRQn, 0, 0); + /* DebugMonitor_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(DebugMonitor_IRQn, 0, 0); + /* PendSV_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(PendSV_IRQn, 0, 0); + /* SysTick_IRQn interrupt configuration */ + HAL_NVIC_SetPriority(SysTick_IRQn, 0, 0); + + /**NOJTAG: JTAG-DP Disabled and SW-DP Enabled + */ + __HAL_AFIO_REMAP_SWJ_NOJTAG(); + + /* USER CODE BEGIN MspInit 1 */ + + /* USER CODE END MspInit 1 */ +} + +void HAL_PCD_MspInit(PCD_HandleTypeDef* hpcd) +{ + + if(hpcd->Instance==USB) + { + /* USER CODE BEGIN USB_MspInit 0 */ + + /* USER CODE END USB_MspInit 0 */ + /* Peripheral clock enable */ + __HAL_RCC_USB_CLK_ENABLE(); + /* USB interrupt Init */ + HAL_NVIC_SetPriority(USB_HP_CAN1_TX_IRQn, 15, 0); + HAL_NVIC_EnableIRQ(USB_HP_CAN1_TX_IRQn); + HAL_NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, 15, 0); + HAL_NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn); + /* USER CODE BEGIN USB_MspInit 1 */ + + /* USER CODE END USB_MspInit 1 */ + } + +} + +void HAL_PCD_MspDeInit(PCD_HandleTypeDef* hpcd) +{ + + if(hpcd->Instance==USB) + { + /* USER CODE BEGIN USB_MspDeInit 0 */ + + /* USER CODE END USB_MspDeInit 0 */ + /* Peripheral clock disable */ + __HAL_RCC_USB_CLK_DISABLE(); + + /* USB interrupt DeInit */ + HAL_NVIC_DisableIRQ(USB_HP_CAN1_TX_IRQn); + HAL_NVIC_DisableIRQ(USB_LP_CAN1_RX0_IRQn); + /* USER CODE BEGIN USB_MspDeInit 1 */ + + /* USER CODE END USB_MspDeInit 1 */ + } + +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ssr/Src/stm32f1xx_it.c b/ssr/Src/stm32f1xx_it.c new file mode 100644 index 0000000..c571e46 --- /dev/null +++ b/ssr/Src/stm32f1xx_it.c @@ -0,0 +1,306 @@ +/** + ****************************************************************************** + * @file stm32f1xx_it.c + * @brief Interrupt Service Routines. + ****************************************************************************** + * + * COPYRIGHT(c) 2018 STMicroelectronics + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ +/* Includes ------------------------------------------------------------------*/ +#include "stm32f1xx_hal.h" +#include "stm32f1xx.h" +#include "stm32f1xx_it.h" + +/* USER CODE BEGIN 0 */ +#include "util.h" +#include "app.h" + +/* USER CODE END 0 */ + +/* External variables --------------------------------------------------------*/ +extern PCD_HandleTypeDef hpcd_USB_FS; + +/******************************************************************************/ +/* Cortex-M3 Processor Interruption and Exception Handlers */ +/******************************************************************************/ + +/** +* @brief This function handles Non maskable interrupt. +*/ +void NMI_Handler(void) +{ + /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ + + /* USER CODE END NonMaskableInt_IRQn 0 */ + /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ + + /* USER CODE END NonMaskableInt_IRQn 1 */ +} + +/** +* @brief This function handles Hard fault interrupt. +*/ +void HardFault_Handler(void) +{ + /* USER CODE BEGIN HardFault_IRQn 0 */ + + /* USER CODE END HardFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_HardFault_IRQn 0 */ + /* USER CODE END W1_HardFault_IRQn 0 */ + } + /* USER CODE BEGIN HardFault_IRQn 1 */ + + /* USER CODE END HardFault_IRQn 1 */ +} + +/** +* @brief This function handles Memory management fault. +*/ +void MemManage_Handler(void) +{ + /* USER CODE BEGIN MemoryManagement_IRQn 0 */ + + /* USER CODE END MemoryManagement_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */ + /* USER CODE END W1_MemoryManagement_IRQn 0 */ + } + /* USER CODE BEGIN MemoryManagement_IRQn 1 */ + + /* USER CODE END MemoryManagement_IRQn 1 */ +} + +/** +* @brief This function handles Prefetch fault, memory access fault. +*/ +void BusFault_Handler(void) +{ + /* USER CODE BEGIN BusFault_IRQn 0 */ + + /* USER CODE END BusFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_BusFault_IRQn 0 */ + /* USER CODE END W1_BusFault_IRQn 0 */ + } + /* USER CODE BEGIN BusFault_IRQn 1 */ + + /* USER CODE END BusFault_IRQn 1 */ +} + +/** +* @brief This function handles Undefined instruction or illegal state. +*/ +void UsageFault_Handler(void) +{ + /* USER CODE BEGIN UsageFault_IRQn 0 */ + + /* USER CODE END UsageFault_IRQn 0 */ + while (1) + { + /* USER CODE BEGIN W1_UsageFault_IRQn 0 */ + /* USER CODE END W1_UsageFault_IRQn 0 */ + } + /* USER CODE BEGIN UsageFault_IRQn 1 */ + + /* USER CODE END UsageFault_IRQn 1 */ +} + +/** +* @brief This function handles System service call via SWI instruction. +*/ +void SVC_Handler(void) +{ + /* USER CODE BEGIN SVCall_IRQn 0 */ + + /* USER CODE END SVCall_IRQn 0 */ + /* USER CODE BEGIN SVCall_IRQn 1 */ + + /* USER CODE END SVCall_IRQn 1 */ +} + +/** +* @brief This function handles Debug monitor. +*/ +void DebugMon_Handler(void) +{ + /* USER CODE BEGIN DebugMonitor_IRQn 0 */ + + /* USER CODE END DebugMonitor_IRQn 0 */ + /* USER CODE BEGIN DebugMonitor_IRQn 1 */ + + /* USER CODE END DebugMonitor_IRQn 1 */ +} + +/** +* @brief This function handles Pendable request for system service. +*/ +void PendSV_Handler(void) +{ + /* USER CODE BEGIN PendSV_IRQn 0 */ + + /* USER CODE END PendSV_IRQn 0 */ + /* USER CODE BEGIN PendSV_IRQn 1 */ + + /* USER CODE END PendSV_IRQn 1 */ +} + +/** +* @brief This function handles System tick timer. +*/ +void SysTick_Handler(void) +{ + /* USER CODE BEGIN SysTick_IRQn 0 */ + + /* USER CODE END SysTick_IRQn 0 */ + HAL_IncTick(); + HAL_SYSTICK_IRQHandler(); + /* USER CODE BEGIN SysTick_IRQn 1 */ + + /* USER CODE END SysTick_IRQn 1 */ +} + +/******************************************************************************/ +/* STM32F1xx Peripheral Interrupt Handlers */ +/* Add here the Interrupt Handlers for the used peripherals. */ +/* For the available peripheral interrupt handler names, */ +/* please refer to the startup file (startup_stm32f1xx.s). */ +/******************************************************************************/ + +/** +* @brief This function handles USB high priority or CAN TX interrupts. +*/ +void USB_HP_CAN1_TX_IRQHandler(void) +{ + /* USER CODE BEGIN USB_HP_CAN1_TX_IRQn 0 */ + + /* USER CODE END USB_HP_CAN1_TX_IRQn 0 */ + HAL_PCD_IRQHandler(&hpcd_USB_FS); + /* USER CODE BEGIN USB_HP_CAN1_TX_IRQn 1 */ + + /* USER CODE END USB_HP_CAN1_TX_IRQn 1 */ +} + +/** +* @brief This function handles USB low priority or CAN RX0 interrupts. +*/ +void USB_LP_CAN1_RX0_IRQHandler(void) +{ + /* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 0 */ + + /* USER CODE END USB_LP_CAN1_RX0_IRQn 0 */ + HAL_PCD_IRQHandler(&hpcd_USB_FS); + /* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 1 */ + + /* USER CODE END USB_LP_CAN1_RX0_IRQn 1 */ +} + +/** +* @brief This function handles TIM4 global interrupt. +*/ +void TIM4_IRQHandler(void) +{ + /* USER CODE BEGIN TIM4_IRQn 0 */ + if (LL_TIM_IsActiveFlag_UPDATE(TIM4)) + { + // FIXME + LL_TIM_ClearFlag_UPDATE(TIM4); + } + + /* USER CODE END TIM4_IRQn 0 */ + /* USER CODE BEGIN TIM4_IRQn 1 */ + + /* USER CODE END TIM4_IRQn 1 */ +} + +/** +* @brief This function handles I2C1 event interrupt. +*/ +void I2C1_EV_IRQHandler(void) +{ + /* USER CODE BEGIN I2C1_EV_IRQn 0 */ + u32 sr1 = I2C1->SR1; + if (sr1 & I2C_SR1_SB) + LL_I2C_TransmitData8(I2C1, bmp_i2c_addr); + else if (bmp_i2c_addr & 1) + { + // Receive + if (sr1 & I2C_SR1_ADDR) + { + LL_I2C_DisableBitPOS(I2C1); + if (bmp_i2c_len == 1) + LL_I2C_AcknowledgeNextData(I2C1, LL_I2C_NACK); + LL_I2C_AcknowledgeNextData(I2C1, LL_I2C_ACK); + LL_I2C_ClearFlag_ADDR(I2C1); + } + else if (sr1 & I2C_SR1_RXNE) + { + if (bmp_i2c_len > 0) + { + if (bmp_i2c_len == 1) + { + LL_I2C_AcknowledgeNextData(I2C1, LL_I2C_NACK); + LL_I2C_GenerateStopCondition(I2C1); + } + *bmp_i2c_ptr++ = LL_I2C_ReceiveData8(I2C1); + bmp_i2c_len--; + } + else + LL_I2C_DisableIT_RX(I2C1); + } + } + else + { + // Transmit + if (sr1 & I2C_SR1_ADDR) + LL_I2C_ClearFlag_ADDR(I2C1); + else if (sr1 & I2C_SR1_TXE) + { + if (bmp_i2c_len) + { + LL_I2C_TransmitData8(I2C1, *bmp_i2c_ptr++); + bmp_i2c_len--; + } + else + LL_I2C_DisableIT_TX(I2C1); + } + } + + /* USER CODE END I2C1_EV_IRQn 0 */ + + /* USER CODE BEGIN I2C1_EV_IRQn 1 */ + + /* USER CODE END I2C1_EV_IRQn 1 */ +} + +/* USER CODE BEGIN 1 */ + +/* USER CODE END 1 */ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ssr/Src/system_stm32f1xx.c b/ssr/Src/system_stm32f1xx.c new file mode 100644 index 0000000..af3759a --- /dev/null +++ b/ssr/Src/system_stm32f1xx.c @@ -0,0 +1,448 @@ +/** + ****************************************************************************** + * @file system_stm32f1xx.c + * @author MCD Application Team + * @version V4.2.0 + * @date 31-March-2017 + * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File. + * + * 1. This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier + * factors, AHB/APBx prescalers and Flash settings). + * This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32f1xx_xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * 2. After each device reset the HSI (8 MHz) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to + * configure the system clock before to branch to main program. + * + * 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on + * the product used), refer to "HSE_VALUE". + * When HSE is used as system clock source, directly or through PLL, and you + * are using different crystal you have to adapt the HSE value to your own + * configuration. + * + ****************************************************************************** + * @attention + * + *

© COPYRIGHT(c) 2017 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32f1xx_system + * @{ + */ + +/** @addtogroup STM32F1xx_System_Private_Includes + * @{ + */ + +#include "stm32f1xx.h" + +/** + * @} + */ + +/** @addtogroup STM32F1xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F1xx_System_Private_Defines + * @{ + */ + +#if !defined (HSE_VALUE) + #define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz. + This value can be provided and adapted by the user application. */ +#endif /* HSE_VALUE */ + +#if !defined (HSI_VALUE) + #define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz. + This value can be provided and adapted by the user application. */ +#endif /* HSI_VALUE */ + +/*!< Uncomment the following line if you need to use external SRAM */ +#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG) +/* #define DATA_IN_ExtSRAM */ +#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */ + +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ + + +/** + * @} + */ + +/** @addtogroup STM32F1xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F1xx_System_Private_Variables + * @{ + */ + +/******************************************************************************* +* Clock Definitions +*******************************************************************************/ +#if defined(STM32F100xB) ||defined(STM32F100xE) + uint32_t SystemCoreClock = 24000000U; /*!< System Clock Frequency (Core Clock) */ +#else /*!< HSI Selected as System Clock source */ + uint32_t SystemCoreClock = 72000000U; /*!< System Clock Frequency (Core Clock) */ +#endif + +const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; +const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4}; + +/** + * @} + */ + +/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes + * @{ + */ + +#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG) +#ifdef DATA_IN_ExtSRAM + static void SystemInit_ExtMemCtl(void); +#endif /* DATA_IN_ExtSRAM */ +#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */ + +/** + * @} + */ + +/** @addtogroup STM32F1xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system + * Initialize the Embedded Flash Interface, the PLL and update the + * SystemCoreClock variable. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +void SystemInit (void) +{ + /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ + /* Set HSION bit */ + RCC->CR |= 0x00000001U; + + /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ +#if !defined(STM32F105xC) && !defined(STM32F107xC) + RCC->CFGR &= 0xF8FF0000U; +#else + RCC->CFGR &= 0xF0FF0000U; +#endif /* STM32F105xC */ + + /* Reset HSEON, CSSON and PLLON bits */ + RCC->CR &= 0xFEF6FFFFU; + + /* Reset HSEBYP bit */ + RCC->CR &= 0xFFFBFFFFU; + + /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ + RCC->CFGR &= 0xFF80FFFFU; + +#if defined(STM32F105xC) || defined(STM32F107xC) + /* Reset PLL2ON and PLL3ON bits */ + RCC->CR &= 0xEBFFFFFFU; + + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x00FF0000U; + + /* Reset CFGR2 register */ + RCC->CFGR2 = 0x00000000U; +#elif defined(STM32F100xB) || defined(STM32F100xE) + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x009F0000U; + + /* Reset CFGR2 register */ + RCC->CFGR2 = 0x00000000U; +#else + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x009F0000U; +#endif /* STM32F105xC */ + +#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG) + #ifdef DATA_IN_ExtSRAM + SystemInit_ExtMemCtl(); + #endif /* DATA_IN_ExtSRAM */ +#endif + +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + * or HSI_VALUE(*) multiplied by the PLL factors. + * + * (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value + * 8 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value + * 8 MHz or 25 MHz, depending on the product used), user has to ensure + * that HSE_VALUE is same as the real frequency of the crystal used. + * Otherwise, this function may have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * @param None + * @retval None + */ +void SystemCoreClockUpdate (void) +{ + uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U; + +#if defined(STM32F105xC) || defined(STM32F107xC) + uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U; +#endif /* STM32F105xC */ + +#if defined(STM32F100xB) || defined(STM32F100xE) + uint32_t prediv1factor = 0U; +#endif /* STM32F100xB or STM32F100xE */ + + /* Get SYSCLK source -------------------------------------------------------*/ + tmp = RCC->CFGR & RCC_CFGR_SWS; + + switch (tmp) + { + case 0x00U: /* HSI used as system clock */ + SystemCoreClock = HSI_VALUE; + break; + case 0x04U: /* HSE used as system clock */ + SystemCoreClock = HSE_VALUE; + break; + case 0x08U: /* PLL used as system clock */ + + /* Get PLL clock source and multiplication factor ----------------------*/ + pllmull = RCC->CFGR & RCC_CFGR_PLLMULL; + pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + +#if !defined(STM32F105xC) && !defined(STM32F107xC) + pllmull = ( pllmull >> 18U) + 2U; + + if (pllsource == 0x00U) + { + /* HSI oscillator clock divided by 2 selected as PLL clock entry */ + SystemCoreClock = (HSI_VALUE >> 1U) * pllmull; + } + else + { + #if defined(STM32F100xB) || defined(STM32F100xE) + prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U; + /* HSE oscillator clock selected as PREDIV1 clock entry */ + SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; + #else + /* HSE selected as PLL clock entry */ + if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET) + {/* HSE oscillator clock divided by 2 */ + SystemCoreClock = (HSE_VALUE >> 1U) * pllmull; + } + else + { + SystemCoreClock = HSE_VALUE * pllmull; + } + #endif + } +#else + pllmull = pllmull >> 18U; + + if (pllmull != 0x0DU) + { + pllmull += 2U; + } + else + { /* PLL multiplication factor = PLL input clock * 6.5 */ + pllmull = 13U / 2U; + } + + if (pllsource == 0x00U) + { + /* HSI oscillator clock divided by 2 selected as PLL clock entry */ + SystemCoreClock = (HSI_VALUE >> 1U) * pllmull; + } + else + {/* PREDIV1 selected as PLL clock entry */ + + /* Get PREDIV1 clock source and division factor */ + prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC; + prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U; + + if (prediv1source == 0U) + { + /* HSE oscillator clock selected as PREDIV1 clock entry */ + SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; + } + else + {/* PLL2 clock selected as PREDIV1 clock entry */ + + /* Get PREDIV2 division factor and PLL2 multiplication factor */ + prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U; + pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U; + SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull; + } + } +#endif /* STM32F105xC */ + break; + + default: + SystemCoreClock = HSI_VALUE; + break; + } + + /* Compute HCLK clock frequency ----------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + +#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG) +/** + * @brief Setup the external memory controller. Called in startup_stm32f1xx.s + * before jump to __main + * @param None + * @retval None + */ +#ifdef DATA_IN_ExtSRAM +/** + * @brief Setup the external memory controller. + * Called in startup_stm32f1xx_xx.s/.c before jump to main. + * This function configures the external SRAM mounted on STM3210E-EVAL + * board (STM32 High density devices). This SRAM will be used as program + * data memory (including heap and stack). + * @param None + * @retval None + */ +void SystemInit_ExtMemCtl(void) +{ + __IO uint32_t tmpreg; + /*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is + required, then adjust the Register Addresses */ + + /* Enable FSMC clock */ + RCC->AHBENR = 0x00000114U; + + /* Delay after an RCC peripheral clock enabling */ + tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN); + + /* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */ + RCC->APB2ENR = 0x000001E0U; + + /* Delay after an RCC peripheral clock enabling */ + tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN); + + (void)(tmpreg); + +/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/ +/*---------------- SRAM Address lines configuration -------------------------*/ +/*---------------- NOE and NWE configuration --------------------------------*/ +/*---------------- NE3 configuration ----------------------------------------*/ +/*---------------- NBL0, NBL1 configuration ---------------------------------*/ + + GPIOD->CRL = 0x44BB44BBU; + GPIOD->CRH = 0xBBBBBBBBU; + + GPIOE->CRL = 0xB44444BBU; + GPIOE->CRH = 0xBBBBBBBBU; + + GPIOF->CRL = 0x44BBBBBBU; + GPIOF->CRH = 0xBBBB4444U; + + GPIOG->CRL = 0x44BBBBBBU; + GPIOG->CRH = 0x444B4B44U; + +/*---------------- FSMC Configuration ---------------------------------------*/ +/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/ + + FSMC_Bank1->BTCR[4U] = 0x00001091U; + FSMC_Bank1->BTCR[5U] = 0x00110212U; +} +#endif /* DATA_IN_ExtSRAM */ +#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/ssr/Src/usb.c b/ssr/Src/usb.c new file mode 100644 index 0000000..f7b92a6 --- /dev/null +++ b/ssr/Src/usb.c @@ -0,0 +1,550 @@ +#include "stm32f1xx.h" +#include "stm32f1xx_hal.h" + +#include "util.h" +#include "usb.h" + +#include + +// Layout of packet memory +#define PMA_EP00 0x18 +#define PMA_EP80 0x58 +#define PMA_USER 0x98 + +void usb_init(struct usb *usb, PCD_HandleTypeDef *hpcd) +{ + memset(usb, 0, sizeof(*usb)); + usb->hpcd = hpcd; + usb->state = USB_STATE_DEFAULT; + usb->ep0_state = USB_EP0_IDLE; + hpcd->pData = usb; +} + +void usb_start(struct usb *usb) +{ + HAL_PCDEx_PMAConfig(usb->hpcd, 0x00, PCD_SNG_BUF, PMA_EP00); + HAL_PCDEx_PMAConfig(usb->hpcd, 0x80, PCD_SNG_BUF, PMA_EP80); + + HAL_PCD_Start(usb->hpcd); +} + +void usb_ctl_send_status(struct usb *usb) +{ + usb_debug("Control send: status\n"); + usb->ep0_state = USB_EP0_STATUS_IN; + usb_ep_send(usb, 0x00, NULL, 0); +} + +void usb_ctl_recv_status(struct usb *usb) +{ + usb->ep0_state = USB_EP0_STATUS_OUT; + usb_ep_receive(usb, 0x00, NULL, 0); +} + +void usb_ctl_send_data(struct usb *usb, const byte *data, uint len) +{ + usb_debug("Control send: %u bytes\n", len); + usb->ep0_state = USB_EP0_DATA_IN; + usb->ep0_total_length = len; + usb->ep0_remaining_length = len; + usb_ep_send(usb, 0x00, data, len); +} + +void usb_ctl_recv_data(struct usb *usb, byte *data, uint len) +{ + usb_debug("Control recv: %u bytes\n", len); + usb->ep0_state = USB_EP0_DATA_OUT; + usb->ep0_total_length = len; + usb->ep0_remaining_length = len; + usb_ep_send(usb, 0x00, data, len); +} + +static void usb_ctl_send_byte(struct usb *usb, byte data) +{ + usb->ep0_buf[0] = data; + usb_ctl_send_data(usb, usb->ep0_buf, 1); +} + +static void usb_ctl_send_u16(struct usb *usb, u16 data) +{ + put_u16_le(usb->ep0_buf, data); + usb_ctl_send_data(usb, usb->ep0_buf, 2); +} + +void usb_ctl_error(struct usb *usb) +{ + usb_debug("Control packet error\n"); + usb_ep_stall(usb, 0x00); + usb_ep_stall(usb, 0x80); +} + +void usb_ctl_setup_error(struct usb *usb, struct setup_request *setup) +{ + usb_debug("Setup packet error\n"); + usb_ep_stall(usb, setup->bmRequest & USB_REQ_DIRECTION); +} + +static void dev_get_status(struct usb *usb, struct setup_request *setup) +{ + if ((usb->state != USB_STATE_ADDRESSED && usb->state != USB_STATE_CONFIGURED) || + setup->wValue || setup->wIndex || setup->wLength != 2) + return usb_ctl_error(usb); + + uint stat = 0; +#ifdef USB_SELF_POWERED + stat |= USB_DEV_STATUS_SELF_POWERED; +#endif + if (usb->remote_wakeup) + stat |= USB_DEV_STATUS_REMOTE_WAKEUP; + usb_ctl_send_u16(usb, stat); +} + +static void dev_clear_feature(struct usb *usb, struct setup_request *setup) +{ + if (setup->wIndex || setup->wLength) + return usb_ctl_error(usb); + + if (setup->wValue == USB_FEATURE_REMOTE_WAKEUP) + { + usb->remote_wakeup = 0; + usb_ctl_send_status(usb); + } + else + usb_ctl_error(usb); +} + +static void dev_set_feature(struct usb *usb, struct setup_request *setup) +{ + if (setup->wIndex || setup->wLength) + return usb_ctl_error(usb); + + if (setup->wValue == USB_FEATURE_REMOTE_WAKEUP) + { + usb->remote_wakeup = 1; + usb_ctl_send_status(usb); + } + else + usb_ctl_error(usb); +} + +static void dev_set_address(struct usb *usb, struct setup_request *setup) +{ + if (setup->wIndex || setup->wLength) + return usb_ctl_error(usb); + + uint addr = setup->wValue & 0x7f; + if (usb->state == USB_STATE_CONFIGURED) + usb_ctl_error(usb); + else + { + usb->address = addr; + HAL_PCD_SetAddress(usb->hpcd, addr); + usb_ctl_send_status(usb); + usb->state = addr ? USB_STATE_ADDRESSED : USB_STATE_DEFAULT; + } +} + +static void dev_desc_send(struct usb *usb, struct setup_request *setup, const byte *desc, uint len) +{ + len = MIN(len, setup->wLength); + if (len) + usb_ctl_send_data(usb, desc, len); +} + +static void dev_desc_send_string(struct usb *usb, struct setup_request *setup, const char *str) +{ + byte *buf = usb->ep0_buf; + uint len = strlen(str); + uint i = 0; + + buf[i++] = 2*len + 2; + buf[i++] = USB_DESC_TYPE_STRING; + + while (i <= USB_EP0_BUF_SIZE - 2 && *str) + { + buf[i++] = *str++; + buf[i++] = 0; + } + + dev_desc_send(usb, setup, buf, i); +} + +static void dev_get_descriptor(struct usb *usb, struct setup_request *setup) +{ + byte desc_type = setup->wValue >> 8; + byte desc_index = setup->wValue & 0xff; + + switch (desc_type) + { + case USB_DESC_TYPE_DEVICE: + return dev_desc_send(usb, setup, usb->desc_device, usb->desc_device_len); + case USB_DESC_TYPE_CONFIGURATION: + return dev_desc_send(usb, setup, usb->desc_config, usb->desc_config_len); + case USB_DESC_TYPE_STRING: + if (!desc_index) + return dev_desc_send(usb, setup, usb->desc_languages, usb->desc_languages_len); + if (desc_index < usb->desc_string_items) + return dev_desc_send_string(usb, setup, usb->desc_string[desc_index]); + break; + case USB_DESC_TYPE_DEVICE_QUALIFIER: + case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION: + // We do not support high-speed USB + break; + } + + usb_ctl_error(usb); +} + +static void dev_get_configuration(struct usb *usb, struct setup_request *setup) +{ + if (setup->wValue || setup->wIndex || setup->wLength != 1) + return usb_ctl_error(usb); + + switch (usb->state) + { + case USB_STATE_ADDRESSED: + usb_ctl_send_byte(usb, 0); + break; + case USB_STATE_CONFIGURED: + usb_ctl_send_byte(usb, usb->config); + break; + default: + usb_ctl_error(usb); + } +} + +static void dev_set_configuration(struct usb *usb, struct setup_request *setup) +{ + byte cfg = setup->wValue & 0xff; + + // FIXME: Support more configurations + if (cfg > 1 || setup->wIndex || setup->wLength) + return usb_ctl_error(usb); + + switch (usb->state) + { + case USB_STATE_ADDRESSED: + if (cfg) + { + usb->config = cfg; + usb->state = USB_STATE_CONFIGURED; + usb->last_pma_alloc = PMA_USER; + usb_dev_configure(usb); + } + usb_ctl_send_status(usb); + break; + case USB_STATE_CONFIGURED: + if (!cfg) + { + // Unconfiguring + usb_dev_unconfigure(usb); + usb->config = 0; + usb->state = USB_STATE_ADDRESSED; + } + else if (cfg != usb->config) + { + usb_dev_unconfigure(usb); + usb->config = cfg; + usb->last_pma_alloc = PMA_USER; + usb_dev_configure(usb); + } + usb_ctl_send_status(usb); + break; + default: + usb_ctl_error(usb); + } +} + +static void dev_setup(struct usb *usb, struct setup_request *setup) +{ + switch (setup->bRequest) + { + case USB_REQ_GET_STATUS: + return dev_get_status(usb, setup); + case USB_REQ_CLEAR_FEATURE: + return dev_clear_feature(usb, setup); + case USB_REQ_SET_FEATURE: + return dev_set_feature(usb, setup); + case USB_REQ_SET_ADDRESS: + return dev_set_address(usb, setup); + case USB_REQ_GET_DESCRIPTOR: + return dev_get_descriptor(usb, setup); + case USB_REQ_GET_CONFIGURATION: + return dev_get_configuration(usb, setup); + case USB_REQ_SET_CONFIGURATION: + return dev_set_configuration(usb, setup); + } + + usb_ctl_setup_error(usb, setup); +} + +static void intf_setup(struct usb *usb, struct setup_request *setup) +{ + byte intf = setup->wIndex & 0xff; + + if (!intf) + { + // FIXME: Currently, we do not support more than 1 interface per configuration + usb_ctl_error(usb); + return; + } + + switch (setup->bRequest) + { + case USB_REQ_GET_STATUS: + if (setup->wValue || setup->wLength != 2 || usb->state != USB_STATE_CONFIGURED) + usb_ctl_error(usb); + else + usb_ctl_send_u16(usb, 0); + return; + + case USB_REQ_CLEAR_FEATURE: + case USB_REQ_SET_FEATURE: + // Interfaces have no standard features + return usb_ctl_error(usb); + } + + usb_ctl_setup_error(usb, setup); +} + +static void ep_setup(struct usb *usb, struct setup_request *setup) +{ + byte ep_addr = setup->wIndex & 0x8f; + + switch (setup->bRequest) + { + case USB_REQ_GET_STATUS: + if (setup->wValue || setup->wLength != 2) + return usb_ctl_error(usb); + switch (usb->state) + { + case USB_STATE_ADDRESSED: + if (ep_addr & 0x7f) + usb_ctl_error(usb); + return; + case USB_STATE_CONFIGURED: + { + if (usb_ep_is_stalled(usb, ep_addr)) + usb_ctl_send_u16(usb, 1); + else + usb_ctl_send_u16(usb, 0); + return; + } + default: + return usb_ctl_error(usb); + } + break; + + case USB_REQ_SET_FEATURE: + if (setup->wLength) + return usb_ctl_error(usb); + switch (usb->state) + { + case USB_STATE_ADDRESSED: + if (ep_addr & 0x7f) + usb_ctl_error(usb); + return; + case USB_STATE_CONFIGURED: + if (setup->wValue == USB_FEATURE_EP_HALT) + { + if (ep_addr & 0x7f) + usb_ep_stall(usb, ep_addr); + } + usb_ctl_send_status(usb); + return; + default: + usb_ctl_error(usb); + } + break; + + case USB_REQ_CLEAR_FEATURE: + if (setup->wLength) + return usb_ctl_error(usb); + switch (usb->state) + { + case USB_STATE_ADDRESSED: + if (ep_addr & 0x7f) + usb_ctl_error(usb); + return; + case USB_STATE_CONFIGURED: + if (setup->wValue == USB_FEATURE_EP_HALT) + { + if (ep_addr & 0x7f) + usb_ep_unstall(usb, ep_addr); + } + usb_ctl_send_status(usb); + return; + default: + usb_ctl_error(usb); + } + break; + } + + usb_ctl_setup_error(usb, setup); +} + +static void usb_handle_setup(struct usb *usb, struct setup_request *setup) +{ + usb_debug("Setup: type=%02x req=%02x val=%04x idx=%04x len=%04x\n", setup->bmRequest, setup->bRequest, setup->wValue, setup->wIndex, setup->wLength); + usb->ep0_state = USB_EP0_SETUP; + usb->ep0_setup_data_length = setup->wLength; + + if (usb_dev_setup_hook(usb, setup)) + return; + + if ((setup->bmRequest & USB_REQ_TYPE_MASK) == USB_REQ_TYPE_STANDARD) + { + switch (setup->bmRequest & USB_REQ_RECIPIENT_MASK) + { + case USB_REQ_RECIPIENT_DEVICE: + return dev_setup(usb, setup); + case USB_REQ_RECIPIENT_INTERFACE: + return intf_setup(usb, setup); + case USB_REQ_RECIPIENT_ENDPOINT: + return ep_setup(usb, setup); + } + } + + usb_ctl_setup_error(usb, setup); +} + +void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd) +{ + struct usb *usb = hpcd->pData; + byte *req = (byte *) hpcd->Setup; + + struct setup_request setup = { + .bmRequest = req[0], + .bRequest = req[1], + .wValue = get_u16_le(req+2), + .wIndex = get_u16_le(req+4), + .wLength = get_u16_le(req+6), + }; + usb_handle_setup(usb, &setup); +} + +void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) +{ + struct usb *usb = hpcd->pData; + PCD_EPTypeDef *ep = &hpcd->IN_ep[epnum]; + + if (!epnum) + { + // HAL/LL handle EP0 transfers in a completely different way, we have to do many things ourselves + usb_debug("Ep0 OUT: state=%u rem=%u total=%u\n", usb->ep0_state, usb->ep0_remaining_length, usb->ep0_total_length); + if (usb->ep0_state != USB_EP0_DATA_OUT) + return; + if (usb->ep0_remaining_length > ep->maxpacket) + { + usb->ep0_remaining_length -= ep->maxpacket; + usb_ep_receive(usb, 0x00, ep->xfer_buff, MIN(usb->ep0_remaining_length, ep->maxpacket)); + } + else + { + if (usb->state == USB_STATE_CONFIGURED) + usb_dev_ctl_recv_done(usb); + usb_ctl_send_status(usb); + } + } + else + { + if (usb->state == USB_STATE_CONFIGURED) + usb_dev_recv_done(usb, epnum); + } +} + +void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) +{ + struct usb *usb = hpcd->pData; + PCD_EPTypeDef *ep = &hpcd->IN_ep[epnum]; + + if (!epnum) + { + // HAL/LL handle EP0 transfers in a completely different way, we have to do many things ourselves + usb_debug("Ep0 IN: state=%u rem=%u total=%u want=%u\n", usb->ep0_state, usb->ep0_remaining_length, usb->ep0_total_length, usb->ep0_setup_data_length); + if (usb->ep0_state != USB_EP0_DATA_IN) + return; + if (usb->ep0_remaining_length > ep->maxpacket) + { + usb->ep0_remaining_length -= ep->maxpacket; + usb_ep_send(usb, 0x00, ep->xfer_buff, usb->ep0_remaining_length); + usb_ep_receive(usb, 0x00, NULL, 0); + } + else if (usb->ep0_total_length && usb->ep0_total_length % ep->maxpacket == 0 && usb->ep0_total_length < usb->ep0_setup_data_length) + { + /* + * Each data transfer must be terminated by either a small packet (less than maxpacket) + * or by reaching the answer size requested in the setup packet. Send an empty final packet + * if needed. + */ + usb_ep_send(usb, 0x00, NULL, 0); + usb->ep0_setup_data_length = 0; + usb_ep_receive(usb, 0x00, NULL, 0); + } + else + { + if (usb->state == USB_STATE_CONFIGURED) + usb_dev_ctl_send_done(usb); + usb_ctl_recv_status(usb); + } + } + else + { + if (usb->state == USB_STATE_CONFIGURED) + usb_dev_send_done(usb, epnum); + } +} + +void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd) +{ + // We are not interested in Start of frame packets + // (neither we set hpcd->Init.Sof_enable, so this callback does not get called) +} + +void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd) +{ + struct usb *usb = hpcd->pData; + + usb->state = USB_STATE_DEFAULT; + usb_dev_reset(usb); + + usb_ep_open(usb, 0x00, USB_EP_TYPE_CTRL, USB_MAX_EP0_SIZE); + usb_ep_open(usb, 0x80, USB_EP_TYPE_CTRL, USB_MAX_EP0_SIZE); +} + +void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd) +{ + struct usb *usb = hpcd->pData; + + usb->pre_suspend_state = usb->state; + usb->state = USB_STATE_SUSPENDED; + + if (hpcd->Init.low_power_enable) + SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk)); +} + +void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd) +{ + struct usb *usb = hpcd->pData; + usb->state = usb->pre_suspend_state; +} + +void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) +{ + // We do not support isochronous mode +} + +void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum) +{ + // We do not support isochronous mode +} + +void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd) +{ +} + +void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd) +{ + struct usb *usb = hpcd->pData; + usb->state = USB_STATE_DEFAULT; +} diff --git a/ssr/Src/usbdev.c b/ssr/Src/usbdev.c new file mode 100644 index 0000000..4834592 --- /dev/null +++ b/ssr/Src/usbdev.c @@ -0,0 +1,151 @@ +#include "stm32f1xx.h" +#include "stm32f1xx_hal.h" + +#include "util.h" +#include "usb.h" +#include "app.h" + +#include + +/*** Descriptors ***/ + +#define DESC_U16(x) ((x) & 0xff), ((x) >> 8) + +enum desc_string { + DESC_STR_NONE = 0, + DESC_STR_MANUFACTURER, + DESC_STR_PRODUCT, + DESC_STR_SERIAL, + DESC_STR_CONFIGURATION, + DESC_STR_INTERFACE, +}; + +static const byte desc_device[] = { + 18, // bLength + USB_DESC_TYPE_DEVICE, // bDescriptorType + DESC_U16(0x0200), // bcdUSB + 0x00, // bDeviceClass + 0x00, // bDeviceSubClass + 0x00, // bDeviceProtocol + USB_MAX_EP0_SIZE, // bMaxPacketSize + DESC_U16(0x4242), // idVendor + DESC_U16(0x0001), // idProduct + DESC_U16(0x0200), // bcdDevice + DESC_STR_MANUFACTURER, // iManufacturer + DESC_STR_PRODUCT, // iProduct + DESC_STR_SERIAL, // iSerialNumber + USB_NUM_CONFIGURATIONS, // bNumConfigurations +}; + +static const byte desc_config[] = { + // Configuration descriptor + 9, // bLength + USB_DESC_TYPE_CONFIGURATION, // bDescriptorType + 32, // wTotalLength + 0, + 0x01, // bNumInterfaces + 0x01, // bConfigurationValue + DESC_STR_CONFIGURATION, // iConfiguration + 0xc0, // bmAttributes: bus-powered, supports remote wakeup + 0x32, // Max power: 100 mA + // Interface descriptor + 9, // bLength + USB_DESC_TYPE_INTERFACE, // bDescriptorType + 0x00, // bInterfaceNumber + 0x00, // bAlternateSetting + 0x02, // bNumEndpoints + 0xff, // bInterfaceClass: vendor-defined + 0x00, // bInterfaceSubClass + 0x00, // nInterfaceProtocol + DESC_STR_INTERFACE, // iInterface + // End-point descriptor + 7, // bLength + USB_DESC_TYPE_ENDPOINT, // bDescriptorType + 0x01, // bEndpointAddress + USB_EP_TYPE_BULK, // bmAttributes + 0x40, 0x00, // wMaxPacketSize + 0x00, // bInterval: unused + // End-point descriptor + 7, // bLength + USB_DESC_TYPE_ENDPOINT, // bDescriptorType + 0x82, // bEndpointAddress + USB_EP_TYPE_BULK, // bmAttributes + 0x40, 0x00, // wMaxPacketSize + 0x00, // bInterval: unused +}; + +static const char * const desc_string[] = { + NULL, // DESC_STR_NONE + "United Computer Wizards", // DESC_STR_MANUFACTURER + "Mysterious Gadget", // DESC_STR_PRODUCT + "00000042", // DESC_STR_SERIAL + "Default Configuration", // DESC_STR_CONFIGURATION + "Default Interface", // DESC_STR_INTERFACE +}; + +static const byte desc_languages[] = { + 4, // bLength + USB_DESC_TYPE_STRING, // bDescriptorType + DESC_U16(1033), // English +}; + +/*** Callbacks ***/ + +byte rx_packet[64]; +byte tx_packet[64]; +volatile byte rx_packet_state, tx_packet_state; + +void usb_dev_reset(struct usb *usb) +{ + usb->desc_device = desc_device; + usb->desc_device_len = sizeof(desc_device); + usb->desc_config = desc_config; + usb->desc_config_len = sizeof(desc_config); + usb->desc_string = desc_string; + usb->desc_string_items = sizeof(desc_string) / sizeof(desc_string[0]); + usb->desc_languages = desc_languages; + usb->desc_languages_len = sizeof(desc_languages); +} + +void usb_dev_configure(struct usb *usb) +{ + usb_ep_open(usb, 0x01, USB_EP_TYPE_BULK, 64); + usb_ep_open(usb, 0x82, USB_EP_TYPE_BULK, 64); + usb_ep_receive(usb, 0x01, rx_packet, 64); +} + +void usb_dev_unconfigure(struct usb *usb) +{ + usb_ep_close(usb, 0x01); + usb_ep_close(usb, 0x82); +} + +bool usb_dev_setup_hook(struct usb *usb, struct setup_request *setup) +{ + return false; +} + +void usb_dev_ctl_recv_done(struct usb *usb) +{ +} + +void usb_dev_ctl_send_done(struct usb *usb) +{ +} + +void usb_dev_recv_done(struct usb *usb, byte epnum) +{ + if (epnum == 0x01) + { + u32 len = usb_ep_received_size(usb, 0x01); + if (len >= 8 && !rx_packet_state) + rx_packet_state = 1; + else + usb_ep_receive(usb, 0x01, rx_packet, 64); + } +} + +void usb_dev_send_done(struct usb *usb, byte epnum) +{ + tx_packet_state = 0; +} diff --git a/ssr/host/Makefile b/ssr/host/Makefile new file mode 100644 index 0000000..a31dce1 --- /dev/null +++ b/ssr/host/Makefile @@ -0,0 +1,9 @@ +UCWCF:=$(shell PKG_CONFIG_PATH=$(LIBUCW)/lib/pkgconfig pkg-config --cflags libucw) +UCWLF:=$(shell PKG_CONFIG_PATH=$(LIBUCW)/lib/pkgconfig pkg-config --libs libucw) + +CFLAGS=-std=gnu99 -O2 -Wall -Wextra -Wno-parentheses $(UCWCF) +LDLIBS=-lusb-1.0 $(UCWLF) + +all: test + +test: test.c diff --git a/ssr/host/test.c b/ssr/host/test.c new file mode 100644 index 0000000..2d94a98 --- /dev/null +++ b/ssr/host/test.c @@ -0,0 +1,102 @@ +#include +#include + +#include +#include +#include +#include +#include +#include + +struct libusb_context *usb_ctxt; +struct libusb_device_handle *devh; + +static libusb_device *find_device(void) +{ + libusb_device **devlist; + ssize_t devn = libusb_get_device_list(usb_ctxt, &devlist); + if (devn < 0) + { + fprintf(stderr, "Cannot enumerate USB devices: error %d\n", (int) devn); + exit(1); + } + + for (ssize_t i=0; itm_hour / 10, + tm->tm_hour % 10, + (tm->tm_sec % 2 ? 10 : 0xff), + tm->tm_min / 10, + tm->tm_min % 10, + }; + int transferred; + if (err = libusb_bulk_transfer(devh, 0x01, req, 8, &transferred, 2000)) + die("Transfer failed: error %d\n", err); + // printf("Transferred %d bytes\n", transferred); + + unsigned char resp[64]; + int received; + if (err = libusb_bulk_transfer(devh, 0x82, resp, 64, &received, 2000)) + die("Receive failed: error %d\n", err); + // printf("Received %d bytes\n", received); + if (received >= 12) + { + int t = get_u32_be(resp); + int p = get_u32_be(resp + 4); + uint cnt = get_u32_be(resp + 8); + msg(L_INFO, "Temperature %d ddegC, pressure %d Pa, cnt %u", t, p, cnt); + } + + sleep(1); + } + + return 0; +} diff --git a/ssr/mx.scratch b/ssr/mx.scratch new file mode 100644 index 0000000..da8434e --- /dev/null +++ b/ssr/mx.scratch @@ -0,0 +1,199 @@ + + +/aux/misc/stm/home/usb/\usb +C +/aux/misc/stm/F1-package/Drivers/CMSIS +/aux/misc/stm/F1-package/Drivers/CMSIS +Makefile +0 + + + + + + + + + + + + + + + + + testusb + STM32F103C8Tx + 0x200 + 0x400 + + custom + + true + swd + + 0 + + + + + + + + + + + + USE_FULL_LL_DRIVER + + + + + + + MBEDTLS_CONFIG_FILE="mbedtls_config.h" + _TIMEVAL_DEFINED + _SYS_TIME_H_ + + + + + Inc + /aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Inc + /aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Inc/Legacy + /aux/misc/stm/F1-package/Drivers/CMSIS/Device/ST/STM32F1xx/Include + /aux/misc/stm/F1-package/Drivers/CMSIS/Include + + + + + + false + + + Drivers + + STM32F1xx_HAL_Driver + + /aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c + + + /aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_gpio.c + + + /aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_i2c.c + + + /aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_dma.c + + + /aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c + + + /aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c + + + /aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_tim.c + + + /aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd.c + + + /aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd_ex.c + + + /aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usb.c + + + /aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_rcc.c + + + /aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_utils.c + + + /aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_exti.c + + + /aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c + + + /aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c + + + /aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c + + + /aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c + + + /aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c + + + /aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c + + + /aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c + + + /aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c + + + /aux/misc/stm/F1-package/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c + + + + CMSIS + + /Src/system_stm32f1xx.c + + + + + Application + + User + + Src/main.c + + + + Src/stm32f1xx_it.c + + + + Src/stm32f1xx_hal_msp.c + + + + + + Src + + main.c + + Src/main.c + + + + + Src + + stm32f1xx_it.c + + Src/stm32f1xx_it.c + + + + + Src + + stm32f1xx_hal_msp.c + + Src/stm32f1xx_hal_msp.c + + + + + + + diff --git a/ssr/ssr.ioc b/ssr/ssr.ioc new file mode 100644 index 0000000..59d3282 --- /dev/null +++ b/ssr/ssr.ioc @@ -0,0 +1,163 @@ +#MicroXplorer Configuration settings - do not modify +File.Version=6 +I2C1.I2C_Mode=I2C_Fast +I2C1.IPParameters=I2C_Mode +I2C2.I2C_Mode=I2C_Fast +I2C2.IPParameters=I2C_Mode +KeepUserPlacement=false +Mcu.Family=STM32F1 +Mcu.IP0=I2C1 +Mcu.IP1=I2C2 +Mcu.IP2=NVIC +Mcu.IP3=RCC +Mcu.IP4=SYS +Mcu.IP5=TIM4 +Mcu.IP6=USB +Mcu.IPNb=7 +Mcu.Name=STM32F103C(8-B)Tx +Mcu.Package=LQFP48 +Mcu.Pin0=PC13-TAMPER-RTC +Mcu.Pin1=PC14-OSC32_IN +Mcu.Pin10=PA14 +Mcu.Pin11=PB5 +Mcu.Pin12=PB6 +Mcu.Pin13=PB7 +Mcu.Pin14=VP_SYS_VS_Systick +Mcu.Pin15=VP_TIM4_VS_ClockSourceINT +Mcu.Pin16=VP_TIM4_VS_no_output1 +Mcu.Pin2=PC15-OSC32_OUT +Mcu.Pin3=PD0-OSC_IN +Mcu.Pin4=PD1-OSC_OUT +Mcu.Pin5=PB10 +Mcu.Pin6=PB11 +Mcu.Pin7=PA11 +Mcu.Pin8=PA12 +Mcu.Pin9=PA13 +Mcu.PinsNb=17 +Mcu.ThirdPartyNb=0 +Mcu.UserConstants= +Mcu.UserName=STM32F103C8Tx +MxCube.Version=4.25.1 +MxDb.Version=DB.4.0.251 +NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false +NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false +NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false +NVIC.I2C1_EV_IRQn=true\:0\:0\:false\:false\:true\:true +NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false +NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false +NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false +NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 +NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false +NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false +NVIC.TIM4_IRQn=true\:0\:0\:false\:false\:true\:true +NVIC.USB_HP_CAN1_TX_IRQn=true\:15\:0\:true\:false\:true\:true +NVIC.USB_LP_CAN1_RX0_IRQn=true\:15\:0\:true\:false\:true\:true +NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false +PA11.Mode=Device +PA11.Signal=USB_DM +PA12.Mode=Device +PA12.Signal=USB_DP +PA13.Mode=Serial_Wire +PA13.Signal=SYS_JTMS-SWDIO +PA14.Mode=Serial_Wire +PA14.Signal=SYS_JTCK-SWCLK +PB10.Mode=I2C +PB10.Signal=I2C2_SCL +PB11.Mode=I2C +PB11.Signal=I2C2_SDA +PB5.GPIOParameters=GPIO_Label +PB5.GPIO_Label=BMP_DONE +PB5.Locked=true +PB5.Signal=GPIO_Input +PB6.Locked=true +PB6.Mode=I2C +PB6.Signal=I2C1_SCL +PB7.Locked=true +PB7.Mode=I2C +PB7.Signal=I2C1_SDA +PC13-TAMPER-RTC.GPIOParameters=GPIO_Speed,PinState,GPIO_Label,GPIO_ModeDefaultOutputPP +PC13-TAMPER-RTC.GPIO_Label=LED +PC13-TAMPER-RTC.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD +PC13-TAMPER-RTC.GPIO_Speed=GPIO_SPEED_FREQ_HIGH +PC13-TAMPER-RTC.Locked=true +PC13-TAMPER-RTC.PinState=GPIO_PIN_RESET +PC13-TAMPER-RTC.Signal=GPIO_Output +PC14-OSC32_IN.Mode=LSE-External-Oscillator +PC14-OSC32_IN.Signal=RCC_OSC32_IN +PC15-OSC32_OUT.Mode=LSE-External-Oscillator +PC15-OSC32_OUT.Signal=RCC_OSC32_OUT +PCC.Checker=false +PCC.Line=STM32F103 +PCC.MCU=STM32F103C(8-B)Tx +PCC.PartNumber=STM32F103C8Tx +PCC.Seq0=0 +PCC.Series=STM32F1 +PCC.Temperature=25 +PCC.Vdd=3.3 +PD0-OSC_IN.Mode=HSE-External-Oscillator +PD0-OSC_IN.Signal=RCC_OSC_IN +PD1-OSC_OUT.Mode=HSE-External-Oscillator +PD1-OSC_OUT.Signal=RCC_OSC_OUT +PinOutPanel.RotationAngle=0 +ProjectManager.AskForMigrate=true +ProjectManager.BackupPrevious=false +ProjectManager.CompilerOptimize=3 +ProjectManager.ComputerToolchain=false +ProjectManager.CoupleFile=false +ProjectManager.CustomerFirmwarePackage=/aux/misc/stm/F1-package +ProjectManager.DefaultFWLocation=false +ProjectManager.DeletePrevious=true +ProjectManager.DeviceId=STM32F103C8Tx +ProjectManager.FirmwarePackage=STM32Cube FW_F1 V1.6.1 +ProjectManager.FreePins=false +ProjectManager.HalAssertFull=false +ProjectManager.HeapSize=0x200 +ProjectManager.KeepUserCode=true +ProjectManager.LastFirmware=true +ProjectManager.LibraryCopy=2 +ProjectManager.MainLocation=Src +ProjectManager.PreviousToolchain= +ProjectManager.ProjectBuild=false +ProjectManager.ProjectFileName=ssr.ioc +ProjectManager.ProjectName=ssr +ProjectManager.StackSize=0x400 +ProjectManager.TargetToolchain=Makefile +ProjectManager.ToolChainLocation= +ProjectManager.UnderRoot=false +ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-LL-true,2-SystemClock_Config-RCC-false-LL-false,3-MX_I2C1_Init-I2C1-false-LL-true,4-MX_I2C2_Init-I2C2-false-LL-true,5-MX_USB_PCD_Init-USB-false-HAL-true,6-MX_TIM4_Init-TIM4-false-LL-true +RCC.ADCFreqValue=36000000 +RCC.AHBFreq_Value=72000000 +RCC.APB1CLKDivider=RCC_HCLK_DIV2 +RCC.APB1Freq_Value=36000000 +RCC.APB1TimFreq_Value=72000000 +RCC.APB2Freq_Value=72000000 +RCC.APB2TimFreq_Value=72000000 +RCC.FCLKCortexFreq_Value=72000000 +RCC.FamilyName=M +RCC.HCLKFreq_Value=72000000 +RCC.IPParameters=ADCFreqValue,AHBFreq_Value,APB1CLKDivider,APB1Freq_Value,APB1TimFreq_Value,APB2Freq_Value,APB2TimFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,MCOFreq_Value,PLLCLKFreq_Value,PLLMCOFreq_Value,PLLMUL,SYSCLKFreq_VALUE,SYSCLKSource,TimSysFreq_Value,USBFreq_Value,USBPrescaler,VCOOutput2Freq_Value +RCC.MCOFreq_Value=72000000 +RCC.PLLCLKFreq_Value=72000000 +RCC.PLLMCOFreq_Value=36000000 +RCC.PLLMUL=RCC_PLL_MUL9 +RCC.SYSCLKFreq_VALUE=72000000 +RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK +RCC.TimSysFreq_Value=72000000 +RCC.USBFreq_Value=48000000 +RCC.USBPrescaler=RCC_USBCLKSOURCE_PLL_DIV1_5 +RCC.VCOOutput2Freq_Value=8000000 +TIM4.AutoReloadPreload=TIM_AUTORELOAD_PRELOAD_DISABLE +TIM4.Channel-Output\ Compare1\ No\ Output=TIM_CHANNEL_1 +TIM4.CounterMode=TIM_COUNTERMODE_UP +TIM4.IPParameters=Channel-Output Compare1 No Output,CounterMode,Prescaler,Period,AutoReloadPreload +TIM4.Period=1000 +TIM4.Prescaler=7200 +USB.IPParameters=ep0_mps +USB.ep0_mps=DEP0CTL_MPS_64 +VP_SYS_VS_Systick.Mode=SysTick +VP_SYS_VS_Systick.Signal=SYS_VS_Systick +VP_TIM4_VS_ClockSourceINT.Mode=Internal +VP_TIM4_VS_ClockSourceINT.Signal=TIM4_VS_ClockSourceINT +VP_TIM4_VS_no_output1.Mode=Output Compare1 No Output +VP_TIM4_VS_no_output1.Signal=TIM4_VS_no_output1 +board=ssr diff --git a/ssr/startup_stm32f103xb.s b/ssr/startup_stm32f103xb.s new file mode 100644 index 0000000..3a0a3b9 --- /dev/null +++ b/ssr/startup_stm32f103xb.s @@ -0,0 +1,379 @@ +/** + *************** (C) COPYRIGHT 2017 STMicroelectronics ************************ + * @file startup_stm32f103xb.s + * @author MCD Application Team + * @version V4.2.0 + * @date 31-March-2017 + * @brief STM32F103xB Devices vector table for Atollic toolchain. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address + * - Configure the clock system + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M3 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * + *

© COPYRIGHT(c) 2017 STMicroelectronics

+ * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m3 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss + +.equ BootRAM, 0xF108F85F +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + bx lr +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * + * @param None + * @retval : None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex M3. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + +g_pfnVectors: + + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + .word WWDG_IRQHandler + .word PVD_IRQHandler + .word TAMPER_IRQHandler + .word RTC_IRQHandler + .word FLASH_IRQHandler + .word RCC_IRQHandler + .word EXTI0_IRQHandler + .word EXTI1_IRQHandler + .word EXTI2_IRQHandler + .word EXTI3_IRQHandler + .word EXTI4_IRQHandler + .word DMA1_Channel1_IRQHandler + .word DMA1_Channel2_IRQHandler + .word DMA1_Channel3_IRQHandler + .word DMA1_Channel4_IRQHandler + .word DMA1_Channel5_IRQHandler + .word DMA1_Channel6_IRQHandler + .word DMA1_Channel7_IRQHandler + .word ADC1_2_IRQHandler + .word USB_HP_CAN1_TX_IRQHandler + .word USB_LP_CAN1_RX0_IRQHandler + .word CAN1_RX1_IRQHandler + .word CAN1_SCE_IRQHandler + .word EXTI9_5_IRQHandler + .word TIM1_BRK_IRQHandler + .word TIM1_UP_IRQHandler + .word TIM1_TRG_COM_IRQHandler + .word TIM1_CC_IRQHandler + .word TIM2_IRQHandler + .word TIM3_IRQHandler + .word TIM4_IRQHandler + .word I2C1_EV_IRQHandler + .word I2C1_ER_IRQHandler + .word I2C2_EV_IRQHandler + .word I2C2_ER_IRQHandler + .word SPI1_IRQHandler + .word SPI2_IRQHandler + .word USART1_IRQHandler + .word USART2_IRQHandler + .word USART3_IRQHandler + .word EXTI15_10_IRQHandler + .word RTC_Alarm_IRQHandler + .word USBWakeUp_IRQHandler + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word 0 + .word BootRAM /* @0x108. This is for boot in RAM mode for + STM32F10x Medium Density devices. */ + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak TAMPER_IRQHandler + .thumb_set TAMPER_IRQHandler,Default_Handler + + .weak RTC_IRQHandler + .thumb_set RTC_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_IRQHandler + .thumb_set EXTI2_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Channel1_IRQHandler + .thumb_set DMA1_Channel1_IRQHandler,Default_Handler + + .weak DMA1_Channel2_IRQHandler + .thumb_set DMA1_Channel2_IRQHandler,Default_Handler + + .weak DMA1_Channel3_IRQHandler + .thumb_set DMA1_Channel3_IRQHandler,Default_Handler + + .weak DMA1_Channel4_IRQHandler + .thumb_set DMA1_Channel4_IRQHandler,Default_Handler + + .weak DMA1_Channel5_IRQHandler + .thumb_set DMA1_Channel5_IRQHandler,Default_Handler + + .weak DMA1_Channel6_IRQHandler + .thumb_set DMA1_Channel6_IRQHandler,Default_Handler + + .weak DMA1_Channel7_IRQHandler + .thumb_set DMA1_Channel7_IRQHandler,Default_Handler + + .weak ADC1_2_IRQHandler + .thumb_set ADC1_2_IRQHandler,Default_Handler + + .weak USB_HP_CAN1_TX_IRQHandler + .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler + + .weak USB_LP_CAN1_RX0_IRQHandler + .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler + + .weak CAN1_RX1_IRQHandler + .thumb_set CAN1_RX1_IRQHandler,Default_Handler + + .weak CAN1_SCE_IRQHandler + .thumb_set CAN1_SCE_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_IRQHandler + .thumb_set TIM1_BRK_IRQHandler,Default_Handler + + .weak TIM1_UP_IRQHandler + .thumb_set TIM1_UP_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_IRQHandler + .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak USBWakeUp_IRQHandler + .thumb_set USBWakeUp_IRQHandler,Default_Handler + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + -- 2.39.2