From: Bjorn Helgaas Date: Fri, 17 May 2019 18:40:22 +0000 (-0500) Subject: lspci: Reorder Express Root Complex registers to Cap, Ctl, Sta X-Git-Tag: v3.6.3~15 X-Git-Url: http://mj.ucw.cz/gitweb/?a=commitdiff_plain;h=e6a11bb4a42c904cd64b8733fc67ce16a88f8b23;p=pciutils.git lspci: Reorder Express Root Complex registers to Cap, Ctl, Sta Registers in the PCI Express Capability come in sets of three (Capability, Control, Status), and we typically print them in that order. The Root Complex-related registers were an exception: we printed them in the (Control, Capability, Status) order. Decode the RootCap, RootCtl, and RootSta registers in the usual order. Signed-off-by: Bjorn Helgaas --- diff --git a/ls-caps.c b/ls-caps.c index 8a00aa4..a6705eb 100644 --- a/ls-caps.c +++ b/ls-caps.c @@ -899,7 +899,13 @@ static void cap_express_slot(struct device *d, int where) static void cap_express_root(struct device *d, int where) { - u32 w = get_conf_word(d, where + PCI_EXP_RTCTL); + u32 w; + + w = get_conf_word(d, where + PCI_EXP_RTCAP); + printf("\t\tRootCap: CRSVisible%c\n", + FLAG(w, PCI_EXP_RTCAP_CRSVIS)); + + w = get_conf_word(d, where + PCI_EXP_RTCTL); printf("\t\tRootCtl: ErrCorrectable%c ErrNon-Fatal%c ErrFatal%c PMEIntEna%c CRSVisible%c\n", FLAG(w, PCI_EXP_RTCTL_SECEE), FLAG(w, PCI_EXP_RTCTL_SENFEE), @@ -907,10 +913,6 @@ static void cap_express_root(struct device *d, int where) FLAG(w, PCI_EXP_RTCTL_PMEIE), FLAG(w, PCI_EXP_RTCTL_CRSVIS)); - w = get_conf_word(d, where + PCI_EXP_RTCAP); - printf("\t\tRootCap: CRSVisible%c\n", - FLAG(w, PCI_EXP_RTCAP_CRSVIS)); - w = get_conf_long(d, where + PCI_EXP_RTSTA); printf("\t\tRootSta: PME ReqID %04x, PMEStatus%c PMEPending%c\n", w & PCI_EXP_RTSTA_PME_REQID,