From: Martin Mares <mj@ucw.cz>
Date: Mon, 8 Jul 2019 21:42:25 +0000 (+0200)
Subject: A simple PWM test
X-Git-Url: http://mj.ucw.cz/gitweb/?a=commitdiff_plain;h=cec76b01f9e6b8f9da465ad309be7e3561eedfa8;p=home-hw.git

A simple PWM test
---

diff --git a/test-pwm/Makefile b/test-pwm/Makefile
new file mode 100644
index 0000000..55e99d4
--- /dev/null
+++ b/test-pwm/Makefile
@@ -0,0 +1,85 @@
+BINARY=test
+OBJS=test.o
+
+# Library modules to use
+vpath %.c ../lib
+OBJS += util-debug.o
+
+OPENCM3_DIR=/home/mj/stm/libopencm3
+DEVICE=stm32f103x8
+
+all: $(BINARY).elf $(BINARY).bin
+
+flash: $(BINARY).flash
+
+reset: all
+	../bin/st-flash reset
+
+ifneq ($(V),1)
+Q		:= @
+NULL		:= 2>/dev/null
+endif
+
+include $(OPENCM3_DIR)/mk/genlink-config.mk
+
+PREFIX		?= arm-none-eabi
+
+CC		:= $(PREFIX)-gcc
+CXX		:= $(PREFIX)-g++
+LD		:= $(PREFIX)-gcc
+AR		:= $(PREFIX)-ar
+AS		:= $(PREFIX)-as
+OBJCOPY		:= $(PREFIX)-objcopy
+OBJDUMP		:= $(PREFIX)-objdump
+GDB		:= $(PREFIX)-gdb
+OPT		:= -Os
+DEBUG		:= -ggdb3
+CSTD		?= -std=c99
+
+TGT_CFLAGS	+= $(OPT) $(CSTD) $(DEBUG)
+TGT_CFLAGS	+= $(ARCH_FLAGS)
+TGT_CFLAGS	+= -Wall -Wextra -Wshadow -Wimplicit-function-declaration
+TGT_CFLAGS	+= -Wredundant-decls -Wmissing-prototypes -Wstrict-prototypes
+TGT_CFLAGS	+= -fno-common -ffunction-sections -fdata-sections
+TGT_CFLAGS	+= -I. -I../lib
+
+TGT_CPPFLAGS	+= -MD
+
+TGT_LDFLAGS	+= --static -nostartfiles
+TGT_LDFLAGS	+= -T$(LDSCRIPT)
+TGT_LDFLAGS	+= $(ARCH_FLAGS) $(DEBUG)
+TGT_LDFLAGS	+= -Wl,-Map=$(*).map -Wl,--cref
+TGT_LDFLAGS	+= -Wl,--gc-sections
+ifeq ($(V),99)
+TGT_LDFLAGS	+= -Wl,--print-gc-sections
+endif
+
+LDLIBS		+= -Wl,--start-group -lc -lgcc -lnosys -Wl,--end-group
+
+include $(OPENCM3_DIR)/mk/genlink-rules.mk
+
+%.bin: %.elf
+	@printf "  OBJCOPY $(*).bin\n"
+	$(Q)$(OBJCOPY) -Obinary $(*).elf $(*).bin
+
+%.elf: $(OBJS) $(LDSCRIPT)
+	@printf "  LD      $(*).elf\n"
+	$(Q)$(LD) $(TGT_LDFLAGS) $(LDFLAGS) $(OBJS) $(LDLIBS) -o $*.elf
+
+%.o: %.c
+	@printf "  CC      $(*).c\n"
+	$(Q)$(CC) $(TGT_CFLAGS) $(CFLAGS) $(TGT_CPPFLAGS) $(CPPFLAGS) -o $@ -c $<
+
+.PHONY: clean
+clean:
+	@printf "  CLEAN\n"
+	$(Q)rm -f *.elf *.bin *.o *.d *.map $(LDSCRIPT)
+
+%.flash: %.bin
+	@printf "  FLASH  $<\n"
+	$(Q)../bin/st-flash write $(*).bin 0x8000000
+
+.SECONDEXPANSION:
+.SECONDARY:
+
+-include $(OBJS:.o=.d)
diff --git a/test-pwm/config.h b/test-pwm/config.h
new file mode 100644
index 0000000..caef372
--- /dev/null
+++ b/test-pwm/config.h
@@ -0,0 +1,8 @@
+// Processor clock
+
+#define CPU_CLOCK_MHZ 72
+
+// Debugging port
+
+// #define DEBUG_SEMIHOSTING
+#define DEBUG_USART USART1
diff --git a/test-pwm/test.c b/test-pwm/test.c
new file mode 100644
index 0000000..c8d93b0
--- /dev/null
+++ b/test-pwm/test.c
@@ -0,0 +1,121 @@
+#include "util.h"
+#include "modbus.h"
+
+#include <libopencm3/cm3/cortex.h>
+#include <libopencm3/cm3/nvic.h>
+#include <libopencm3/cm3/systick.h>
+#include <libopencm3/stm32/rcc.h>
+#include <libopencm3/stm32/gpio.h>
+#include <libopencm3/stm32/usart.h>
+#include <libopencm3/stm32/timer.h>
+
+static void clock_setup(void)
+{
+	rcc_clock_setup_in_hse_8mhz_out_72mhz();
+
+	rcc_periph_clock_enable(RCC_GPIOA);
+	rcc_periph_clock_enable(RCC_GPIOB);
+	rcc_periph_clock_enable(RCC_GPIOC);
+	rcc_periph_clock_enable(RCC_USART1);
+	rcc_periph_clock_enable(RCC_TIM4);
+
+	rcc_periph_reset_pulse(RST_GPIOA);
+	rcc_periph_reset_pulse(RST_GPIOB);
+	rcc_periph_reset_pulse(RST_GPIOC);
+	rcc_periph_reset_pulse(RST_USART1);
+	rcc_periph_reset_pulse(RST_TIM2);
+	rcc_periph_reset_pulse(RST_TIM4);
+}
+
+static void gpio_setup(void)
+{
+	// PC13 = BluePill LED
+	gpio_set_mode(GPIOC, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, GPIO13);
+	gpio_clear(GPIOC, GPIO13);
+
+	// Pins for MODBUS USART
+	gpio_set_mode(GPIOA, GPIO_MODE_INPUT, GPIO_CNF_INPUT_FLOAT, GPIO_USART1_RX);
+	gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_USART1_TX);
+	gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, GPIO1);
+}
+
+static volatile u32 ms_ticks;
+
+void sys_tick_handler(void)
+{
+	ms_ticks++;
+}
+
+static void tick_setup(void)
+{
+	systick_set_frequency(1000, 72000000);
+	systick_counter_enable();
+	systick_interrupt_enable();
+}
+
+static void delay_ms(uint ms)
+{
+	u32 start_ticks = ms_ticks;
+	while (ms_ticks - start_ticks < ms)
+		;
+}
+
+static void usart_setup(void)
+{
+	gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO_USART1_TX);
+
+	usart_set_baudrate(USART1, 9600);
+	usart_set_databits(USART1, 8);
+	usart_set_stopbits(USART1, USART_STOPBITS_1);
+	usart_set_mode(USART1, USART_MODE_TX_RX);
+	usart_set_parity(USART1, USART_PARITY_NONE);
+	usart_set_flow_control(USART1, USART_FLOWCONTROL_NONE);
+
+	usart_enable(USART1);
+}
+
+int main(void)
+{
+	clock_setup();
+	gpio_setup();
+	tick_setup();
+	usart_setup();
+
+	// cm_enable_interrupts();
+
+	timer_set_prescaler(TIM4, 3);	// clock = 72 MHz / 2 = 36 MHz
+	timer_set_mode(TIM4, TIM_CR1_CKD_CK_INT, TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP);
+	timer_disable_preload(TIM4);
+	timer_set_period(TIM4, 255);	// PWM frequency = 18 MHz / 256 = 70.3125 kHz	FIXME
+	timer_set_oc_mode(TIM4, TIM_OC1, TIM_OCM_PWM1);
+	timer_set_oc_value(TIM4, TIM_OC1, 24);
+	/*
+	 *	1	0
+	 *	4	0.6
+	 *	8	1.6
+	 *	12	2.64
+	 *	16	3.52
+	 *	24	6.16
+	 *	32	7.2
+	 *	64	7.8
+	 *	128	7.8
+	 *	255	8
+	 */
+	timer_set_oc_polarity_high(TIM4, TIM_OC1);
+	timer_enable_counter(TIM4);
+	timer_enable_oc_output(TIM4, TIM_OC1);
+
+	gpio_set_mode(GPIOB, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_ALTFN_PUSHPULL, GPIO6);
+	// gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, GPIO8);
+
+	for (;;) {
+		gpio_toggle(GPIOC, GPIO13);
+		delay_ms(50);
+		// gpio_toggle(GPIOA, GPIO8);
+		//timer_set_oc_mode(TIM4, TIM_OC1, TIM_OCM_FORCE_LOW);
+		//delay_ms(50);
+		//timer_set_oc_mode(TIM4, TIM_OC1, TIM_OCM_FORCE_HIGH);
+	}
+
+	return 0;
+}