From: Martin Mares <mj@ucw.cz>
Date: Sat, 23 Jan 2010 21:31:08 +0000 (+0100)
Subject: Decoding of the Vendor-Specific Capabilities (both PCI and PCIe)
X-Git-Tag: v3.1.6~5
X-Git-Url: http://mj.ucw.cz/gitweb/?a=commitdiff_plain;h=78ca958247b6890d759032fdbfb4ba3999aa3eae;p=pciutils.git

Decoding of the Vendor-Specific Capabilities (both PCI and PCIe)
---

diff --git a/lib/header.h b/lib/header.h
index c611914..92d7d1e 100644
--- a/lib/header.h
+++ b/lib/header.h
@@ -710,6 +710,9 @@
 #define PCI_HT_RM_CNT1		10	/* Retry Count 1 Register */
 #define PCI_HT_RM_SIZEOF	12
 
+/* Vendor-Specific Capability (see PCI_EVNDR_xxx for the PCIe version) */
+#define PCI_VNDR_LENGTH		2	/* Length byte */
+
 /* PCI Express */
 #define PCI_EXP_FLAGS		0x2	/* Capabilities register */
 #define PCI_EXP_FLAGS_VERS	0x000f	/* Capability version */
@@ -949,6 +952,10 @@
 #define  PCI_RCLINK_LINK_ADDR	8	/* Link Entry: Address (64-bit) */
 #define  PCI_RCLINK_LINK_SIZE	16	/* Link Entry: sizeof */
 
+/* PCIe Vendor-Specific Capability */
+#define PCI_EVNDR_HEADER	4	/* Vendor-Specific Header */
+#define PCI_EVNDR_REGISTERS	8	/* Vendor-Specific Registers */
+
 /* Access Control Services */
 #define PCI_ACS_CAP		0x04	/* ACS Capability Register */
 #define PCI_ACS_CAP_VALID	0x0001	/* ACS Source Validation */
diff --git a/ls-caps.c b/ls-caps.c
index 507771a..5ca2cd4 100644
--- a/ls-caps.c
+++ b/ls-caps.c
@@ -1225,7 +1225,7 @@ show_caps(struct device *d)
 	      cap_ht(d, where, cap);
 	      break;
 	    case PCI_CAP_ID_VNDR:
-	      printf("Vendor Specific Information <?>\n");
+	      printf("Vendor Specific Information: Len=%02x <?>\n", BITS(cap, 0, 8));
 	      break;
 	    case PCI_CAP_ID_DBG:
 	      cap_debug_port(cap);
diff --git a/ls-ecaps.c b/ls-ecaps.c
index 0414074..dac87ff 100644
--- a/ls-ecaps.c
+++ b/ls-ecaps.c
@@ -362,6 +362,25 @@ cap_rclink(struct device *d, int where)
     }
 }
 
+static void
+cap_evendor(struct device *d, int where)
+{
+  u32 hdr;
+
+  printf("Vendor Specific Information: ");
+  if (!config_fetch(d, where + PCI_EVNDR_HEADER, 4))
+    {
+      printf("<unreadable>\n");
+      return;
+    }
+
+  hdr = get_conf_long(d, where + PCI_EVNDR_HEADER);
+  printf("ID=%04x Rev=%d Len=%03x <?>\n",
+    BITS(hdr, 0, 16),
+    BITS(hdr, 16, 4),
+    BITS(hdr, 20, 12));
+}
+
 void
 show_ext_caps(struct device *d)
 {
@@ -420,7 +439,7 @@ show_ext_caps(struct device *d)
 	    printf("Root Bridge Control Block <?>\n");
 	    break;
 	  case PCI_EXT_CAP_ID_VNDR:
-	    printf("Vendor Specific Information <?>\n");
+	    cap_evendor(d, where);
 	    break;
 	  case PCI_EXT_CAP_ID_ACS:
 	    cap_acs(d, where);