From: Chris Wright <chrisw@sous-sol.org>
Date: Sat, 11 Jul 2009 00:55:26 +0000 (-0700)
Subject: lspci: Show SR-IOV VF BARs
X-Git-Tag: v3.1.4~7
X-Git-Url: http://mj.ucw.cz/gitweb/?a=commitdiff_plain;h=67e78b32e2c4ba3343b9e625450914538f040859;p=pciutils.git

lspci: Show SR-IOV VF BARs

When decoding the PCIe SR-IOV capability, cap_sriov() doesn't show the
VF BARs.  This patch shows basic information about the VF BARs (doesn't
include size, for example).

Signed-off-by: Chris Wright <chrisw@sous-sol.org>
---

diff --git a/ls-ecaps.c b/ls-ecaps.c
index 38da824..c74c9a2 100644
--- a/ls-ecaps.c
+++ b/ls-ecaps.c
@@ -145,6 +145,7 @@ cap_sriov(struct device *d, int where)
   u16 b;
   u16 w;
   u32 l;
+  int i;
 
   printf("Single Root I/O Virtualization (SR-IOV)\n");
   if (verbose < 2)
@@ -181,6 +182,28 @@ cap_sriov(struct device *d, int where)
   printf("\t\tSupported Page Size: %08x, ", l);
   l = get_conf_long(d, where + PCI_IOV_SYSPS);
   printf("System Page Size: %08x\n", l);
+  for (i=0; i<PCI_IOV_NUM_BAR; i++) {
+    pciaddr_t addr;
+    int type;
+    u32 h;
+    l = get_conf_long(d, where + PCI_IOV_BAR_BASE + (i*4));
+    if (l == 0xffffffff)
+      l = 0;
+    if (!l)
+      continue;
+    printf("\t\tRegion %d: Memory at ", i);
+    addr = l & PCI_ADDR_MEM_MASK;
+    type = l & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
+    if (type == PCI_BASE_ADDRESS_MEM_TYPE_64) {
+       i++;
+       h = get_conf_long(d, where + PCI_IOV_BAR_BASE + (i*4));
+       addr |= (pciaddr_t)h<<32;
+    }
+    printf(PCIADDR_T_FMT, addr);
+    printf(" (%s-bit, %sprefetchable)\n",
+           (type == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32" : "64",
+           (l & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-");
+  }
   l = get_conf_long(d, where + PCI_IOV_MSAO);
   printf("\t\tVF Migration: offset: %08x, BIR: %x\n", PCI_IOV_MSA_OFFSET(l),
 	PCI_IOV_MSA_BIR(l));