From: Martin Mares Date: Tue, 23 Aug 2005 19:50:26 +0000 (+0000) Subject: Various improvements of PCI-X and PCI Express dumps. X-Git-Tag: v3.0.0~91 X-Git-Url: http://mj.ucw.cz/gitweb/?a=commitdiff_plain;h=3b8bf739316c3481116de9e96e1b5740493efa81;p=pciutils.git Various improvements of PCI-X and PCI Express dumps. git-archimport-id: mj@ucw.cz--public/pciutils--main--2.2--patch-74 --- diff --git a/ChangeLog b/ChangeLog index 2a52e8c..9c5973e 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,5 +1,18 @@ 2005-08-23 Martin Mares + * lspci.c (show_pcix_nobridge, show_pcix_bridge): Cleaned up dumping of PCI-X + capabilities. Includes partial support for PCI-X 2.0 (probably incomplete + as I haven't seen the spec). + + * lspci.c: Quell warnings about unused parameters. + + * lib/header.h: Merged definitions of extended capabilities and some new + PCI-X capability bits from linux-2.6.11/include/pci.h. + + * lspci.c (show_caps): Try to scan extended capabilities only if the + device has either PCI-X or PCI Express capability in its normal capability + list. + * lib/dump.c (dump_init): Reading of dumps works again. * setpci.man, lspci.c, README: prefer spelling "buses" over "busses". diff --git a/TODO b/TODO index ff4a199..bf48ef4 100644 --- a/TODO +++ b/TODO @@ -1,5 +1,6 @@ - lspci: don't die when non-root tries to dump cardbus data; mention the "available only to root" things in the man page. And possibly adjust exit code. +- reading of VPD - names.c: rewrite @@ -7,6 +8,10 @@ - unused parameter warnings +- some extended capabilities are currently only partially decoded +- finish PCI-X 2.0 capabilities +- finish PCI Express support + PCIIDS: - another mirror at Atrey? - delete old DB at SF diff --git a/lib/header.h b/lib/header.h index f1e62c5..9071831 100644 --- a/lib/header.h +++ b/lib/header.h @@ -300,7 +300,8 @@ #define PCI_PCIX_STATUS_DESIGNED_MAX_OUTSTANDING_SPLIT_TRANS 0x03800000 #define PCI_PCIX_STATUS_DESIGNED_MAX_CUMULATIVE_READ_SIZE 0x1c000000 #define PCI_PCIX_STATUS_RCVD_SC_ERR_MESS 0x20000000 /* Received Split Completion Error Message */ -#define PCI_PCIX_STATUS_RESERVED 0xc0000000 +#define PCI_PCIX_STATUS_266MHZ 0x40000000 /* 266 MHz capable */ +#define PCI_PCIX_STATUS_533MHZ 0x80000000 /* 533 MHz capable */ #define PCI_PCIX_SIZEOF 4 /* PCI-X Bridges */ @@ -773,6 +774,64 @@ #define PCI_MSIX_PBA 8 #define PCI_MSIX_BIR 0x7 +/* Advanced Error Reporting */ +#define PCI_ERR_UNCOR_STATUS 4 /* Uncorrectable Error Status */ +#define PCI_ERR_UNC_TRAIN 0x00000001 /* Training */ +#define PCI_ERR_UNC_DLP 0x00000010 /* Data Link Protocol */ +#define PCI_ERR_UNC_POISON_TLP 0x00001000 /* Poisoned TLP */ +#define PCI_ERR_UNC_FCP 0x00002000 /* Flow Control Protocol */ +#define PCI_ERR_UNC_COMP_TIME 0x00004000 /* Completion Timeout */ +#define PCI_ERR_UNC_COMP_ABORT 0x00008000 /* Completer Abort */ +#define PCI_ERR_UNC_UNX_COMP 0x00010000 /* Unexpected Completion */ +#define PCI_ERR_UNC_RX_OVER 0x00020000 /* Receiver Overflow */ +#define PCI_ERR_UNC_MALF_TLP 0x00040000 /* Malformed TLP */ +#define PCI_ERR_UNC_ECRC 0x00080000 /* ECRC Error Status */ +#define PCI_ERR_UNC_UNSUP 0x00100000 /* Unsupported Request */ +#define PCI_ERR_UNCOR_MASK 8 /* Uncorrectable Error Mask */ + /* Same bits as above */ +#define PCI_ERR_UNCOR_SEVER 12 /* Uncorrectable Error Severity */ + /* Same bits as above */ +#define PCI_ERR_COR_STATUS 16 /* Correctable Error Status */ +#define PCI_ERR_COR_RCVR 0x00000001 /* Receiver Error Status */ +#define PCI_ERR_COR_BAD_TLP 0x00000040 /* Bad TLP Status */ +#define PCI_ERR_COR_BAD_DLLP 0x00000080 /* Bad DLLP Status */ +#define PCI_ERR_COR_REP_ROLL 0x00000100 /* REPLAY_NUM Rollover */ +#define PCI_ERR_COR_REP_TIMER 0x00001000 /* Replay Timer Timeout */ +#define PCI_ERR_COR_MASK 20 /* Correctable Error Mask */ + /* Same bits as above */ +#define PCI_ERR_CAP 24 /* Advanced Error Capabilities */ +#define PCI_ERR_CAP_FEP(x) ((x) & 31) /* First Error Pointer */ +#define PCI_ERR_CAP_ECRC_GENC 0x00000020 /* ECRC Generation Capable */ +#define PCI_ERR_CAP_ECRC_GENE 0x00000040 /* ECRC Generation Enable */ +#define PCI_ERR_CAP_ECRC_CHKC 0x00000080 /* ECRC Check Capable */ +#define PCI_ERR_CAP_ECRC_CHKE 0x00000100 /* ECRC Check Enable */ +#define PCI_ERR_HEADER_LOG 28 /* Header Log Register (16 bytes) */ +#define PCI_ERR_ROOT_COMMAND 44 /* Root Error Command */ +#define PCI_ERR_ROOT_STATUS 48 +#define PCI_ERR_ROOT_COR_SRC 52 +#define PCI_ERR_ROOT_SRC 54 + +/* Virtual Channel */ +#define PCI_VC_PORT_REG1 4 +#define PCI_VC_PORT_REG2 8 +#define PCI_VC_PORT_CTRL 12 +#define PCI_VC_PORT_STATUS 14 +#define PCI_VC_RES_CAP 16 +#define PCI_VC_RES_CTRL 20 +#define PCI_VC_RES_STATUS 26 + +/* Power Budgeting */ +#define PCI_PWR_DSR 4 /* Data Select Register */ +#define PCI_PWR_DATA 8 /* Data Register */ +#define PCI_PWR_DATA_BASE(x) ((x) & 0xff) /* Base Power */ +#define PCI_PWR_DATA_SCALE(x) (((x) >> 8) & 3) /* Data Scale */ +#define PCI_PWR_DATA_PM_SUB(x) (((x) >> 10) & 7) /* PM Sub State */ +#define PCI_PWR_DATA_PM_STATE(x) (((x) >> 13) & 3) /* PM State */ +#define PCI_PWR_DATA_TYPE(x) (((x) >> 15) & 7) /* Type */ +#define PCI_PWR_DATA_RAIL(x) (((x) >> 18) & 7) /* Power Rail */ +#define PCI_PWR_CAP 12 /* Capability */ +#define PCI_PWR_CAP_BUDGET(x) ((x) & 1) /* Included in system budget */ + /* * The PCI interface treats multi-function devices as independent * devices. The slot/function address of each device is encoded diff --git a/lspci.c b/lspci.c index c6c4dfb..bbe1a22 100644 --- a/lspci.c +++ b/lspci.c @@ -464,8 +464,9 @@ show_pcix_nobridge(struct device *d, int where) { u16 command; u32 status; + static const byte max_outstanding[8] = { 1, 2, 3, 4, 8, 12, 16, 32 }; - printf("PCI-X non-bridge device.\n"); + printf("PCI-X non-bridge device\n"); if (verbose < 2) return; @@ -478,31 +479,33 @@ show_pcix_nobridge(struct device *d, int where) printf("\t\tCommand: DPERE%c ERO%c RBC=%d OST=%d\n", FLAG(command, PCI_PCIX_COMMAND_DPERE), FLAG(command, PCI_PCIX_COMMAND_ERO), - ((command & PCI_PCIX_COMMAND_MAX_MEM_READ_BYTE_COUNT) >> 2U), - ((command & PCI_PCIX_COMMAND_MAX_OUTSTANDING_SPLIT_TRANS) >> 4U)); - printf("\t\tStatus: Bus=%u Dev=%u Func=%u 64bit%c 133MHz%c SCD%c USC%c, DC=%s, DMMRBC=%u, DMOST=%u, DMCRS=%u, RSCEM%c\n", - ((status >> 8) & 0xffU), // bus - ((status >> 3) & 0x1fU), // dev - (status & PCI_PCIX_STATUS_FUNCTION), // function + 1 << (9 + ((command & PCI_PCIX_COMMAND_MAX_MEM_READ_BYTE_COUNT) >> 2U)), + max_outstanding[(command & PCI_PCIX_COMMAND_MAX_OUTSTANDING_SPLIT_TRANS) >> 4U]); + printf("\t\tStatus: Dev=%02x:%02x.%d 64bit%c 133MHz%c SCD%c USC%c DC=%s DMMRBC=%u DMOST=%u DMCRS=%u RSCEM%c 266MHz%c 533MHz%c\n", + ((status >> 8) & 0xff), // bus + ((status >> 3) & 0x1f), // device + (status & PCI_PCIX_STATUS_FUNCTION), // function FLAG(status, PCI_PCIX_STATUS_64BIT), FLAG(status, PCI_PCIX_STATUS_133MHZ), FLAG(status, PCI_PCIX_STATUS_SC_DISCARDED), FLAG(status, PCI_PCIX_STATUS_UNEXPECTED_SC), ((status & PCI_PCIX_STATUS_DEVICE_COMPLEXITY) ? "bridge" : "simple"), - ((status >> 21) & 3U), - ((status >> 23) & 7U), - ((status >> 26) & 7U), - FLAG(status, PCI_PCIX_STATUS_RCVD_SC_ERR_MESS)); + 1 << (9 + ((status >> 21) & 3U)), + max_outstanding[(status >> 23) & 7U], + 1 << (3 + ((status >> 26) & 7U)), + FLAG(status, PCI_PCIX_STATUS_RCVD_SC_ERR_MESS), + FLAG(status, PCI_PCIX_STATUS_266MHZ), + FLAG(status, PCI_PCIX_STATUS_533MHZ)); } static void show_pcix_bridge(struct device *d, int where) { - + static const byte * const sec_clock_freq[8] = { "conv", "66MHz", "100MHz", "133MHz", "?4", "?5", "?6", "?7" }; u16 secstatus; u32 status, upstcr, downstcr; - printf("PCI-X bridge device.\n"); + printf("PCI-X bridge device\n"); if (verbose < 2) return; @@ -511,19 +514,19 @@ show_pcix_bridge(struct device *d, int where) return; secstatus = get_conf_word(d, where + PCI_PCIX_BRIDGE_SEC_STATUS); - printf("\t\tSecondary Status: 64bit%c, 133MHz%c, SCD%c, USC%c, SCO%c, SRD%c Freq=%d\n", + printf("\t\tSecondary Status: 64bit%c 133MHz%c SCD%c USC%c SCO%c SRD%c Freq=%s\n", FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_64BIT), FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_133MHZ), FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_SC_DISCARDED), FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_UNEXPECTED_SC), FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_SC_OVERRUN), FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_SPLIT_REQUEST_DELAYED), - ((secstatus >> 6) & 7)); + sec_clock_freq[(secstatus >> 6) & 7]); status = get_conf_long(d, where + PCI_PCIX_BRIDGE_STATUS); - printf("\t\tStatus: Bus=%u Dev=%u Func=%u 64bit%c 133MHz%c SCD%c USC%c, SCO%c, SRD%c\n", - ((status >> 8) & 0xff), // bus - ((status >> 3) & 0x1f), // dev - (status & PCI_PCIX_BRIDGE_STATUS_FUNCTION), // function + printf("\t\tStatus: Dev=%02x:%02x.%d 64bit%c 133MHz%c SCD%c USC%c SCO%c SRD%c\n", + ((status >> 8) & 0xff), // bus + ((status >> 3) & 0x1f), // device + (status & PCI_PCIX_BRIDGE_STATUS_FUNCTION), // function FLAG(status, PCI_PCIX_BRIDGE_STATUS_64BIT), FLAG(status, PCI_PCIX_BRIDGE_STATUS_133MHZ), FLAG(status, PCI_PCIX_BRIDGE_STATUS_SC_DISCARDED), @@ -531,11 +534,11 @@ show_pcix_bridge(struct device *d, int where) FLAG(status, PCI_PCIX_BRIDGE_STATUS_SC_OVERRUN), FLAG(status, PCI_PCIX_BRIDGE_STATUS_SPLIT_REQUEST_DELAYED)); upstcr = get_conf_long(d, where + PCI_PCIX_BRIDGE_UPSTREAM_SPLIT_TRANS_CTRL); - printf("\t\t: Upstream: Capacity=%u, Commitment Limit=%u\n", + printf("\t\tUpstream: Capacity=%u CommitmentLimit=%u\n", (upstcr & PCI_PCIX_BRIDGE_STR_CAPACITY), (upstcr >> 16) & 0xffff); downstcr = get_conf_long(d, where + PCI_PCIX_BRIDGE_DOWNSTREAM_SPLIT_TRANS_CTRL); - printf("\t\t: Downstream: Capacity=%u, Commitment Limit=%u\n", + printf("\t\tDownstream: Capacity=%u CommitmentLimit=%u\n", (downstcr & PCI_PCIX_BRIDGE_STR_CAPACITY), (downstcr >> 16) & 0xffff); } @@ -584,7 +587,7 @@ show_ht_pri(struct device *d, int where, int cmd) return; rid = get_conf_byte(d, where + PCI_HT_PRI_RID); if (rid < 0x23 && rid > 0x11) - printf("\t!!! Possibly incomplete decoding\n"); + printf("\t\t!!! Possibly incomplete decoding\n"); if (rid >= 0x23) fmt = "\t\tCommand: BaseUnitID=%u UnitCnt=%u MastHost%c DefDir%c DUL%c\n"; @@ -752,7 +755,7 @@ show_ht_sec(struct device *d, int where, int cmd) return; rid = get_conf_byte(d, where + PCI_HT_SEC_RID); if (rid < 0x23 && rid > 0x11) - printf("\t!!! Possibly incomplete decoding\n"); + printf("\t\t!!! Possibly incomplete decoding\n"); if (rid >= 0x23) fmt = "\t\tCommand: WarmRst%c DblEnd%c DevNum=%u ChainSide%c HostHide%c Slave%c