From: Ben Widawsky <ben.widawsky@intel.com>
Date: Sat, 1 Aug 2020 05:12:43 +0000 (-0700)
Subject: cxl: Add DVSEC Register Locator
X-Git-Tag: v3.9.0~27^2~1
X-Git-Url: http://mj.ucw.cz/gitweb/?a=commitdiff_plain;h=0dfa1050264bbaf349373124842097c41b5f443e;p=pciutils.git

cxl: Add DVSEC Register Locator

Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
Co-authored-by: Jaxon Haws <jaxon.haws@amd.com>
Signed-off-by: Jaxon Haws <jaxon.haws@amd.com>
---

diff --git a/lib/header.h b/lib/header.h
index 7cbc40f..33ed2be 100644
--- a/lib/header.h
+++ b/lib/header.h
@@ -1126,6 +1126,14 @@
 #define PCI_CXL_PORT_ALT_MEM_BASE 0x10
 #define PCI_CXL_PORT_ALT_MEM_LIMIT 0x12
 
+/* PCIe CXL 2.0 Designated Vendor-Specific Capabilities for Register Locator */
+#define PCI_CXL_RL_BASE0_LO 0x0c
+#define PCI_CXL_RL_BASE0_HI 0x10
+#define PCI_CXL_RL_BASE1_LO 0x14
+#define PCI_CXL_RL_BASE1_HI 0x18
+#define PCI_CXL_RL_BASE2_LO 0x1c
+#define PCI_CXL_RL_BASE2_HI 0x20
+
 /* Access Control Services */
 #define PCI_ACS_CAP		0x04	/* ACS Capability Register */
 #define PCI_ACS_CAP_VALID	0x0001	/* ACS Source Validation */
diff --git a/ls-ecaps.c b/ls-ecaps.c
index 87f51b0..5a94093 100644
--- a/ls-ecaps.c
+++ b/ls-ecaps.c
@@ -801,9 +801,43 @@ dvsec_cxl_port(struct device *d, int where)
   printf("\t\tAlternateBus:\t%04x-%04x\n", m1, m2);
 }
 
+static const char *id[] = {
+  "empty",
+  "component registers",
+  "BAR virtualization",
+  "CXL device registers"};
+
+static inline void
+dvsec_decode_block(uint32_t lo, uint32_t hi, char which)
+{
+  u64 base_hi = hi, base_lo;
+  u8 bir, block_id;
+
+  bir = BITS(lo, 0, 3);
+  block_id = BITS(lo, 8, 8);
+  base_lo = BITS(lo, 16, 16);
+
+  if (!block_id)
+    return;
+
+  printf("\t\tBlock%c\tBIR: bar%d\tID: %s\n", which, bir, id[block_id]);
+  printf("\t\t\tRegisterOffset: %016" PCI_U64_FMT_X "\n", (base_hi << 32ULL) | base_lo << 16);
+}
+
+static void
+dvsec_cxl_register_locator(struct device *d, int where, int len)
+{
+  int i, j;
+
+  for (i = 0xc, j = 1; i < len; i += 8, j++) {
+    dvsec_decode_block(get_conf_long(d, where + i), get_conf_long(d, where + i + 4), j + 0x31);
+  }
+}
+
 static void
 cap_dvsec_cxl(struct device *d, int id, int where)
 {
+  u16 len;
   u8 rev;
 
   printf(": CXL\n");
@@ -825,6 +859,13 @@ cap_dvsec_cxl(struct device *d, int id, int where)
 
       dvsec_cxl_port(d, where);
       break;
+    case 8:
+      len = BITS(get_conf_word(d, where + 0x6), 4, 12);
+      if (!config_fetch(d, where, len))
+        return;
+
+      dvsec_cxl_register_locator(d, where, len);
+      break;
     default:
       break;
   }