From: Mateusz Nowicki <mateusz.nowicki@solidigm.com>
Date: Fri, 1 Sep 2023 13:41:59 +0000 (+0200)
Subject: Add support for 32.0 GT/s header
X-Git-Tag: v3.11.0~90
X-Git-Url: http://mj.ucw.cz/gitweb/?a=commitdiff_plain;ds=sidebyside;h=db43fb5e8f2c04c409bdd06ac2c2828685038d69;p=pciutils.git

Add support for 32.0 GT/s header
---

diff --git a/lib/header.h b/lib/header.h
index 5ab606f..57ef0ae 100644
--- a/lib/header.h
+++ b/lib/header.h
@@ -254,6 +254,7 @@
 #define PCI_EXT_CAP_ID_LMR	0x27	/* Lane Margining at Receiver */
 #define PCI_EXT_CAP_ID_HIER_ID	0x28	/* Hierarchy ID */
 #define PCI_EXT_CAP_ID_NPEM	0x29	/* Native PCIe Enclosure Management */
+#define PCI_EXT_CAP_ID_32GT	0x2a	/* Physical Layer 32.0 GT/s */
 #define PCI_EXT_CAP_ID_DOE	0x2e	/* Data Object Exchange */
 
 /*** Definitions of capabilities ***/
diff --git a/ls-ecaps.c b/ls-ecaps.c
index 1bd1bf7..6028607 100644
--- a/ls-ecaps.c
+++ b/ls-ecaps.c
@@ -1556,6 +1556,9 @@ show_ext_caps(struct device *d, int type)
 	  case PCI_EXT_CAP_ID_NPEM:
 	    printf("Native PCIe Enclosure Management <?>\n");
 	    break;
+      case PCI_EXT_CAP_ID_32GT:
+	    printf("Physical Layer 32.0 GT/s <?>\n");
+        break;
 	  case PCI_EXT_CAP_ID_DOE:
 	    cap_doe(d, where);
 	    break;