Single Root I/O Virtualization capability support

Signed-off-by: Yu Zhao <yu.zhao@intel.com>
lib/header.h |   28 ++++++++++++++++++++++++++++
lspci.c      |   46 ++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 74 insertions(+)

diff --git a/lib/header.h b/lib/header.h
index 209e60fb4d360a03a39af6372d5309c9db39d97d..28c866efc390b6a21fabbec32c9b3adeb5851acd 100644 (file)
--- a/lib/header.h
+++ b/lib/header.h
@@ -220,6 +220,7 @@
 #define PCI_EXT_CAP_ID_VNDR    0x0b    /* Vendor specific */
 #define PCI_EXT_CAP_ID_ACS     0x0d    /* Access Controls */
 #define PCI_EXT_CAP_ID_ARI     0x0e    /* Alternative Routing-ID Interpretation */
+#define PCI_EXT_CAP_ID_SRIOV   0x10    /* Single Root I/O Virtualization */
 
 /* Power Management Registers */
 
@@ -952,6 +953,33 @@
 #define  PCI_ARI_CTRL_ACS      0x0002  /* ACS Function Groups Enable */
 #define  PCI_ARI_CTRL_FG(x)    (((x) >> 4) & 7) /* Function Group */
 
+/* Single Root I/O Virtualization */
+#define PCI_IOV_CAP            0x04    /* SR-IOV Capability Register */
+#define  PCI_IOV_CAP_VFM       0x00000001 /* VF Migration Capable */
+#define  PCI_IOV_CAP_IMN(x)    ((x) >> 21) /* VF Migration Interrupt Message Number */
+#define PCI_IOV_CTRL           0x08    /* SR-IOV Control Register */
+#define  PCI_IOV_CTRL_VFE      0x0001  /* VF Enable */
+#define  PCI_IOV_CTRL_VFME     0x0002  /* VF Migration Enable */
+#define  PCI_IOV_CTRL_VFMIE    0x0004  /* VF Migration Interrupt Enable */
+#define  PCI_IOV_CTRL_MSE      0x0008  /* VF MSE */
+#define  PCI_IOV_CTRL_ARI      0x0010  /* ARI Capable Hierarchy */
+#define PCI_IOV_STATUS         0x0a    /* SR-IOV Status Register */
+#define  PCI_IOV_STATUS_MS     0x0001  /* VF Migration Status */
+#define PCI_IOV_INITIALVF      0x0c    /* Number of VFs that are initially associated */
+#define PCI_IOV_TOTALVF                0x0e    /* Maximum number of VFs that could be associated */
+#define PCI_IOV_NUMVF          0x10    /* Number of VFs that are available */
+#define PCI_IOV_FDL            0x12    /* Function Dependency Link */
+#define PCI_IOV_OFFSET         0x14    /* First VF Offset */
+#define PCI_IOV_STRIDE         0x16    /* Routing ID offset from one VF to the next one */
+#define PCI_IOV_DID            0x1a    /* VF Device ID */
+#define PCI_IOV_SUPPS          0x1c    /* Supported Page Sizes */
+#define PCI_IOV_SYSPS          0x20    /* System Page Size */
+#define PCI_IOV_BAR_BASE       0x24    /* VF BAR0, VF BAR1, ... VF BAR5 */
+#define PCI_IOV_NUM_BAR                6       /* Number of VF BARs */
+#define PCI_IOV_MSAO           0x3c    /* VF Migration State Array Offset */
+#define PCI_IOV_MSA_BIR(x)     ((x) & 7) /* VF Migration State BIR */
+#define PCI_IOV_MSA_OFFSET(x)  ((x) & 0xfffffff8) /* VF Migration State Offset */
+
 /*
  * The PCI interface treats multi-function devices as independent
  * devices.  The slot/function address of each device is encoded

diff --git a/lspci.c b/lspci.c
index 3f29474d96fda759ee0f7a545dffaa4f47585f89..06efc2d67b0a9b5437a7ba9942087b83f75cdd80 100644 (file)
--- a/lspci.c
+++ b/lspci.c
@@ -1577,6 +1577,49 @@ cap_ari(struct device *d, int where)
        PCI_ARI_CTRL_FG(w));
 }
 
+static void
+cap_sriov(struct device *d, int where)
+{
+  u16 b;
+  u16 w;
+  u32 l;
+
+  printf("Single Root I/O Virtualization (SR-IOV)\n");
+  if (!config_fetch(d, where + PCI_IOV_CAP, 0x3c))
+    return;
+
+  l = get_conf_long(d, where + PCI_IOV_CAP);
+  printf("\t\tIOVCap:\tMigration%c, Interrupt Message Number: %03x\n",
+       FLAG(l, PCI_IOV_CAP_VFM), PCI_IOV_CAP_IMN(l));
+  w = get_conf_word(d, where + PCI_IOV_CTRL);
+  printf("\t\tIOVCtl:\tEnable%c Migration%c Interrupt%c MSE%c ARIHierarchy%c\n",
+       FLAG(w, PCI_IOV_CTRL_VFE), FLAG(w, PCI_IOV_CTRL_VFME),
+       FLAG(w, PCI_IOV_CTRL_VFMIE), FLAG(w, PCI_IOV_CTRL_MSE),
+       FLAG(w, PCI_IOV_CTRL_ARI));
+  w = get_conf_word(d, where + PCI_IOV_STATUS);
+  printf("\t\tIOVSta:\tMigration%c\n", FLAG(w, PCI_IOV_STATUS_MS));
+  w = get_conf_word(d, where + PCI_IOV_INITIALVF);
+  printf("\t\tInitial VFs: %d, ", w);
+  w = get_conf_word(d, where + PCI_IOV_TOTALVF);
+  printf("Total VFs: %d, ", w);
+  w = get_conf_word(d, where + PCI_IOV_NUMVF);
+  printf("Number of VFs: %d, ", w);
+  b = get_conf_byte(d, where + PCI_IOV_FDL);
+  printf("Function Dependency Link: %02x\n", b);
+  w = get_conf_word(d, where + PCI_IOV_OFFSET);
+  printf("\t\tVF offset: %d, ", w);
+  w = get_conf_word(d, where + PCI_IOV_STRIDE);
+  printf("stride: %d, ", w);
+  w = get_conf_word(d, where + PCI_IOV_DID);
+  printf("Device ID: %04x\n", w);
+  l = get_conf_long(d, where + PCI_IOV_SUPPS);
+  printf("\t\tSupported Page Size: %08x, ", l);
+  l = get_conf_long(d, where + PCI_IOV_SYSPS);
+  printf("System Page Size: %08x\n", l);
+  printf("\t\tVF Migration: offset: %08x, BIR: %x\n", PCI_IOV_MSA_OFFSET(l),
+       PCI_IOV_MSA_BIR(l));
+}
+
 static void
 show_ext_caps(struct device *d)
 {
@@ -1638,6 +1681,9 @@ show_ext_caps(struct device *d)
          case PCI_EXT_CAP_ID_ARI:
            cap_ari(d, where);
            break;
+         case PCI_EXT_CAP_ID_SRIOV:
+           cap_sriov(d, where);
+           break;
          default:
            printf("#%02x\n", id);
            break;