pciaddr_t bridge_base_addr[4]; /* Bridge base addresses (without flags) */
pciaddr_t bridge_size[4]; /* Bridge sizes */
pciaddr_t bridge_flags[4]; /* PCI_IORESOURCE_* flags for bridge addresses */
+ u8 prog_if, rev_id; /* Programming interface for device_class and revision id */
+ u16 subsys_vendor_id, subsys_id; /* Subsystem vendor id and subsystem id */
/* Fields used internally */
struct pci_access *access;
#define PCI_FILL_IOMMU_GROUP 0x4000
#define PCI_FILL_BRIDGE_BASES 0x8000
#define PCI_FILL_RESCAN 0x00010000
+#define PCI_FILL_CLASS_EXT 0x00020000 /* prog_if and rev_id */
+#define PCI_FILL_SUBSYS 0x00040000 /* subsys_vendor_id and subsys_id */
void pci_setup_cache(struct pci_dev *, u8 *cache, int len) PCI_ABI;