Access Control Services capability support

Signed-off-by: Yu Zhao <yu.zhao@intel.com>
lib/header.h |   20 ++++++++++++++++++++
lspci.c      |   25 ++++++++++++++++++++++++-
2 files changed, 44 insertions(+), 1 deletion(-)

diff --git a/lib/header.h b/lib/header.h
index ef4b8fb3f42b37c34fc138c034b73d8ed152f4de..d2ad400039bb50efe3c21314c0030e0bb5478b90 100644 (file)
--- a/lib/header.h
+++ b/lib/header.h
@@ -921,6 +921,26 @@
 #define PCI_PWR_CAP            12      /* Capability */
 #define  PCI_PWR_CAP_BUDGET(x) ((x) & 1)       /* Included in system budget */
 
+/* Access Control Services */
+#define PCI_ACS_CAP            0x04    /* ACS Capability Register */
+#define PCI_ACS_CAP_VALID      0x0001  /* ACS Source Validation */
+#define PCI_ACS_CAP_BLOCK      0x0002  /* ACS Translation Blocking */
+#define PCI_ACS_CAP_REQ_RED    0x0004  /* ACS P2P Request Redirect */
+#define PCI_ACS_CAP_CMPLT_RED  0x0008  /* ACS P2P Completion Redirect */
+#define PCI_ACS_CAP_FORWARD    0x0010  /* ACS Upstream Forwarding */
+#define PCI_ACS_CAP_EGRESS     0x0020  /* ACS P2P Egress Control */
+#define PCI_ACS_CAP_TRANS      0x0040  /* ACS Direct Translated P2P */
+#define PCI_ACS_CAP_VECTOR(x)  (((x) >> 8) & 0xff) /* Egress Control Vector Size */
+#define PCI_ACS_CTRL           0x06    /* ACS Control Register */
+#define PCI_ACS_CTRL_VALID     0x0001  /* ACS Source Validation Enable */
+#define PCI_ACS_CTRL_BLOCK     0x0002  /* ACS Translation Blocking Enable */
+#define PCI_ACS_CTRL_REQ_RED   0x0004  /* ACS P2P Request Redirect Enable */
+#define PCI_ACS_CTRL_CMPLT_RED 0x0008  /* ACS P2P Completion Redirect Enable */
+#define PCI_ACS_CTRL_FORWARD   0x0010  /* ACS Upstream Forwarding Enable */
+#define PCI_ACS_CTRL_EGRESS    0x0020  /* ACS P2P Egress Control Enable */
+#define PCI_ACS_CTRL_TRANS     0x0040  /* ACS Direct Translated P2P Enable */
+#define PCI_ACS_EGRESS_CTRL    0x08    /* Egress Control Vector */
+
 /*
  * The PCI interface treats multi-function devices as independent
  * devices.  The slot/function address of each device is encoded

diff --git a/lspci.c b/lspci.c
index 207ca60aae725c75449c583cc57dd9d7411272e8..ce6d54aa2f20dcc109df59433481e55fd318754e 100644 (file)
--- a/lspci.c
+++ b/lspci.c
@@ -1535,6 +1535,29 @@ cap_aer(struct device *d, int where)
 
 }
 
+static void
+cap_acs(struct device *d, int where)
+{
+  u16 w;
+
+  printf("Access Control Services\n");
+  if (!config_fetch(d, where + PCI_ACS_CAP, 4))
+    return;
+
+  w = get_conf_word(d, where + PCI_ACS_CAP);
+  printf("\t\tACSCap:\tSrcValid%c TransBlk%c ReqRedir%c CmpltRedir%c UpstreamFwd%c EgressCtrl%c "
+       "DirectTrans%c\n",
+       FLAG(w, PCI_ACS_CAP_VALID), FLAG(w, PCI_ACS_CAP_BLOCK), FLAG(w, PCI_ACS_CAP_REQ_RED),
+       FLAG(w, PCI_ACS_CAP_CMPLT_RED), FLAG(w, PCI_ACS_CAP_FORWARD), FLAG(w, PCI_ACS_CAP_EGRESS),
+       FLAG(w, PCI_ACS_CAP_TRANS));
+  w = get_conf_word(d, where + PCI_ACS_CTRL);
+  printf("\t\tACSCtl:\tSrcValid%c TransBlk%c ReqRedir%c CmpltRedir%c UpstreamFwd%c EgressCtrl%c "
+       "DirectTrans%c\n",
+       FLAG(w, PCI_ACS_CTRL_VALID), FLAG(w, PCI_ACS_CTRL_BLOCK), FLAG(w, PCI_ACS_CTRL_REQ_RED),
+       FLAG(w, PCI_ACS_CTRL_CMPLT_RED), FLAG(w, PCI_ACS_CTRL_FORWARD), FLAG(w, PCI_ACS_CTRL_EGRESS),
+       FLAG(w, PCI_ACS_CTRL_TRANS));
+}
+
 static void
 show_ext_caps(struct device *d)
 {
@@ -1591,7 +1614,7 @@ show_ext_caps(struct device *d)
            printf("Vendor Specific Information <?>\n");
            break;
          case PCI_EXT_CAP_ID_ACS:
-           printf("Access Controls <?>\n");
+           cap_acs(d, where);
            break;
          default:
            printf("#%02x\n", id);