Ordering of our cached list of capabilities now respects the original
order in the device's configuration space.
{
struct pci_cap *cap = pci_malloc(d->access, sizeof(*cap));
- cap->next = d->first_cap;
- d->first_cap = cap;
+ if (d->last_cap)
+ d->last_cap->next = cap;
+ else
+ d->first_cap = cap;
+ d->last_cap = cap;
cap->addr = addr;
cap->id = id;
cap->type = type;
int hdrtype; /* Cached low 7 bits of header type, -1 if unknown */
void *aux; /* Auxiliary data */
struct pci_property *properties; /* A linked list of extra properties */
+ struct pci_cap *last_cap; /* Last capability in the list */
};
#define PCI_ADDR_IO_MASK (~(pciaddr_t) 0x3)