#define MB_OUR_ADDRESS 42
-static void UNUSED xx_write_char(uint c) // FIXME
-{
- usart_set_mode(USART2, USART_MODE_TX);
- gpio_set(GPIOA, GPIO1);
- usart_send_blocking(USART2, c);
- while (!usart_get_flag(USART2, USART_SR_TC))
- ;
- gpio_clear(GPIOA, GPIO1);
- usart_set_mode(USART2, USART_MODE_RX);
-}
-
static void rx_init(void)
{
state = STATE_RX;
{
u32 status = USART_SR(USART2);
- // FIXME: Optimize
-
if (status & USART_SR_RXNE) {
uint ch = usart_recv(USART2);
if (state == STATE_RX) {
-#if 0
if (status & (USART_SR_FE | USART_SR_ORE | USART_SR_NE)) {
rx_bad = 1;
- } else
-#endif
- if (rx_size < RX_BUFSIZE) {
+ } else if (rx_size < RX_BUFSIZE) {
rx_buf[rx_size++] = ch;
} else {
// Frame too long
state = STATE_TX_LAST;
}
}
- }
-
- if (state == STATE_TX_LAST) {
+ } else if (state == STATE_TX_LAST) {
if (status & USART_SR_TC) {
// Transfer of the last byte is complete. Release the bus.
USART_CR1(USART2) &= ~USART_CR1_TCIE;
// gpio_set_mode(GPIOA, GPIO_MODE_OUTPUT_50_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, GPIO8);
for (;;) {
- //gpio_toggle(GPIOC, GPIO13);
+ gpio_toggle(GPIOC, GPIO13);
delay_ms(50);
// gpio_toggle(GPIOA, GPIO8);
//timer_set_oc_mode(TIM4, TIM_OC1, TIM_OCM_FORCE_LOW);