Add PCIe Gen 3 speeds and link status fields

Patch by Adrian Huang.

diff --git a/lib/header.h b/lib/header.h
index d481f276919e6df1d3666625a60ded8a27343c2e..85b8b9f62d3face9bd4b7ed208812372b5f2685f 100644 (file)
--- a/lib/header.h
+++ b/lib/header.h
@@ -860,9 +860,14 @@
 #define  PCI_EXP_LNKCTL2_MARGIN(x)     (((x) >> 7) & 7) /* Transmit Margin */
 #define  PCI_EXP_LNKCTL2_MOD_CMPLNC    0x0400  /* Enter Modified Compliance */
 #define  PCI_EXP_LNKCTL2_CMPLNC_SOS    0x0800  /* Compliance SOS */
-#define  PCI_EXP_LNKCTL2_COM_DEEMPHASIS(x) (((x) >> 12) & 1) /* Compliance De-emphasis */
+#define  PCI_EXP_LNKCTL2_COM_DEEMPHASIS(x) (((x) >> 12) & 0xf) /* Compliance De-emphasis */
 #define PCI_EXP_LNKSTA2                        0x32    /* Link Status */
 #define  PCI_EXP_LINKSTA2_DEEMPHASIS(x)        ((x) & 1)       /* Current De-emphasis Level */
+#define  PCI_EXP_LINKSTA2_EQU_COMP     0x02    /* Equalization Complete */
+#define  PCI_EXP_LINKSTA2_EQU_PHASE1   0x04    /* Equalization Phase 1 Successful */
+#define  PCI_EXP_LINKSTA2_EQU_PHASE2   0x08    /* Equalization Phase 2 Successful */
+#define  PCI_EXP_LINKSTA2_EQU_PHASE3   0x10    /* Equalization Phase 3 Successful */
+#define  PCI_EXP_LINKSTA2_EQU_REQ      0x20    /* Link Equalization Request */
 #define PCI_EXP_SLTCAP2                        0x34    /* Slot Capabilities */
 #define PCI_EXP_SLTCTL2                        0x38    /* Slot Control */
 #define PCI_EXP_SLTSTA2                        0x3a    /* Slot Status */

diff --git a/ls-caps.c b/ls-caps.c
index a4bf713cac7b8e1a12e75fcfc88768c5a400ed3e..9645e5a8c40dc2049397fa2aa795dc13c742287a 100644 (file)
--- a/ls-caps.c
+++ b/ls-caps.c
@@ -717,6 +717,8 @@ static char *link_speed(int speed)
        return "2.5GT/s";
       case 2:
        return "5GT/s";
+      case 3:
+       return "8GT/s";
       default:
        return "unknown";
     }
@@ -728,6 +730,8 @@ static char *aspm_support(int code)
     {
       case 1:
        return "L0s";
+      case 2:
+       return "L1";
       case 3:
        return "L0s L1";
       default:
@@ -949,6 +953,8 @@ static const char *cap_express_link2_speed(int type)
        return "2.5GT/s";
       case 2:
        return "5GT/s";
+      case 3:
+       return "8GT/s";
       default:
        return "Unknown";
     }
@@ -1003,8 +1009,14 @@ static void cap_express_link2(struct device *d, int where, int type UNUSED)
        cap_express_link2_deemphasis(PCI_EXP_LNKCTL2_COM_DEEMPHASIS(w)));
 
   w = get_conf_word(d, where + PCI_EXP_LNKSTA2);
-  printf("\t\tLnkSta2: Current De-emphasis Level: %s\n",
-       cap_express_link2_deemphasis(PCI_EXP_LINKSTA2_DEEMPHASIS(w)));
+  printf("\t\tLnkSta2: Current De-emphasis Level: %s, EqualizationComplete%c, EqualizationPhase1%c\n"
+       "\t\t\t EqualizationPhase2%c, EqualizationPhase3%c, LinkEqualizationRequest%c\n",
+       cap_express_link2_deemphasis(PCI_EXP_LINKSTA2_DEEMPHASIS(w)),
+       FLAG(w, PCI_EXP_LINKSTA2_EQU_COMP),
+       FLAG(w, PCI_EXP_LINKSTA2_EQU_PHASE1),
+       FLAG(w, PCI_EXP_LINKSTA2_EQU_PHASE2),
+       FLAG(w, PCI_EXP_LINKSTA2_EQU_PHASE3),
+       FLAG(w, PCI_EXP_LINKSTA2_EQU_REQ));
 }
 
 static void cap_express_slot2(struct device *d UNUSED, int where UNUSED)