--- /dev/null
+[PreviousGenFiles]\r
+HeaderPath=/aux/misc/stm/test/Inc\r
+HeaderFiles=stm32f0xx_it.h;stm32_assert.h;stm32f0xx_hal_conf.h;main.h;\r
+SourcePath=/aux/misc/stm/test/Src\r
+SourceFiles=stm32f0xx_it.c;main.c;\r
+\r
+[PreviousLibFiles]\r
+LibFiles=Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_gpio.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_exti.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_system.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_pwr.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_usart.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_rcc.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_dma.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_bus.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_cortex.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_utils.h;Drivers/STM32F0xx_HAL_Driver/Inc/stm32f0xx_ll_crs.h;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_gpio.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_exti.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_pwr.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usart.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_rcc.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_dma.c;Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_utils.c;Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f030x8.h;Drivers/CMSIS/Device/ST/STM32F0xx/Include/stm32f0xx.h;Drivers/CMSIS/Device/ST/STM32F0xx/Include/system_stm32f0xx.h;Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c;Drivers/CMSIS/Include/arm_const_structs.h;Drivers/CMSIS/Include/cmsis_gcc.h;Drivers/CMSIS/Include/cmsis_armcc_V6.h;Drivers/CMSIS/Include/core_cmFunc.h;Drivers/CMSIS/Include/core_cm7.h;Drivers/CMSIS/Include/core_sc000.h;Drivers/CMSIS/Include/core_cmInstr.h;Drivers/CMSIS/Include/arm_math.h;Drivers/CMSIS/Include/core_cm0plus.h;Drivers/CMSIS/Include/cmsis_armcc.h;Drivers/CMSIS/Include/core_sc300.h;Drivers/CMSIS/Include/core_cm3.h;Drivers/CMSIS/Include/arm_common_tables.h;Drivers/CMSIS/Include/core_cm0.h;Drivers/CMSIS/Include/core_cm4.h;Drivers/CMSIS/Include/core_cmSimd.h;\r
+\r
+[PreviousUsedMakefileFiles]\r
+SourceFiles=Src/main.c;Src/stm32f0xx_it.c;/aux/misc/stm/F0-package/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_gpio.c;/aux/misc/stm/F0-package/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_exti.c;/aux/misc/stm/F0-package/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_pwr.c;/aux/misc/stm/F0-package/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usart.c;/aux/misc/stm/F0-package/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_rcc.c;/aux/misc/stm/F0-package/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_dma.c;/aux/misc/stm/F0-package/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_utils.c;/Src/system_stm32f0xx.c;/aux/misc/stm/F0-package/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c;null;\r
+HeaderPath=/aux/misc/stm/F0-package/Drivers/STM32F0xx_HAL_Driver/Inc;/aux/misc/stm/F0-package/Drivers/CMSIS/Device/ST/STM32F0xx/Include;/aux/misc/stm/F0-package/Drivers/CMSIS/Include;Inc;\r
+CDefines=USE_FULL_LL_DRIVER;\r
+\r
--- /dev/null
+/**\r
+ ******************************************************************************\r
+ * @file : main.h\r
+ * @brief : Header for main.c file.\r
+ * This file contains the common defines of the application.\r
+ ******************************************************************************\r
+ ** This notice applies to any and all portions of this file\r
+ * that are not between comment pairs USER CODE BEGIN and\r
+ * USER CODE END. Other portions of this file, whether \r
+ * inserted by the user or by software development tools\r
+ * are owned by their respective copyright owners.\r
+ *\r
+ * COPYRIGHT(c) 2018 STMicroelectronics\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without modification,\r
+ * are permitted provided that the following conditions are met:\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors\r
+ * may be used to endorse or promote products derived from this software\r
+ * without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"\r
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR\r
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\r
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,\r
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ ******************************************************************************\r
+ */\r
+\r
+/* Define to prevent recursive inclusion -------------------------------------*/\r
+#ifndef __MAIN_H__\r
+#define __MAIN_H__\r
+\r
+/* Includes ------------------------------------------------------------------*/\r
+#include "stm32f0xx_ll_crs.h"\r
+#include "stm32f0xx_ll_rcc.h"\r
+#include "stm32f0xx_ll_bus.h"\r
+#include "stm32f0xx_ll_system.h"\r
+#include "stm32f0xx_ll_exti.h"\r
+#include "stm32f0xx_ll_cortex.h"\r
+#include "stm32f0xx_ll_utils.h"\r
+#include "stm32f0xx_ll_pwr.h"\r
+#include "stm32f0xx_ll_dma.h"\r
+#include "stm32f0xx_ll_usart.h"\r
+#include "stm32f0xx_ll_gpio.h"\r
+\r
+/* USER CODE BEGIN Includes */\r
+\r
+/* USER CODE END Includes */\r
+\r
+/* Private define ------------------------------------------------------------*/\r
+\r
+#define B1_Pin LL_GPIO_PIN_13\r
+#define B1_GPIO_Port GPIOC\r
+#define USART_TX_Pin LL_GPIO_PIN_2\r
+#define USART_TX_GPIO_Port GPIOA\r
+#define USART_RX_Pin LL_GPIO_PIN_3\r
+#define USART_RX_GPIO_Port GPIOA\r
+#define LD2_Pin LL_GPIO_PIN_5\r
+#define LD2_GPIO_Port GPIOA\r
+#define TMS_Pin LL_GPIO_PIN_13\r
+#define TMS_GPIO_Port GPIOA\r
+#define TCK_Pin LL_GPIO_PIN_14\r
+#define TCK_GPIO_Port GPIOA\r
+#ifndef NVIC_PRIORITYGROUP_0\r
+#define NVIC_PRIORITYGROUP_0 ((uint32_t)0x00000007) /*!< 0 bit for pre-emption priority,\r
+ 4 bits for subpriority */\r
+#define NVIC_PRIORITYGROUP_1 ((uint32_t)0x00000006) /*!< 1 bit for pre-emption priority,\r
+ 3 bits for subpriority */\r
+#define NVIC_PRIORITYGROUP_2 ((uint32_t)0x00000005) /*!< 2 bits for pre-emption priority,\r
+ 2 bits for subpriority */\r
+#define NVIC_PRIORITYGROUP_3 ((uint32_t)0x00000004) /*!< 3 bits for pre-emption priority,\r
+ 1 bit for subpriority */\r
+#define NVIC_PRIORITYGROUP_4 ((uint32_t)0x00000003) /*!< 4 bits for pre-emption priority,\r
+ 0 bit for subpriority */\r
+#endif\r
+\r
+/* ########################## Assert Selection ############################## */\r
+/**\r
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the \r
+ * HAL drivers code\r
+ */\r
+/* #define USE_FULL_ASSERT 1U */\r
+\r
+/* USER CODE BEGIN Private defines */\r
+\r
+/* USER CODE END Private defines */\r
+\r
+#ifdef __cplusplus\r
+ extern "C" {\r
+#endif\r
+void _Error_Handler(char *, int);\r
+\r
+#define Error_Handler() _Error_Handler(__FILE__, __LINE__)\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif /* __MAIN_H__ */\r
+\r
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/\r
--- /dev/null
+/**\r
+ ******************************************************************************\r
+ * @file stm32_assert.h\r
+ * @brief STM32 assert file.\r
+ ******************************************************************************\r
+ ** This notice applies to any and all portions of this file\r
+ * that are not between comment pairs USER CODE BEGIN and\r
+ * USER CODE END. Other portions of this file, whether \r
+ * inserted by the user or by software development tools\r
+ * are owned by their respective copyright owners.\r
+ *\r
+ * COPYRIGHT(c) 2018 STMicroelectronics\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without modification,\r
+ * are permitted provided that the following conditions are met:\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors\r
+ * may be used to endorse or promote products derived from this software\r
+ * without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"\r
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR\r
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\r
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,\r
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ ******************************************************************************\r
+ */\r
+\r
+/* Define to prevent recursive inclusion -------------------------------------*/\r
+#ifndef __STM32_ASSERT_H\r
+#define __STM32_ASSERT_H\r
+\r
+#ifdef __cplusplus\r
+ extern "C" {\r
+#endif\r
+\r
+/* Exported types ------------------------------------------------------------*/\r
+/* Exported constants --------------------------------------------------------*/\r
+/* Includes ------------------------------------------------------------------*/\r
+/* Exported macro ------------------------------------------------------------*/\r
+#ifdef USE_FULL_ASSERT\r
+/**\r
+ * @brief The assert_param macro is used for function's parameters check.\r
+ * @param expr: If expr is false, it calls assert_failed function\r
+ * which reports the name of the source file and the source\r
+ * line number of the call that failed.\r
+ * If expr is true, it returns no value.\r
+ * @retval None\r
+ */\r
+ #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))\r
+/* Exported functions ------------------------------------------------------- */\r
+ void assert_failed(uint8_t* file, uint32_t line);\r
+#else\r
+ #define assert_param(expr) ((void)0U)\r
+#endif /* USE_FULL_ASSERT */\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif /* __STM32_ASSERT_H */\r
+\r
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/\r
--- /dev/null
+/**\r
+ ******************************************************************************\r
+ * @file stm32f0xx_hal_conf.h\r
+ * @brief HAL configuration file.\r
+ ******************************************************************************\r
+ * @attention\r
+ *\r
+ * <h2><center>© COPYRIGHT(c) 2018 STMicroelectronics</center></h2>\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without modification,\r
+ * are permitted provided that the following conditions are met:\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors\r
+ * may be used to endorse or promote products derived from this software\r
+ * without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"\r
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR\r
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\r
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,\r
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ ******************************************************************************\r
+ */ \r
+\r
+/* Define to prevent recursive inclusion -------------------------------------*/\r
+#ifndef __STM32F0xx_HAL_CONF_H\r
+#define __STM32F0xx_HAL_CONF_H\r
+\r
+#ifdef __cplusplus\r
+ extern "C" {\r
+#endif\r
+\r
+#include "main.h"\r
+/* Exported types ------------------------------------------------------------*/\r
+/* Exported constants --------------------------------------------------------*/\r
+\r
+/* ########################## Module Selection ############################## */\r
+/**\r
+ * @brief This is the list of modules to be used in the HAL driver \r
+ */\r
+#define HAL_MODULE_ENABLED \r
+/*#define HAL_ADC_MODULE_ENABLED */\r
+/*#define HAL_CRYP_MODULE_ENABLED */\r
+/*#define HAL_CAN_MODULE_ENABLED */\r
+/*#define HAL_CEC_MODULE_ENABLED */\r
+/*#define HAL_COMP_MODULE_ENABLED */\r
+/*#define HAL_CRC_MODULE_ENABLED */\r
+/*#define HAL_CRYP_MODULE_ENABLED */\r
+/*#define HAL_TSC_MODULE_ENABLED */\r
+/*#define HAL_DAC_MODULE_ENABLED */\r
+/*#define HAL_I2S_MODULE_ENABLED */\r
+/*#define HAL_IWDG_MODULE_ENABLED */\r
+/*#define HAL_LCD_MODULE_ENABLED */\r
+/*#define HAL_LPTIM_MODULE_ENABLED */\r
+/*#define HAL_RNG_MODULE_ENABLED */\r
+/*#define HAL_RTC_MODULE_ENABLED */\r
+/*#define HAL_SPI_MODULE_ENABLED */\r
+/*#define HAL_TIM_MODULE_ENABLED */\r
+/*#define HAL_UART_MODULE_ENABLED */\r
+/*#define HAL_USART_MODULE_ENABLED */\r
+/*#define HAL_IRDA_MODULE_ENABLED */\r
+/*#define HAL_SMARTCARD_MODULE_ENABLED */\r
+/*#define HAL_SMBUS_MODULE_ENABLED */\r
+/*#define HAL_WWDG_MODULE_ENABLED */\r
+/*#define HAL_PCD_MODULE_ENABLED */\r
+#define HAL_CORTEX_MODULE_ENABLED\r
+#define HAL_DMA_MODULE_ENABLED\r
+#define HAL_FLASH_MODULE_ENABLED\r
+#define HAL_GPIO_MODULE_ENABLED\r
+#define HAL_PWR_MODULE_ENABLED\r
+#define HAL_RCC_MODULE_ENABLED\r
+#define HAL_I2C_MODULE_ENABLED\r
+\r
+/* ########################## HSE/HSI Values adaptation ##################### */\r
+/**\r
+ * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.\r
+ * This value is used by the RCC HAL module to compute the system frequency\r
+ * (when HSE is used as system clock source, directly or through the PLL). \r
+ */\r
+#if !defined (HSE_VALUE) \r
+ #define HSE_VALUE ((uint32_t)8000000) /*!< Value of the External oscillator in Hz */\r
+#endif /* HSE_VALUE */\r
+\r
+/**\r
+ * @brief In the following line adjust the External High Speed oscillator (HSE) Startup \r
+ * Timeout value \r
+ */\r
+#if !defined (HSE_STARTUP_TIMEOUT)\r
+ #define HSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for HSE start up, in ms */\r
+#endif /* HSE_STARTUP_TIMEOUT */\r
+\r
+/**\r
+ * @brief Internal High Speed oscillator (HSI) value.\r
+ * This value is used by the RCC HAL module to compute the system frequency\r
+ * (when HSI is used as system clock source, directly or through the PLL). \r
+ */\r
+#if !defined (HSI_VALUE)\r
+ #define HSI_VALUE ((uint32_t)8000000) /*!< Value of the Internal oscillator in Hz*/\r
+#endif /* HSI_VALUE */\r
+\r
+/**\r
+ * @brief In the following line adjust the Internal High Speed oscillator (HSI) Startup \r
+ * Timeout value \r
+ */\r
+#if !defined (HSI_STARTUP_TIMEOUT) \r
+ #define HSI_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for HSI start up */\r
+#endif /* HSI_STARTUP_TIMEOUT */ \r
+\r
+/**\r
+ * @brief Internal High Speed oscillator for ADC (HSI14) value.\r
+ */\r
+#if !defined (HSI14_VALUE) \r
+#define HSI14_VALUE ((uint32_t)14000000) /*!< Value of the Internal High Speed oscillator for ADC in Hz.\r
+ The real value may vary depending on the variations\r
+ in voltage and temperature. */\r
+#endif /* HSI14_VALUE */\r
+\r
+/**\r
+ * @brief Internal High Speed oscillator for USB (HSI48) value.\r
+ */\r
+#if !defined (HSI48_VALUE) \r
+#define HSI48_VALUE ((uint32_t)48000000) /*!< Value of the Internal High Speed oscillator for USB in Hz.\r
+ The real value may vary depending on the variations\r
+ in voltage and temperature. */\r
+#endif /* HSI48_VALUE */\r
+\r
+/**\r
+ * @brief Internal Low Speed oscillator (LSI) value.\r
+ */\r
+#if !defined (LSI_VALUE) \r
+ #define LSI_VALUE ((uint32_t)40000) \r
+#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz\r
+ The real value may vary depending on the variations\r
+ in voltage and temperature. */\r
+/**\r
+ * @brief External Low Speed oscillator (LSI) value.\r
+ */\r
+#if !defined (LSE_VALUE)\r
+ #define LSE_VALUE ((uint32_t)32768) /*!< Value of the External Low Speed oscillator in Hz */\r
+#endif /* LSE_VALUE */ \r
+\r
+#if !defined (LSE_STARTUP_TIMEOUT)\r
+ #define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */\r
+#endif /* LSE_STARTUP_TIMEOUT */\r
+\r
+/* Tip: To avoid modifying this file each time you need to use different HSE,\r
+ === you can define the HSE value in your toolchain compiler preprocessor. */\r
+\r
+/* ########################### System Configuration ######################### */\r
+/**\r
+ * @brief This is the HAL system configuration section\r
+ */ \r
+#define VDD_VALUE ((uint32_t)3300) /*!< Value of VDD in mv */ \r
+#define TICK_INT_PRIORITY ((uint32_t)0) /*!< tick interrupt priority (lowest by default) */ \r
+ /* Warning: Must be set to higher priority for HAL_Delay() */\r
+ /* and HAL_GetTick() usage under interrupt context */\r
+#define USE_RTOS 0 \r
+#define PREFETCH_ENABLE 1 \r
+#define INSTRUCTION_CACHE_ENABLE 0\r
+#define DATA_CACHE_ENABLE 0\r
+/* ########################## Assert Selection ############################## */\r
+/**\r
+ * @brief Uncomment the line below to expanse the "assert_param" macro in the \r
+ * HAL drivers code\r
+ */\r
+/* #define USE_FULL_ASSERT 1U */\r
+\r
+/* ################## SPI peripheral configuration ########################## */\r
+\r
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver\r
+* Activated: CRC code is present inside driver\r
+* Deactivated: CRC code cleaned from driver\r
+*/\r
+\r
+#define USE_SPI_CRC 0U\r
+\r
+/* Includes ------------------------------------------------------------------*/\r
+/**\r
+ * @brief Include module's header file \r
+ */\r
+\r
+#ifdef HAL_RCC_MODULE_ENABLED\r
+ #include "stm32f0xx_hal_rcc.h"\r
+#endif /* HAL_RCC_MODULE_ENABLED */\r
+\r
+#ifdef HAL_GPIO_MODULE_ENABLED\r
+ #include "stm32f0xx_hal_gpio.h"\r
+#endif /* HAL_GPIO_MODULE_ENABLED */\r
+\r
+#ifdef HAL_DMA_MODULE_ENABLED\r
+ #include "stm32f0xx_hal_dma.h"\r
+#endif /* HAL_DMA_MODULE_ENABLED */\r
+\r
+#ifdef HAL_CORTEX_MODULE_ENABLED\r
+ #include "stm32f0xx_hal_cortex.h"\r
+#endif /* HAL_CORTEX_MODULE_ENABLED */\r
+\r
+#ifdef HAL_ADC_MODULE_ENABLED\r
+ #include "stm32f0xx_hal_adc.h"\r
+#endif /* HAL_ADC_MODULE_ENABLED */\r
+\r
+#ifdef HAL_CAN_MODULE_ENABLED\r
+ #include "stm32f0xx_hal_can.h"\r
+#endif /* HAL_CAN_MODULE_ENABLED */\r
+\r
+#ifdef HAL_CEC_MODULE_ENABLED\r
+ #include "stm32f0xx_hal_cec.h"\r
+#endif /* HAL_CEC_MODULE_ENABLED */\r
+\r
+#ifdef HAL_COMP_MODULE_ENABLED\r
+ #include "stm32f0xx_hal_comp.h"\r
+#endif /* HAL_COMP_MODULE_ENABLED */\r
+\r
+#ifdef HAL_CRC_MODULE_ENABLED\r
+ #include "stm32f0xx_hal_crc.h"\r
+#endif /* HAL_CRC_MODULE_ENABLED */\r
+\r
+#ifdef HAL_DAC_MODULE_ENABLED\r
+ #include "stm32f0xx_hal_dac.h"\r
+#endif /* HAL_DAC_MODULE_ENABLED */\r
+\r
+#ifdef HAL_FLASH_MODULE_ENABLED\r
+ #include "stm32f0xx_hal_flash.h"\r
+#endif /* HAL_FLASH_MODULE_ENABLED */\r
+\r
+#ifdef HAL_I2C_MODULE_ENABLED\r
+ #include "stm32f0xx_hal_i2c.h"\r
+#endif /* HAL_I2C_MODULE_ENABLED */\r
+\r
+#ifdef HAL_I2S_MODULE_ENABLED\r
+ #include "stm32f0xx_hal_i2s.h"\r
+#endif /* HAL_I2S_MODULE_ENABLED */\r
+\r
+#ifdef HAL_IRDA_MODULE_ENABLED\r
+ #include "stm32f0xx_hal_irda.h"\r
+#endif /* HAL_IRDA_MODULE_ENABLED */\r
+\r
+#ifdef HAL_IWDG_MODULE_ENABLED\r
+ #include "stm32f0xx_hal_iwdg.h"\r
+#endif /* HAL_IWDG_MODULE_ENABLED */\r
+\r
+#ifdef HAL_PCD_MODULE_ENABLED\r
+ #include "stm32f0xx_hal_pcd.h"\r
+#endif /* HAL_PCD_MODULE_ENABLED */\r
+\r
+#ifdef HAL_PWR_MODULE_ENABLED\r
+ #include "stm32f0xx_hal_pwr.h"\r
+#endif /* HAL_PWR_MODULE_ENABLED */\r
+\r
+#ifdef HAL_RTC_MODULE_ENABLED\r
+ #include "stm32f0xx_hal_rtc.h"\r
+#endif /* HAL_RTC_MODULE_ENABLED */\r
+\r
+#ifdef HAL_SMARTCARD_MODULE_ENABLED\r
+ #include "stm32f0xx_hal_smartcard.h"\r
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */\r
+\r
+#ifdef HAL_SMBUS_MODULE_ENABLED\r
+ #include "stm32f0xx_hal_smbus.h"\r
+#endif /* HAL_SMBUS_MODULE_ENABLED */\r
+\r
+#ifdef HAL_SPI_MODULE_ENABLED\r
+ #include "stm32f0xx_hal_spi.h"\r
+#endif /* HAL_SPI_MODULE_ENABLED */\r
+\r
+#ifdef HAL_TIM_MODULE_ENABLED\r
+ #include "stm32f0xx_hal_tim.h"\r
+#endif /* HAL_TIM_MODULE_ENABLED */\r
+\r
+#ifdef HAL_TSC_MODULE_ENABLED\r
+ #include "stm32f0xx_hal_tsc.h"\r
+#endif /* HAL_TSC_MODULE_ENABLED */\r
+\r
+#ifdef HAL_UART_MODULE_ENABLED\r
+ #include "stm32f0xx_hal_uart.h"\r
+#endif /* HAL_UART_MODULE_ENABLED */\r
+\r
+#ifdef HAL_USART_MODULE_ENABLED\r
+ #include "stm32f0xx_hal_usart.h"\r
+#endif /* HAL_USART_MODULE_ENABLED */\r
+\r
+#ifdef HAL_WWDG_MODULE_ENABLED\r
+ #include "stm32f0xx_hal_wwdg.h"\r
+#endif /* HAL_WWDG_MODULE_ENABLED */\r
+\r
+/* Exported macro ------------------------------------------------------------*/\r
+#ifdef USE_FULL_ASSERT\r
+/**\r
+ * @brief The assert_param macro is used for function's parameters check.\r
+ * @param expr: If expr is false, it calls assert_failed function\r
+ * which reports the name of the source file and the source\r
+ * line number of the call that failed. \r
+ * If expr is true, it returns no value.\r
+ * @retval None\r
+ */\r
+ #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))\r
+/* Exported functions ------------------------------------------------------- */\r
+ void assert_failed(uint8_t* file, uint32_t line);\r
+#else\r
+ #define assert_param(expr) ((void)0U)\r
+#endif /* USE_FULL_ASSERT */ \r
+ \r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif /* __STM32F0xx_HAL_CONF_H */\r
+\r
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/\r
--- /dev/null
+/**\r
+ ******************************************************************************\r
+ * @file stm32f0xx_it.h\r
+ * @brief This file contains the headers of the interrupt handlers.\r
+ ******************************************************************************\r
+ *\r
+ * COPYRIGHT(c) 2018 STMicroelectronics\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without modification,\r
+ * are permitted provided that the following conditions are met:\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors\r
+ * may be used to endorse or promote products derived from this software\r
+ * without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"\r
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR\r
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\r
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,\r
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ ******************************************************************************\r
+ */\r
+\r
+/* Define to prevent recursive inclusion -------------------------------------*/\r
+#ifndef __STM32F0xx_IT_H\r
+#define __STM32F0xx_IT_H\r
+\r
+#ifdef __cplusplus\r
+ extern "C" {\r
+#endif \r
+\r
+/* Includes ------------------------------------------------------------------*/\r
+#include "stm32f0xx_ll_system.h"\r
+#include "stm32f0xx_ll_gpio.h"\r
+#include "stm32f0xx_ll_exti.h"\r
+#include "main.h"\r
+/* Exported types ------------------------------------------------------------*/\r
+/* Exported constants --------------------------------------------------------*/\r
+/* Exported macro ------------------------------------------------------------*/\r
+/* Exported functions ------------------------------------------------------- */\r
+\r
+void SysTick_Handler(void);\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif /* __STM32F0xx_IT_H */\r
+\r
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/\r
--- /dev/null
+##########################################################################################################################\r
+# File automatically-generated by tool: [projectgenerator] version: [2.27.0] date: [Sat May 26 12:54:44 CEST 2018] \r
+##########################################################################################################################\r
+\r
+# ------------------------------------------------\r
+# Generic Makefile (based on gcc)\r
+#\r
+# ChangeLog :\r
+# 2017-02-10 - Several enhancements + project update mode\r
+# 2015-07-22 - first version\r
+# ------------------------------------------------\r
+\r
+######################################\r
+# target\r
+######################################\r
+TARGET = test\r
+\r
+\r
+######################################\r
+# building variables\r
+######################################\r
+# debug build?\r
+DEBUG = 1\r
+# optimization\r
+OPT = -Og\r
+\r
+\r
+#######################################\r
+# paths\r
+#######################################\r
+# source path\r
+SOURCES_DIR = \\r
+Drivers/STM32F0xx_HAL_Driver \\r
+Application \\r
+Application/User/Src/stm32f0xx_it.c \\r
+Drivers/CMSIS \\r
+Application/User/Src \\r
+Application/User \\r
+Application/User/Src/main.c \\r
+Drivers\r
+\r
+# firmware library path\r
+PERIFLIB_PATH = \r
+\r
+# Build path\r
+BUILD_DIR = build\r
+\r
+######################################\r
+# source\r
+######################################\r
+# C sources\r
+C_SOURCES = \\r
+Src/main.c \\r
+Src/main.c \\r
+/Src/system_stm32f0xx.c \\r
+Src/stm32f0xx_it.c \\r
+Src/stm32f0xx_it.c \\r
+/aux/misc/stm/F0-package/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_exti.c \\r
+/aux/misc/stm/F0-package/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usart.c \\r
+/aux/misc/stm/F0-package/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_gpio.c \\r
+/aux/misc/stm/F0-package/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_pwr.c \\r
+/aux/misc/stm/F0-package/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_utils.c \\r
+/aux/misc/stm/F0-package/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_rcc.c \\r
+/aux/misc/stm/F0-package/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_dma.c\r
+\r
+# ASM sources\r
+ASM_SOURCES = \\r
+startup_stm32f030x8.s\r
+\r
+\r
+######################################\r
+# firmware library\r
+######################################\r
+PERIFLIB_SOURCES = \r
+\r
+\r
+#######################################\r
+# binaries\r
+#######################################\r
+BINPATH = \r
+PREFIX = arm-none-eabi-\r
+CC = $(BINPATH)/$(PREFIX)gcc\r
+AS = $(BINPATH)/$(PREFIX)gcc -x assembler-with-cpp\r
+CP = $(BINPATH)/$(PREFIX)objcopy\r
+AR = $(BINPATH)/$(PREFIX)ar\r
+SZ = $(BINPATH)/$(PREFIX)size\r
+HEX = $(CP) -O ihex\r
+BIN = $(CP) -O binary -S\r
+ \r
+#######################################\r
+# CFLAGS\r
+#######################################\r
+# cpu\r
+CPU = -mcpu=cortex-m0\r
+\r
+# fpu\r
+# NONE for Cortex-M0/M0+/M3\r
+\r
+# float-abi\r
+\r
+\r
+# mcu\r
+MCU = $(CPU) -mthumb $(FPU) $(FLOAT-ABI)\r
+\r
+# macros for gcc\r
+# AS defines\r
+AS_DEFS = \r
+\r
+# C defines\r
+C_DEFS = \\r
+-DUSE_FULL_LL_DRIVER \\r
+-DSTM32F030x8\r
+\r
+\r
+# AS includes\r
+AS_INCLUDES = \r
+\r
+# C includes\r
+C_INCLUDES = \\r
+-IInc \\r
+-I/aux/misc/stm/F0-package/Drivers/STM32F0xx_HAL_Driver/Inc \\r
+-I/aux/misc/stm/F0-package/Drivers/CMSIS/Device/ST/STM32F0xx/Include \\r
+-I/aux/misc/stm/F0-package/Drivers/CMSIS/Include\r
+\r
+\r
+# compile gcc flags\r
+ASFLAGS = $(MCU) $(AS_DEFS) $(AS_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections\r
+\r
+CFLAGS = $(MCU) $(C_DEFS) $(C_INCLUDES) $(OPT) -Wall -fdata-sections -ffunction-sections\r
+\r
+ifeq ($(DEBUG), 1)\r
+CFLAGS += -g -gdwarf-2\r
+endif\r
+\r
+\r
+# Generate dependency information\r
+CFLAGS += -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@:%.o=%.d)"\r
+\r
+\r
+#######################################\r
+# LDFLAGS\r
+#######################################\r
+# link script\r
+LDSCRIPT = STM32F030R8Tx_FLASH.ld\r
+\r
+# libraries\r
+LIBS = -lc -lm -lnosys \r
+LIBDIR = \r
+LDFLAGS = $(MCU) -specs=nano.specs -T$(LDSCRIPT) $(LIBDIR) $(LIBS) -Wl,-Map=$(BUILD_DIR)/$(TARGET).map,--cref -Wl,--gc-sections\r
+\r
+# default action: build all\r
+all: $(BUILD_DIR)/$(TARGET).elf $(BUILD_DIR)/$(TARGET).hex $(BUILD_DIR)/$(TARGET).bin\r
+\r
+\r
+#######################################\r
+# build the application\r
+#######################################\r
+# list of objects\r
+OBJECTS = $(addprefix $(BUILD_DIR)/,$(notdir $(C_SOURCES:.c=.o)))\r
+vpath %.c $(sort $(dir $(C_SOURCES)))\r
+# list of ASM program objects\r
+OBJECTS += $(addprefix $(BUILD_DIR)/,$(notdir $(ASM_SOURCES:.s=.o)))\r
+vpath %.s $(sort $(dir $(ASM_SOURCES)))\r
+\r
+$(BUILD_DIR)/%.o: %.c Makefile | $(BUILD_DIR) \r
+ $(CC) -c $(CFLAGS) -Wa,-a,-ad,-alms=$(BUILD_DIR)/$(notdir $(<:.c=.lst)) $< -o $@\r
+\r
+$(BUILD_DIR)/%.o: %.s Makefile | $(BUILD_DIR)\r
+ $(AS) -c $(CFLAGS) $< -o $@\r
+\r
+$(BUILD_DIR)/$(TARGET).elf: $(OBJECTS) Makefile\r
+ $(CC) $(OBJECTS) $(LDFLAGS) -o $@\r
+ $(SZ) $@\r
+\r
+$(BUILD_DIR)/%.hex: $(BUILD_DIR)/%.elf | $(BUILD_DIR)\r
+ $(HEX) $< $@\r
+ \r
+$(BUILD_DIR)/%.bin: $(BUILD_DIR)/%.elf | $(BUILD_DIR)\r
+ $(BIN) $< $@ \r
+ \r
+$(BUILD_DIR):\r
+ mkdir $@ \r
+\r
+#######################################\r
+# clean up\r
+#######################################\r
+clean:\r
+ -rm -fR .dep $(BUILD_DIR)\r
+ \r
+#######################################\r
+# dependencies\r
+#######################################\r
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)\r
+\r
+# *** EOF ***\r
--- /dev/null
+/*\r
+*****************************************************************************\r
+**\r
+\r
+** File : LinkerScript.ld\r
+**\r
+** Abstract : Linker script for STM32F030R8Tx Device with\r
+** 64KByte FLASH, 8KByte RAM\r
+**\r
+** Set heap size, stack size and stack location according\r
+** to application requirements.\r
+**\r
+** Set memory bank area and size if external memory is used.\r
+**\r
+** Target : STMicroelectronics STM32\r
+**\r
+**\r
+** Distribution: The file is distributed as is, without any warranty\r
+** of any kind.\r
+**\r
+** (c)Copyright Ac6.\r
+** You may use this file as-is or modify it according to the needs of your\r
+** project. Distribution of this file (unmodified or modified) is not\r
+** permitted. Ac6 permit registered System Workbench for MCU users the\r
+** rights to distribute the assembled, compiled & linked contents of this\r
+** file as part of an application binary file, provided that it is built\r
+** using the System Workbench for MCU toolchain.\r
+**\r
+*****************************************************************************\r
+*/\r
+\r
+/* Entry Point */\r
+ENTRY(Reset_Handler)\r
+\r
+/* Highest address of the user mode stack */\r
+_estack = 0x20002000; /* end of RAM */\r
+/* Generate a link error if heap and stack don't fit into RAM */\r
+_Min_Heap_Size = 0x200; /* required amount of heap */\r
+_Min_Stack_Size = 0x400; /* required amount of stack */\r
+\r
+/* Specify the memory areas */\r
+MEMORY\r
+{\r
+RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 8K\r
+FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 64K\r
+}\r
+\r
+/* Define output sections */\r
+SECTIONS\r
+{\r
+ /* The startup code goes first into FLASH */\r
+ .isr_vector :\r
+ {\r
+ . = ALIGN(4);\r
+ KEEP(*(.isr_vector)) /* Startup code */\r
+ . = ALIGN(4);\r
+ } >FLASH\r
+\r
+ /* The program code and other data goes into FLASH */\r
+ .text :\r
+ {\r
+ . = ALIGN(4);\r
+ *(.text) /* .text sections (code) */\r
+ *(.text*) /* .text* sections (code) */\r
+ *(.glue_7) /* glue arm to thumb code */\r
+ *(.glue_7t) /* glue thumb to arm code */\r
+ *(.eh_frame)\r
+\r
+ KEEP (*(.init))\r
+ KEEP (*(.fini))\r
+\r
+ . = ALIGN(4);\r
+ _etext = .; /* define a global symbols at end of code */\r
+ } >FLASH\r
+\r
+ /* Constant data goes into FLASH */\r
+ .rodata :\r
+ {\r
+ . = ALIGN(4);\r
+ *(.rodata) /* .rodata sections (constants, strings, etc.) */\r
+ *(.rodata*) /* .rodata* sections (constants, strings, etc.) */\r
+ . = ALIGN(4);\r
+ } >FLASH\r
+\r
+ .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH\r
+ .ARM : {\r
+ __exidx_start = .;\r
+ *(.ARM.exidx*)\r
+ __exidx_end = .;\r
+ } >FLASH\r
+\r
+ .preinit_array :\r
+ {\r
+ PROVIDE_HIDDEN (__preinit_array_start = .);\r
+ KEEP (*(.preinit_array*))\r
+ PROVIDE_HIDDEN (__preinit_array_end = .);\r
+ } >FLASH\r
+ .init_array :\r
+ {\r
+ PROVIDE_HIDDEN (__init_array_start = .);\r
+ KEEP (*(SORT(.init_array.*)))\r
+ KEEP (*(.init_array*))\r
+ PROVIDE_HIDDEN (__init_array_end = .);\r
+ } >FLASH\r
+ .fini_array :\r
+ {\r
+ PROVIDE_HIDDEN (__fini_array_start = .);\r
+ KEEP (*(SORT(.fini_array.*)))\r
+ KEEP (*(.fini_array*))\r
+ PROVIDE_HIDDEN (__fini_array_end = .);\r
+ } >FLASH\r
+\r
+ /* used by the startup to initialize data */\r
+ _sidata = LOADADDR(.data);\r
+\r
+ /* Initialized data sections goes into RAM, load LMA copy after code */\r
+ .data : \r
+ {\r
+ . = ALIGN(4);\r
+ _sdata = .; /* create a global symbol at data start */\r
+ *(.data) /* .data sections */\r
+ *(.data*) /* .data* sections */\r
+\r
+ . = ALIGN(4);\r
+ _edata = .; /* define a global symbol at data end */\r
+ } >RAM AT> FLASH\r
+\r
+ \r
+ /* Uninitialized data section */\r
+ . = ALIGN(4);\r
+ .bss :\r
+ {\r
+ /* This is used by the startup in order to initialize the .bss secion */\r
+ _sbss = .; /* define a global symbol at bss start */\r
+ __bss_start__ = _sbss;\r
+ *(.bss)\r
+ *(.bss*)\r
+ *(COMMON)\r
+\r
+ . = ALIGN(4);\r
+ _ebss = .; /* define a global symbol at bss end */\r
+ __bss_end__ = _ebss;\r
+ } >RAM\r
+\r
+ /* User_heap_stack section, used to check that there is enough RAM left */\r
+ ._user_heap_stack :\r
+ {\r
+ . = ALIGN(8);\r
+ PROVIDE ( end = . );\r
+ PROVIDE ( _end = . );\r
+ . = . + _Min_Heap_Size;\r
+ . = . + _Min_Stack_Size;\r
+ . = ALIGN(8);\r
+ } >RAM\r
+\r
+ \r
+\r
+ /* Remove information from the standard libraries */\r
+ /DISCARD/ :\r
+ {\r
+ libc.a ( * )\r
+ libm.a ( * )\r
+ libgcc.a ( * )\r
+ }\r
+\r
+ .ARM.attributes 0 : { *(.ARM.attributes) }\r
+}\r
+\r
+\r
--- /dev/null
+\r
+/**\r
+ ******************************************************************************\r
+ * @file : main.c\r
+ * @brief : Main program body\r
+ ******************************************************************************\r
+ ** This notice applies to any and all portions of this file\r
+ * that are not between comment pairs USER CODE BEGIN and\r
+ * USER CODE END. Other portions of this file, whether \r
+ * inserted by the user or by software development tools\r
+ * are owned by their respective copyright owners.\r
+ *\r
+ * COPYRIGHT(c) 2018 STMicroelectronics\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without modification,\r
+ * are permitted provided that the following conditions are met:\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors\r
+ * may be used to endorse or promote products derived from this software\r
+ * without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"\r
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR\r
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\r
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,\r
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ ******************************************************************************\r
+ */\r
+/* Includes ------------------------------------------------------------------*/\r
+#include "main.h"\r
+\r
+/* USER CODE BEGIN Includes */\r
+\r
+/* USER CODE END Includes */\r
+\r
+/* Private variables ---------------------------------------------------------*/\r
+\r
+/* USER CODE BEGIN PV */\r
+/* Private variables ---------------------------------------------------------*/\r
+\r
+/* USER CODE END PV */\r
+\r
+/* Private function prototypes -----------------------------------------------*/\r
+static void LL_Init(void);\r
+void SystemClock_Config(void);\r
+static void MX_GPIO_Init(void);\r
+static void MX_USART2_UART_Init(void);\r
+\r
+/* USER CODE BEGIN PFP */\r
+/* Private function prototypes -----------------------------------------------*/\r
+\r
+/* USER CODE END PFP */\r
+\r
+/* USER CODE BEGIN 0 */\r
+\r
+/* USER CODE END 0 */\r
+\r
+/**\r
+ * @brief The application entry point.\r
+ *\r
+ * @retval None\r
+ */\r
+int main(void)\r
+{\r
+ /* USER CODE BEGIN 1 */\r
+\r
+ /* USER CODE END 1 */\r
+\r
+ /* MCU Configuration----------------------------------------------------------*/\r
+\r
+ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */\r
+ LL_Init();\r
+\r
+ /* USER CODE BEGIN Init */\r
+\r
+ /* USER CODE END Init */\r
+\r
+ /* Configure the system clock */\r
+ SystemClock_Config();\r
+\r
+ /* USER CODE BEGIN SysInit */\r
+\r
+ /* USER CODE END SysInit */\r
+\r
+ /* Initialize all configured peripherals */\r
+ MX_GPIO_Init();\r
+ MX_USART2_UART_Init();\r
+ /* USER CODE BEGIN 2 */\r
+\r
+ /* USER CODE END 2 */\r
+\r
+ /* Infinite loop */\r
+ /* USER CODE BEGIN WHILE */\r
+ while (1)\r
+ {\r
+\r
+ /* USER CODE END WHILE */\r
+\r
+ /* USER CODE BEGIN 3 */\r
+\r
+ }\r
+ /* USER CODE END 3 */\r
+\r
+}\r
+\r
+static void LL_Init(void)\r
+{\r
+ \r
+\r
+ LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_SYSCFG);\r
+\r
+ /* System interrupt init*/\r
+ /* SVC_IRQn interrupt configuration */\r
+ NVIC_SetPriority(SVC_IRQn, 0);\r
+ /* PendSV_IRQn interrupt configuration */\r
+ NVIC_SetPriority(PendSV_IRQn, 0);\r
+ /* SysTick_IRQn interrupt configuration */\r
+ NVIC_SetPriority(SysTick_IRQn, 0);\r
+\r
+}\r
+\r
+/**\r
+ * @brief System Clock Configuration\r
+ * @retval None\r
+ */\r
+void SystemClock_Config(void)\r
+{\r
+\r
+ LL_FLASH_SetLatency(LL_FLASH_LATENCY_1);\r
+\r
+ if(LL_FLASH_GetLatency() != LL_FLASH_LATENCY_1)\r
+ {\r
+ Error_Handler(); \r
+ }\r
+ LL_RCC_HSI_Enable();\r
+\r
+ /* Wait till HSI is ready */\r
+ while(LL_RCC_HSI_IsReady() != 1)\r
+ {\r
+ \r
+ }\r
+ LL_RCC_HSI_SetCalibTrimming(16);\r
+\r
+ LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSI_DIV_2, LL_RCC_PLL_MUL_8);\r
+\r
+ LL_RCC_PLL_Enable();\r
+\r
+ /* Wait till PLL is ready */\r
+ while(LL_RCC_PLL_IsReady() != 1)\r
+ {\r
+ \r
+ }\r
+ LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);\r
+\r
+ LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_1);\r
+\r
+ LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);\r
+\r
+ /* Wait till System clock is ready */\r
+ while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)\r
+ {\r
+ \r
+ }\r
+ LL_Init1msTick(32000000);\r
+\r
+ LL_SYSTICK_SetClkSource(LL_SYSTICK_CLKSOURCE_HCLK);\r
+\r
+ LL_SetSystemCoreClock(32000000);\r
+\r
+ /* SysTick_IRQn interrupt configuration */\r
+ NVIC_SetPriority(SysTick_IRQn, 0);\r
+}\r
+\r
+/* USART2 init function */\r
+static void MX_USART2_UART_Init(void)\r
+{\r
+\r
+ LL_USART_InitTypeDef USART_InitStruct;\r
+\r
+ LL_GPIO_InitTypeDef GPIO_InitStruct;\r
+\r
+ /* Peripheral clock enable */\r
+ LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_USART2);\r
+ \r
+ /**USART2 GPIO Configuration \r
+ PA2 ------> USART2_TX\r
+ PA3 ------> USART2_RX \r
+ */\r
+ GPIO_InitStruct.Pin = USART_TX_Pin;\r
+ GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;\r
+ GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;\r
+ GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;\r
+ GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;\r
+ GPIO_InitStruct.Alternate = LL_GPIO_AF_1;\r
+ LL_GPIO_Init(USART_TX_GPIO_Port, &GPIO_InitStruct);\r
+\r
+ GPIO_InitStruct.Pin = USART_RX_Pin;\r
+ GPIO_InitStruct.Mode = LL_GPIO_MODE_ALTERNATE;\r
+ GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;\r
+ GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;\r
+ GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;\r
+ GPIO_InitStruct.Alternate = LL_GPIO_AF_1;\r
+ LL_GPIO_Init(USART_RX_GPIO_Port, &GPIO_InitStruct);\r
+\r
+ USART_InitStruct.BaudRate = 38400;\r
+ USART_InitStruct.DataWidth = LL_USART_DATAWIDTH_8B;\r
+ USART_InitStruct.StopBits = LL_USART_STOPBITS_1;\r
+ USART_InitStruct.Parity = LL_USART_PARITY_NONE;\r
+ USART_InitStruct.TransferDirection = LL_USART_DIRECTION_TX_RX;\r
+ USART_InitStruct.HardwareFlowControl = LL_USART_HWCONTROL_NONE;\r
+ USART_InitStruct.OverSampling = LL_USART_OVERSAMPLING_16;\r
+ LL_USART_Init(USART2, &USART_InitStruct);\r
+\r
+ LL_USART_DisableIT_CTS(USART2);\r
+\r
+ LL_USART_DisableOverrunDetect(USART2);\r
+\r
+ LL_USART_ConfigAsyncMode(USART2);\r
+\r
+ LL_USART_Enable(USART2);\r
+\r
+}\r
+\r
+/** Configure pins as \r
+ * Analog \r
+ * Input \r
+ * Output\r
+ * EVENT_OUT\r
+ * EXTI\r
+*/\r
+static void MX_GPIO_Init(void)\r
+{\r
+\r
+ LL_EXTI_InitTypeDef EXTI_InitStruct;\r
+ LL_GPIO_InitTypeDef GPIO_InitStruct;\r
+\r
+ /* GPIO Ports Clock Enable */\r
+ LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOC);\r
+ LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOF);\r
+ LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_GPIOA);\r
+\r
+ /**/\r
+ LL_GPIO_ResetOutputPin(LD2_GPIO_Port, LD2_Pin);\r
+\r
+ /**/\r
+ LL_SYSCFG_SetEXTISource(LL_SYSCFG_EXTI_PORTC, LL_SYSCFG_EXTI_LINE13);\r
+\r
+ /**/\r
+ LL_GPIO_SetPinPull(B1_GPIO_Port, B1_Pin, LL_GPIO_PULL_NO);\r
+\r
+ /**/\r
+ LL_GPIO_SetPinMode(B1_GPIO_Port, B1_Pin, LL_GPIO_MODE_INPUT);\r
+\r
+ /**/\r
+ EXTI_InitStruct.Line_0_31 = LL_EXTI_LINE_13;\r
+ EXTI_InitStruct.LineCommand = ENABLE;\r
+ EXTI_InitStruct.Mode = LL_EXTI_MODE_IT;\r
+ EXTI_InitStruct.Trigger = LL_EXTI_TRIGGER_FALLING;\r
+ LL_EXTI_Init(&EXTI_InitStruct);\r
+\r
+ /**/\r
+ GPIO_InitStruct.Pin = LD2_Pin;\r
+ GPIO_InitStruct.Mode = LL_GPIO_MODE_OUTPUT;\r
+ GPIO_InitStruct.Speed = LL_GPIO_SPEED_FREQ_LOW;\r
+ GPIO_InitStruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;\r
+ GPIO_InitStruct.Pull = LL_GPIO_PULL_NO;\r
+ LL_GPIO_Init(LD2_GPIO_Port, &GPIO_InitStruct);\r
+\r
+}\r
+\r
+/* USER CODE BEGIN 4 */\r
+\r
+/* USER CODE END 4 */\r
+\r
+/**\r
+ * @brief This function is executed in case of error occurrence.\r
+ * @param file: The file name as string.\r
+ * @param line: The line in file as a number.\r
+ * @retval None\r
+ */\r
+void _Error_Handler(char *file, int line)\r
+{\r
+ /* USER CODE BEGIN Error_Handler_Debug */\r
+ /* User can add his own implementation to report the HAL error return state */\r
+ while(1)\r
+ {\r
+ }\r
+ /* USER CODE END Error_Handler_Debug */\r
+}\r
+\r
+#ifdef USE_FULL_ASSERT\r
+/**\r
+ * @brief Reports the name of the source file and the source line number\r
+ * where the assert_param error has occurred.\r
+ * @param file: pointer to the source file name\r
+ * @param line: assert_param error line source number\r
+ * @retval None\r
+ */\r
+void assert_failed(uint8_t* file, uint32_t line)\r
+{ \r
+ /* USER CODE BEGIN 6 */\r
+ /* User can add his own implementation to report the file name and line number,\r
+ tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */\r
+ /* USER CODE END 6 */\r
+}\r
+#endif /* USE_FULL_ASSERT */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/\r
--- /dev/null
+/**\r
+ ******************************************************************************\r
+ * @file stm32f0xx_it.c\r
+ * @brief Interrupt Service Routines.\r
+ ******************************************************************************\r
+ *\r
+ * COPYRIGHT(c) 2018 STMicroelectronics\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without modification,\r
+ * are permitted provided that the following conditions are met:\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors\r
+ * may be used to endorse or promote products derived from this software\r
+ * without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"\r
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR\r
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\r
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,\r
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ ******************************************************************************\r
+ */\r
+/* Includes ------------------------------------------------------------------*/\r
+#include "stm32f0xx.h"\r
+#include "stm32f0xx_it.h"\r
+\r
+/* USER CODE BEGIN 0 */\r
+\r
+/* USER CODE END 0 */\r
+\r
+/* External variables --------------------------------------------------------*/\r
+\r
+/******************************************************************************/\r
+/* Cortex-M0 Processor Interruption and Exception Handlers */ \r
+/******************************************************************************/\r
+\r
+/**\r
+* @brief This function handles System tick timer.\r
+*/\r
+void SysTick_Handler(void)\r
+{\r
+ /* USER CODE BEGIN SysTick_IRQn 0 */\r
+\r
+ /* USER CODE END SysTick_IRQn 0 */\r
+ \r
+ /* USER CODE BEGIN SysTick_IRQn 1 */\r
+\r
+ /* USER CODE END SysTick_IRQn 1 */\r
+}\r
+\r
+/******************************************************************************/\r
+/* STM32F0xx Peripheral Interrupt Handlers */\r
+/* Add here the Interrupt Handlers for the used peripherals. */\r
+/* For the available peripheral interrupt handler names, */\r
+/* please refer to the startup file (startup_stm32f0xx.s). */\r
+/******************************************************************************/\r
+\r
+/* USER CODE BEGIN 1 */\r
+\r
+/* USER CODE END 1 */\r
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/\r
--- /dev/null
+/**\r
+ ******************************************************************************\r
+ * @file system_stm32f0xx.c\r
+ * @author MCD Application Team\r
+ * @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Source File.\r
+ *\r
+ * 1. This file provides two functions and one global variable to be called from\r
+ * user application:\r
+ * - SystemInit(): This function is called at startup just after reset and \r
+ * before branch to main program. This call is made inside\r
+ * the "startup_stm32f0xx.s" file.\r
+ *\r
+ * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used\r
+ * by the user application to setup the SysTick\r
+ * timer or configure other parameters.\r
+ *\r
+ * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must\r
+ * be called whenever the core clock is changed\r
+ * during program execution.\r
+ *\r
+ * 2. After each device reset the HSI (8 MHz) is used as system clock source.\r
+ * Then SystemInit() function is called, in "startup_stm32f0xx.s" file, to\r
+ * configure the system clock before to branch to main program.\r
+ *\r
+ * 3. This file configures the system clock as follows:\r
+ *=============================================================================\r
+ * Supported STM32F0xx device\r
+ *-----------------------------------------------------------------------------\r
+ * System Clock source | HSI\r
+ *-----------------------------------------------------------------------------\r
+ * SYSCLK(Hz) | 8000000\r
+ *-----------------------------------------------------------------------------\r
+ * HCLK(Hz) | 8000000\r
+ *-----------------------------------------------------------------------------\r
+ * AHB Prescaler | 1\r
+ *-----------------------------------------------------------------------------\r
+ * APB1 Prescaler | 1\r
+ *-----------------------------------------------------------------------------\r
+ *=============================================================================\r
+ ******************************************************************************\r
+ * @attention\r
+ *\r
+ * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>\r
+ *\r
+ * Redistribution and use in source and binary forms, with or without modification,\r
+ * are permitted provided that the following conditions are met:\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors\r
+ * may be used to endorse or promote products derived from this software\r
+ * without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"\r
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR\r
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\r
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,\r
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ ******************************************************************************\r
+ */\r
+\r
+/** @addtogroup CMSIS\r
+ * @{\r
+ */\r
+\r
+/** @addtogroup stm32f0xx_system\r
+ * @{\r
+ */\r
+\r
+/** @addtogroup STM32F0xx_System_Private_Includes\r
+ * @{\r
+ */\r
+\r
+#include "stm32f0xx.h"\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @addtogroup STM32F0xx_System_Private_TypesDefinitions\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @addtogroup STM32F0xx_System_Private_Defines\r
+ * @{\r
+ */\r
+#if !defined (HSE_VALUE) \r
+ #define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz.\r
+ This value can be provided and adapted by the user application. */\r
+#endif /* HSE_VALUE */\r
+\r
+#if !defined (HSI_VALUE)\r
+ #define HSI_VALUE ((uint32_t)8000000) /*!< Default value of the Internal oscillator in Hz.\r
+ This value can be provided and adapted by the user application. */\r
+#endif /* HSI_VALUE */\r
+\r
+#if !defined (HSI48_VALUE)\r
+#define HSI48_VALUE ((uint32_t)48000000) /*!< Default value of the HSI48 Internal oscillator in Hz.\r
+ This value can be provided and adapted by the user application. */\r
+#endif /* HSI48_VALUE */\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @addtogroup STM32F0xx_System_Private_Macros\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @addtogroup STM32F0xx_System_Private_Variables\r
+ * @{\r
+ */\r
+ /* This variable is updated in three ways:\r
+ 1) by calling CMSIS function SystemCoreClockUpdate()\r
+ 2) by calling HAL API function HAL_RCC_GetHCLKFreq()\r
+ 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency\r
+ Note: If you use this function to configure the system clock there is no need to\r
+ call the 2 first functions listed above, since SystemCoreClock variable is \r
+ updated automatically.\r
+ */\r
+uint32_t SystemCoreClock = 8000000;\r
+\r
+const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};\r
+const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @addtogroup STM32F0xx_System_Private_FunctionPrototypes\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/** @addtogroup STM32F0xx_System_Private_Functions\r
+ * @{\r
+ */\r
+\r
+/**\r
+ * @brief Setup the microcontroller system.\r
+ * Initialize the default HSI clock source, vector table location and the PLL configuration is reset.\r
+ * @param None\r
+ * @retval None\r
+ */\r
+void SystemInit(void)\r
+{\r
+ /* Reset the RCC clock configuration to the default reset state ------------*/\r
+ /* Set HSION bit */\r
+ RCC->CR |= (uint32_t)0x00000001U;\r
+\r
+#if defined (STM32F051x8) || defined (STM32F058x8)\r
+ /* Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE and MCOSEL[2:0] bits */\r
+ RCC->CFGR &= (uint32_t)0xF8FFB80CU;\r
+#else\r
+ /* Reset SW[1:0], HPRE[3:0], PPRE[2:0], ADCPRE, MCOSEL[2:0], MCOPRE[2:0] and PLLNODIV bits */\r
+ RCC->CFGR &= (uint32_t)0x08FFB80CU;\r
+#endif /* STM32F051x8 or STM32F058x8 */\r
+ \r
+ /* Reset HSEON, CSSON and PLLON bits */\r
+ RCC->CR &= (uint32_t)0xFEF6FFFFU;\r
+\r
+ /* Reset HSEBYP bit */\r
+ RCC->CR &= (uint32_t)0xFFFBFFFFU;\r
+\r
+ /* Reset PLLSRC, PLLXTPRE and PLLMUL[3:0] bits */\r
+ RCC->CFGR &= (uint32_t)0xFFC0FFFFU;\r
+\r
+ /* Reset PREDIV[3:0] bits */\r
+ RCC->CFGR2 &= (uint32_t)0xFFFFFFF0U;\r
+\r
+#if defined (STM32F072xB) || defined (STM32F078xx)\r
+ /* Reset USART2SW[1:0], USART1SW[1:0], I2C1SW, CECSW, USBSW and ADCSW bits */\r
+ RCC->CFGR3 &= (uint32_t)0xFFFCFE2CU;\r
+#elif defined (STM32F071xB)\r
+ /* Reset USART2SW[1:0], USART1SW[1:0], I2C1SW, CECSW and ADCSW bits */\r
+ RCC->CFGR3 &= (uint32_t)0xFFFFCEACU;\r
+#elif defined (STM32F091xC) || defined (STM32F098xx)\r
+ /* Reset USART3SW[1:0], USART2SW[1:0], USART1SW[1:0], I2C1SW, CECSW and ADCSW bits */\r
+ RCC->CFGR3 &= (uint32_t)0xFFF0FEACU;\r
+#elif defined (STM32F030x6) || defined (STM32F030x8) || defined (STM32F031x6) || defined (STM32F038xx) || defined (STM32F030xC)\r
+ /* Reset USART1SW[1:0], I2C1SW and ADCSW bits */\r
+ RCC->CFGR3 &= (uint32_t)0xFFFFFEECU;\r
+#elif defined (STM32F051x8) || defined (STM32F058xx)\r
+ /* Reset USART1SW[1:0], I2C1SW, CECSW and ADCSW bits */\r
+ RCC->CFGR3 &= (uint32_t)0xFFFFFEACU;\r
+#elif defined (STM32F042x6) || defined (STM32F048xx)\r
+ /* Reset USART1SW[1:0], I2C1SW, CECSW, USBSW and ADCSW bits */\r
+ RCC->CFGR3 &= (uint32_t)0xFFFFFE2CU;\r
+#elif defined (STM32F070x6) || defined (STM32F070xB)\r
+ /* Reset USART1SW[1:0], I2C1SW, USBSW and ADCSW bits */\r
+ RCC->CFGR3 &= (uint32_t)0xFFFFFE6CU;\r
+ /* Set default USB clock to PLLCLK, since there is no HSI48 */\r
+ RCC->CFGR3 |= (uint32_t)0x00000080U; \r
+#else\r
+ #warning "No target selected"\r
+#endif\r
+\r
+ /* Reset HSI14 bit */\r
+ RCC->CR2 &= (uint32_t)0xFFFFFFFEU;\r
+\r
+ /* Disable all interrupts */\r
+ RCC->CIR = 0x00000000U;\r
+\r
+}\r
+\r
+/**\r
+ * @brief Update SystemCoreClock variable according to Clock Register Values.\r
+ * The SystemCoreClock variable contains the core clock (HCLK), it can\r
+ * be used by the user application to setup the SysTick timer or configure\r
+ * other parameters.\r
+ *\r
+ * @note Each time the core clock (HCLK) changes, this function must be called\r
+ * to update SystemCoreClock variable value. Otherwise, any configuration\r
+ * based on this variable will be incorrect.\r
+ *\r
+ * @note - The system frequency computed by this function is not the real\r
+ * frequency in the chip. It is calculated based on the predefined\r
+ * constant and the selected clock source:\r
+ *\r
+ * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)\r
+ *\r
+ * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)\r
+ *\r
+ * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)\r
+ * or HSI_VALUE(*) multiplied/divided by the PLL factors.\r
+ *\r
+ * (*) HSI_VALUE is a constant defined in stm32f0xx_hal.h file (default value\r
+ * 8 MHz) but the real value may vary depending on the variations\r
+ * in voltage and temperature.\r
+ *\r
+ * (**) HSE_VALUE is a constant defined in stm32f0xx_hal.h file (default value\r
+ * 8 MHz), user has to ensure that HSE_VALUE is same as the real\r
+ * frequency of the crystal used. Otherwise, this function may\r
+ * have wrong result.\r
+ *\r
+ * - The result of this function could be not correct when using fractional\r
+ * value for HSE crystal.\r
+ *\r
+ * @param None\r
+ * @retval None\r
+ */\r
+void SystemCoreClockUpdate (void)\r
+{\r
+ uint32_t tmp = 0, pllmull = 0, pllsource = 0, predivfactor = 0;\r
+\r
+ /* Get SYSCLK source -------------------------------------------------------*/\r
+ tmp = RCC->CFGR & RCC_CFGR_SWS;\r
+\r
+ switch (tmp)\r
+ {\r
+ case RCC_CFGR_SWS_HSI: /* HSI used as system clock */\r
+ SystemCoreClock = HSI_VALUE;\r
+ break;\r
+ case RCC_CFGR_SWS_HSE: /* HSE used as system clock */\r
+ SystemCoreClock = HSE_VALUE;\r
+ break;\r
+ case RCC_CFGR_SWS_PLL: /* PLL used as system clock */\r
+ /* Get PLL clock source and multiplication factor ----------------------*/\r
+ pllmull = RCC->CFGR & RCC_CFGR_PLLMUL;\r
+ pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;\r
+ pllmull = ( pllmull >> 18) + 2;\r
+ predivfactor = (RCC->CFGR2 & RCC_CFGR2_PREDIV) + 1;\r
+\r
+ if (pllsource == RCC_CFGR_PLLSRC_HSE_PREDIV)\r
+ {\r
+ /* HSE used as PLL clock source : SystemCoreClock = HSE/PREDIV * PLLMUL */\r
+ SystemCoreClock = (HSE_VALUE/predivfactor) * pllmull;\r
+ }\r
+#if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F091xC) || defined(STM32F098xx)\r
+ else if (pllsource == RCC_CFGR_PLLSRC_HSI48_PREDIV)\r
+ {\r
+ /* HSI48 used as PLL clock source : SystemCoreClock = HSI48/PREDIV * PLLMUL */\r
+ SystemCoreClock = (HSI48_VALUE/predivfactor) * pllmull;\r
+ }\r
+#endif /* STM32F042x6 || STM32F048xx || STM32F072xB || STM32F078xx || STM32F091xC || STM32F098xx */\r
+ else\r
+ {\r
+#if defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F070x6) \\r
+ || defined(STM32F078xx) || defined(STM32F071xB) || defined(STM32F072xB) \\r
+ || defined(STM32F070xB) || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC)\r
+ /* HSI used as PLL clock source : SystemCoreClock = HSI/PREDIV * PLLMUL */\r
+ SystemCoreClock = (HSI_VALUE/predivfactor) * pllmull;\r
+#else\r
+ /* HSI used as PLL clock source : SystemCoreClock = HSI/2 * PLLMUL */\r
+ SystemCoreClock = (HSI_VALUE >> 1) * pllmull;\r
+#endif /* STM32F042x6 || STM32F048xx || STM32F070x6 || \r
+ STM32F071xB || STM32F072xB || STM32F078xx || STM32F070xB ||\r
+ STM32F091xC || STM32F098xx || STM32F030xC */\r
+ }\r
+ break;\r
+ default: /* HSI used as system clock */\r
+ SystemCoreClock = HSI_VALUE;\r
+ break;\r
+ }\r
+ /* Compute HCLK clock frequency ----------------*/\r
+ /* Get HCLK prescaler */\r
+ tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];\r
+ /* HCLK clock frequency */\r
+ SystemCoreClock >>= tmp;\r
+}\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/**\r
+ * @}\r
+ */\r
+\r
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/\r
+\r
--- /dev/null
+<?xml version="1.0" encoding="UTF-8"?>\r
+<Project>\r
+<ProjectName>/aux/misc/stm/test/\test</ProjectName>\r
+<ProjectNature>C</ProjectNature> \r
+<CMSIS>/aux/misc/stm/F0-package/Drivers/CMSIS</CMSIS>\r
+<HAL_Driver>/aux/misc/stm/F0-package/Drivers/CMSIS</HAL_Driver>\r
+<Toolchain>Makefile</Toolchain>\r
+<Version>0</Version>\r
+\r
+<filestoremove>\r
+ <file>\r
+ <name>/home/mj/STM32Cube/Repository/STM32Cube_FW_F0_V1.9.0/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_gpio.c</name>\r
+ <name>/home/mj/STM32Cube/Repository/STM32Cube_FW_F0_V1.9.0/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_exti.c</name>\r
+ <name>/home/mj/STM32Cube/Repository/STM32Cube_FW_F0_V1.9.0/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_pwr.c</name>\r
+ <name>/home/mj/STM32Cube/Repository/STM32Cube_FW_F0_V1.9.0/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usart.c</name>\r
+ <name>/home/mj/STM32Cube/Repository/STM32Cube_FW_F0_V1.9.0/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_rcc.c</name>\r
+ <name>/home/mj/STM32Cube/Repository/STM32Cube_FW_F0_V1.9.0/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_dma.c</name>\r
+ <name>/home/mj/STM32Cube/Repository/STM32Cube_FW_F0_V1.9.0/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_utils.c</name>\r
+ <name>/home/mj/STM32Cube/Repository/STM32Cube_FW_F0_V1.9.0/Drivers/CMSIS/Device/ST/STM32F0xx/Source/Templates/system_stm32f0xx.c</name>\r
+ </file>\r
+</filestoremove>\r
+\r
+<inctoremove>\r
+ <Aincludes>\r
+ <include></include>\r
+ </Aincludes>\r
+ <Cincludes>\r
+ <include>/home/mj/STM32Cube/Repository/STM32Cube_FW_F0_V1.9.0/Drivers/STM32F0xx_HAL_Driver/Inc</include>\r
+ <include>/home/mj/STM32Cube/Repository/STM32Cube_FW_F0_V1.9.0/Drivers/CMSIS/Device/ST/STM32F0xx/Include</include>\r
+ <include>/home/mj/STM32Cube/Repository/STM32Cube_FW_F0_V1.9.0/Drivers/CMSIS/Include</include>\r
+ </Cincludes>\r
+</inctoremove>\r
+\r
+<configs>\r
+ <config>\r
+ <name>test</name> \r
+ <device>STM32F030R8Tx</device> \r
+ <heapSize>0x200</heapSize>\r
+ <stackSize>0x400</stackSize>\r
+ \r
+ <board>NUCLEO-F030R8</board>\r
+ \r
+ <usedDebug>true</usedDebug>\r
+ <debugprobe>swd</debugprobe>\r
+ <optimization></optimization>\r
+ <icfloc>0</icfloc>\r
+ <Adefines>\r
+ <define></define>\r
+ </Adefines> \r
+\r
+ <UsedFreeRTOS></UsedFreeRTOS>\r
+ <Aincludes>\r
+\r
+\r
+ <include></include>\r
+ </Aincludes>\r
+ <Cdefines>\r
+ <define>USE_FULL_LL_DRIVER</define>\r
+ </Cdefines>\r
+ <definestoremove>\r
+ <Adefines>\r
+ <define></define>\r
+ </Adefines>\r
+ <Cdefines>\r
+ <define>USE_HAL_DRIVER</define>\r
+ <define>MBEDTLS_CONFIG_FILE="mbedtls_config.h"</define>\r
+ </Cdefines> \r
+ </definestoremove>\r
+ \r
+ <Cincludes>\r
+ <include>Inc</include>\r
+ <include>/aux/misc/stm/F0-package/Drivers/STM32F0xx_HAL_Driver/Inc</include>\r
+ <include>/aux/misc/stm/F0-package/Drivers/CMSIS/Device/ST/STM32F0xx/Include</include>\r
+ <include>/aux/misc/stm/F0-package/Drivers/CMSIS/Include</include>\r
+\r
+ </Cincludes>\r
+ </config>\r
+ </configs> \r
+\r
+ <underRoot>false</underRoot>\r
+\r
+ <group>\r
+ <name>Drivers</name> \r
+ <group>\r
+ <name>STM32F0xx_HAL_Driver</name>\r
+ <file>\r
+ <name>/aux/misc/stm/F0-package/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_gpio.c</name>\r
+ </file>\r
+ <file>\r
+ <name>/aux/misc/stm/F0-package/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_exti.c</name>\r
+ </file>\r
+ <file>\r
+ <name>/aux/misc/stm/F0-package/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_pwr.c</name>\r
+ </file>\r
+ <file>\r
+ <name>/aux/misc/stm/F0-package/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_usart.c</name>\r
+ </file>\r
+ <file>\r
+ <name>/aux/misc/stm/F0-package/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_rcc.c</name>\r
+ </file>\r
+ <file>\r
+ <name>/aux/misc/stm/F0-package/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_dma.c</name>\r
+ </file>\r
+ <file>\r
+ <name>/aux/misc/stm/F0-package/Drivers/STM32F0xx_HAL_Driver/Src/stm32f0xx_ll_utils.c</name>\r
+ </file>\r
+ </group>\r
+ <group>\r
+ <name>CMSIS</name>\r
+ <file>\r
+ <name>/Src/system_stm32f0xx.c</name>\r
+ </file>\r
+ </group>\r
+ </group> \r
+ <group>\r
+ <name>Application</name>\r
+ <group>\r
+ <name>User</name> \r
+ <file>\r
+ <name>Src/main.c</name>\r
+ </file>\r
+\r
+ <file>\r
+ <name>Src/stm32f0xx_it.c</name>\r
+ </file>\r
+\r
+\r
+\r
+ <group>\r
+ <name>Src</name>\r
+ <group>\r
+ <name>main.c</name>\r
+ <file>\r
+ <name>Src/main.c</name>\r
+ </file>\r
+ </group>\r
+ </group>\r
+ <group>\r
+ <name>Src</name>\r
+ <group>\r
+ <name>stm32f0xx_it.c</name>\r
+ <file>\r
+ <name>Src/stm32f0xx_it.c</name>\r
+ </file>\r
+ </group>\r
+ </group>\r
+\r
+</group> \r
+ </group>\r
+</Project>\r
--- /dev/null
+/**\r
+ ******************************************************************************\r
+ * @file startup_stm32f030x8.s\r
+ * @author MCD Application Team\r
+ * @brief STM32F030x8 devices vector table for GCC toolchain.\r
+ * This module performs:\r
+ * - Set the initial SP\r
+ * - Set the initial PC == Reset_Handler,\r
+ * - Set the vector table entries with the exceptions ISR address\r
+ * - Branches to main in the C library (which eventually\r
+ * calls main()).\r
+ * After Reset the Cortex-M0 processor is in Thread mode,\r
+ * priority is Privileged, and the Stack is set to Main.\r
+ ******************************************************************************\r
+ * \r
+ * Redistribution and use in source and binary forms, with or without modification,\r
+ * are permitted provided that the following conditions are met:\r
+ * 1. Redistributions of source code must retain the above copyright notice,\r
+ * this list of conditions and the following disclaimer.\r
+ * 2. Redistributions in binary form must reproduce the above copyright notice,\r
+ * this list of conditions and the following disclaimer in the documentation\r
+ * and/or other materials provided with the distribution.\r
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors\r
+ * may be used to endorse or promote products derived from this software\r
+ * without specific prior written permission.\r
+ *\r
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"\r
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE\r
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\r
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE\r
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL\r
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR\r
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\r
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,\r
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\r
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\r
+ *\r
+ ******************************************************************************\r
+ */\r
+\r
+ .syntax unified\r
+ .cpu cortex-m0\r
+ .fpu softvfp\r
+ .thumb\r
+\r
+.global g_pfnVectors\r
+.global Default_Handler\r
+\r
+/* start address for the initialization values of the .data section.\r
+defined in linker script */\r
+.word _sidata\r
+/* start address for the .data section. defined in linker script */\r
+.word _sdata\r
+/* end address for the .data section. defined in linker script */\r
+.word _edata\r
+/* start address for the .bss section. defined in linker script */\r
+.word _sbss\r
+/* end address for the .bss section. defined in linker script */\r
+.word _ebss\r
+\r
+ .section .text.Reset_Handler\r
+ .weak Reset_Handler\r
+ .type Reset_Handler, %function\r
+Reset_Handler:\r
+ ldr r0, =_estack\r
+ mov sp, r0 /* set stack pointer */\r
+\r
+/* Copy the data segment initializers from flash to SRAM */\r
+ ldr r0, =_sdata\r
+ ldr r1, =_edata\r
+ ldr r2, =_sidata\r
+ movs r3, #0\r
+ b LoopCopyDataInit\r
+\r
+CopyDataInit:\r
+ ldr r4, [r2, r3]\r
+ str r4, [r0, r3]\r
+ adds r3, r3, #4\r
+\r
+LoopCopyDataInit:\r
+ adds r4, r0, r3\r
+ cmp r4, r1\r
+ bcc CopyDataInit\r
+ \r
+/* Zero fill the bss segment. */\r
+ ldr r2, =_sbss\r
+ ldr r4, =_ebss\r
+ movs r3, #0\r
+ b LoopFillZerobss\r
+\r
+FillZerobss:\r
+ str r3, [r2]\r
+ adds r2, r2, #4\r
+\r
+LoopFillZerobss:\r
+ cmp r2, r4\r
+ bcc FillZerobss\r
+\r
+/* Call the clock system intitialization function.*/\r
+ bl SystemInit\r
+/* Call static constructors */\r
+ bl __libc_init_array\r
+/* Call the application's entry point.*/\r
+ bl main\r
+\r
+LoopForever:\r
+ b LoopForever\r
+\r
+\r
+.size Reset_Handler, .-Reset_Handler\r
+\r
+/**\r
+ * @brief This is the code that gets called when the processor receives an\r
+ * unexpected interrupt. This simply enters an infinite loop, preserving\r
+ * the system state for examination by a debugger.\r
+ *\r
+ * @param None\r
+ * @retval : None\r
+*/\r
+ .section .text.Default_Handler,"ax",%progbits\r
+Default_Handler:\r
+Infinite_Loop:\r
+ b Infinite_Loop\r
+ .size Default_Handler, .-Default_Handler\r
+/******************************************************************************\r
+*\r
+* The minimal vector table for a Cortex M0. Note that the proper constructs\r
+* must be placed on this to ensure that it ends up at physical address\r
+* 0x0000.0000.\r
+*\r
+******************************************************************************/\r
+ .section .isr_vector,"a",%progbits\r
+ .type g_pfnVectors, %object\r
+ .size g_pfnVectors, .-g_pfnVectors\r
+\r
+\r
+g_pfnVectors:\r
+ .word _estack\r
+ .word Reset_Handler\r
+ .word NMI_Handler\r
+ .word HardFault_Handler\r
+ .word 0\r
+ .word 0\r
+ .word 0\r
+ .word 0\r
+ .word 0\r
+ .word 0\r
+ .word 0\r
+ .word SVC_Handler\r
+ .word 0\r
+ .word 0\r
+ .word PendSV_Handler\r
+ .word SysTick_Handler\r
+ .word WWDG_IRQHandler /* Window WatchDog */\r
+ .word 0 /* Reserved */\r
+ .word RTC_IRQHandler /* RTC through the EXTI line */\r
+ .word FLASH_IRQHandler /* FLASH */\r
+ .word RCC_IRQHandler /* RCC */\r
+ .word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */\r
+ .word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */\r
+ .word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */\r
+ .word 0 /* Reserved */\r
+ .word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */\r
+ .word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */\r
+ .word DMA1_Channel4_5_IRQHandler /* DMA1 Channel 4 and Channel 5 */\r
+ .word ADC1_IRQHandler /* ADC1 */\r
+ .word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */\r
+ .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */\r
+ .word 0 /* Reserved */\r
+ .word TIM3_IRQHandler /* TIM3 */\r
+ .word TIM6_IRQHandler /* TIM6 */\r
+ .word 0 /* Reserved */\r
+ .word TIM14_IRQHandler /* TIM14 */\r
+ .word TIM15_IRQHandler /* TIM15 */\r
+ .word TIM16_IRQHandler /* TIM16 */\r
+ .word TIM17_IRQHandler /* TIM17 */\r
+ .word I2C1_IRQHandler /* I2C1 */\r
+ .word I2C2_IRQHandler /* I2C2 */\r
+ .word SPI1_IRQHandler /* SPI1 */\r
+ .word SPI2_IRQHandler /* SPI2 */\r
+ .word USART1_IRQHandler /* USART1 */\r
+ .word USART2_IRQHandler /* USART2 */\r
+ .word 0 /* Reserved */\r
+ .word 0 /* Reserved */\r
+ .word 0 /* Reserved */\r
+\r
+/*******************************************************************************\r
+*\r
+* Provide weak aliases for each Exception handler to the Default_Handler.\r
+* As they are weak aliases, any function with the same name will override\r
+* this definition.\r
+*\r
+*******************************************************************************/\r
+\r
+ .weak NMI_Handler\r
+ .thumb_set NMI_Handler,Default_Handler\r
+\r
+ .weak HardFault_Handler\r
+ .thumb_set HardFault_Handler,Default_Handler\r
+\r
+ .weak SVC_Handler\r
+ .thumb_set SVC_Handler,Default_Handler\r
+\r
+ .weak PendSV_Handler\r
+ .thumb_set PendSV_Handler,Default_Handler\r
+\r
+ .weak SysTick_Handler\r
+ .thumb_set SysTick_Handler,Default_Handler\r
+\r
+ .weak WWDG_IRQHandler\r
+ .thumb_set WWDG_IRQHandler,Default_Handler\r
+\r
+ .weak RTC_IRQHandler\r
+ .thumb_set RTC_IRQHandler,Default_Handler\r
+\r
+ .weak FLASH_IRQHandler\r
+ .thumb_set FLASH_IRQHandler,Default_Handler\r
+\r
+ .weak RCC_IRQHandler\r
+ .thumb_set RCC_IRQHandler,Default_Handler\r
+\r
+ .weak EXTI0_1_IRQHandler\r
+ .thumb_set EXTI0_1_IRQHandler,Default_Handler\r
+\r
+ .weak EXTI2_3_IRQHandler\r
+ .thumb_set EXTI2_3_IRQHandler,Default_Handler\r
+\r
+ .weak EXTI4_15_IRQHandler\r
+ .thumb_set EXTI4_15_IRQHandler,Default_Handler\r
+\r
+ .weak DMA1_Channel1_IRQHandler\r
+ .thumb_set DMA1_Channel1_IRQHandler,Default_Handler\r
+\r
+ .weak DMA1_Channel2_3_IRQHandler\r
+ .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler\r
+\r
+ .weak DMA1_Channel4_5_IRQHandler\r
+ .thumb_set DMA1_Channel4_5_IRQHandler,Default_Handler\r
+\r
+ .weak ADC1_IRQHandler\r
+ .thumb_set ADC1_IRQHandler,Default_Handler\r
+\r
+ .weak TIM1_BRK_UP_TRG_COM_IRQHandler\r
+ .thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler\r
+\r
+ .weak TIM1_CC_IRQHandler\r
+ .thumb_set TIM1_CC_IRQHandler,Default_Handler\r
+\r
+ .weak TIM3_IRQHandler\r
+ .thumb_set TIM3_IRQHandler,Default_Handler\r
+\r
+ .weak TIM6_IRQHandler\r
+ .thumb_set TIM6_IRQHandler,Default_Handler\r
+\r
+ .weak TIM14_IRQHandler\r
+ .thumb_set TIM14_IRQHandler,Default_Handler\r
+\r
+ .weak TIM15_IRQHandler\r
+ .thumb_set TIM15_IRQHandler,Default_Handler\r
+\r
+ .weak TIM16_IRQHandler\r
+ .thumb_set TIM16_IRQHandler,Default_Handler\r
+\r
+ .weak TIM17_IRQHandler\r
+ .thumb_set TIM17_IRQHandler,Default_Handler\r
+\r
+ .weak I2C1_IRQHandler\r
+ .thumb_set I2C1_IRQHandler,Default_Handler\r
+\r
+ .weak I2C2_IRQHandler\r
+ .thumb_set I2C2_IRQHandler,Default_Handler\r
+\r
+ .weak SPI1_IRQHandler\r
+ .thumb_set SPI1_IRQHandler,Default_Handler\r
+\r
+ .weak SPI2_IRQHandler\r
+ .thumb_set SPI2_IRQHandler,Default_Handler\r
+\r
+ .weak USART1_IRQHandler\r
+ .thumb_set USART1_IRQHandler,Default_Handler\r
+\r
+ .weak USART2_IRQHandler\r
+ .thumb_set USART2_IRQHandler,Default_Handler\r
+\r
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/\r
+\r
--- /dev/null
+#MicroXplorer Configuration settings - do not modify
+File.Version=6
+KeepUserPlacement=true
+Mcu.Family=STM32F0
+Mcu.IP0=NVIC
+Mcu.IP1=RCC
+Mcu.IP2=SYS
+Mcu.IP3=USART2
+Mcu.IPNb=4
+Mcu.Name=STM32F030R8Tx
+Mcu.Package=LQFP64
+Mcu.Pin0=PC13
+Mcu.Pin1=PC14-OSC32_IN
+Mcu.Pin10=VP_SYS_VS_Systick
+Mcu.Pin2=PC15-OSC32_OUT
+Mcu.Pin3=PF0-OSC_IN
+Mcu.Pin4=PF1-OSC_OUT
+Mcu.Pin5=PA2
+Mcu.Pin6=PA3
+Mcu.Pin7=PA5
+Mcu.Pin8=PA13
+Mcu.Pin9=PA14
+Mcu.PinsNb=11
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32F030R8Tx
+MxCube.Version=4.25.1
+MxDb.Version=DB.4.0.251
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:false\:false
+NVIC.SVC_IRQn=true\:0\:0\:false\:false\:false\:false
+NVIC.SysTick_IRQn=true\:0\:0\:true\:false\:true\:true
+PA13.GPIOParameters=GPIO_Label
+PA13.GPIO_Label=TMS
+PA13.Locked=true
+PA13.Mode=Serial_Wire
+PA13.Signal=SYS_SWDIO
+PA14.GPIOParameters=GPIO_Label
+PA14.GPIO_Label=TCK
+PA14.Locked=true
+PA14.Mode=Serial_Wire
+PA14.Signal=SYS_SWCLK
+PA2.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label,GPIO_Mode
+PA2.GPIO_Label=USART_TX
+PA2.GPIO_Mode=GPIO_MODE_AF_PP
+PA2.GPIO_PuPd=GPIO_NOPULL
+PA2.GPIO_Speed=GPIO_SPEED_FREQ_LOW
+PA2.Locked=true
+PA2.Mode=Asynchronous
+PA2.Signal=USART2_TX
+PA3.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label,GPIO_Mode
+PA3.GPIO_Label=USART_RX
+PA3.GPIO_Mode=GPIO_MODE_AF_PP
+PA3.GPIO_PuPd=GPIO_NOPULL
+PA3.GPIO_Speed=GPIO_SPEED_FREQ_LOW
+PA3.Locked=true
+PA3.Mode=Asynchronous
+PA3.Signal=USART2_RX
+PA5.GPIOParameters=GPIO_Speed,GPIO_PuPd,GPIO_Label,GPIO_Mode
+PA5.GPIO_Label=LD2 [Green Led]
+PA5.GPIO_Mode=GPIO_MODE_OUTPUT_PP
+PA5.GPIO_PuPd=GPIO_NOPULL
+PA5.GPIO_Speed=GPIO_SPEED_FREQ_LOW
+PA5.Locked=true
+PA5.Signal=GPIO_Output
+PC13.GPIOParameters=GPIO_Label,GPIO_ModeDefaultEXTI
+PC13.GPIO_Label=B1 [Blue PushButton]
+PC13.GPIO_ModeDefaultEXTI=GPIO_MODE_IT_FALLING
+PC13.Locked=true
+PC13.Signal=GPXTI13
+PC14-OSC32_IN.Locked=true
+PC14-OSC32_IN.Mode=LSE-External-Oscillator
+PC14-OSC32_IN.Signal=RCC_OSC32_IN
+PC15-OSC32_OUT.Locked=true
+PC15-OSC32_OUT.Mode=LSE-External-Oscillator
+PC15-OSC32_OUT.Signal=RCC_OSC32_OUT
+PCC.Checker=false
+PCC.Line=STM32F0x0 Value Line
+PCC.MCU=STM32F030R8Tx
+PCC.PartNumber=STM32F030R8Tx
+PCC.Seq0=0
+PCC.Series=STM32F0
+PCC.Temperature=25
+PCC.Vdd=3.6
+PF0-OSC_IN.Locked=true
+PF0-OSC_IN.Mode=HSE-External-Clock-Source
+PF0-OSC_IN.Signal=RCC_OSC_IN
+PF1-OSC_OUT.Locked=true
+PF1-OSC_OUT.Signal=RCC_OSC_OUT
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerOptimize=3
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.CustomerFirmwarePackage=/aux/misc/stm/F0-package
+ProjectManager.DefaultFWLocation=false
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32F030R8Tx
+ProjectManager.FirmwarePackage=STM32Cube FW_F0 V1.9.0
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Src
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=test.ioc
+ProjectManager.ProjectName=test
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=Makefile
+ProjectManager.ToolChainLocation=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-MX_GPIO_Init-GPIO-false-LL-true,2-SystemClock_Config-RCC-false-LL-false,3-MX_USART2_UART_Init-USART2-false-LL-true
+RCC.AHBFreq_Value=32000000
+RCC.APB1Freq_Value=32000000
+RCC.APB1TimFreq_Value=32000000
+RCC.FCLKCortexFreq_Value=32000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=32000000
+RCC.IPParameters=AHBFreq_Value,APB1Freq_Value,APB1TimFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,MCOFreq_Value,PLLCLKFreq_Value,PLLMCOFreq_Value,PLLMUL,SYSCLKFreq_VALUE,SYSCLKSource,TimSysFreq_Value,USART1Freq_Value
+RCC.MCOFreq_Value=32000000
+RCC.PLLCLKFreq_Value=32000000
+RCC.PLLMCOFreq_Value=16000000
+RCC.PLLMUL=RCC_PLL_MUL8
+RCC.SYSCLKFreq_VALUE=32000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.TimSysFreq_Value=32000000
+RCC.USART1Freq_Value=32000000
+SH.GPXTI13.0=GPIO_EXTI13
+SH.GPXTI13.ConfNb=1
+USART2.IPParameters=VirtualMode-Asynchronous
+USART2.VirtualMode-Asynchronous=VM_ASYNC
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=NUCLEO-F030R8
+boardIOC=true
projects / home-hw.git / commitdiff