]> mj.ucw.cz Git - home-hw.git/commitdiff
DMA works
authorMartin Mares <mj@ucw.cz>
Sat, 21 Jul 2018 21:13:20 +0000 (23:13 +0200)
committerMartin Mares <mj@ucw.cz>
Sat, 21 Jul 2018 21:13:20 +0000 (23:13 +0200)
nucleo-test/Src/test.c

index 0939aeb8be82d2d210a205a9aea6e73370c173af..717771dbdee783a314a8686df1901fc1e5b763f5 100644 (file)
@@ -421,16 +421,32 @@ void run_test(void)
 
 #else
 
+static volatile uint32_t dma_buffer;
+
 static void ds18b20_reset(void)
 {
   debug_puts("DS18B20: Reset\r\n");
-  //LL_TIM_DisableCounter(TIM3);
+  LL_TIM_DisableCounter(TIM3);
   LL_TIM_SetOnePulseMode(TIM3, LL_TIM_ONEPULSEMODE_SINGLE);
+  LL_TIM_CC_SetDMAReqTrigger(TIM3, LL_TIM_CCDMAREQUEST_CC);
+
+  dma_buffer = 0xdeadbeef;
+  LL_DMA_SetMemoryAddress(DMA1, LL_DMA_CHANNEL_4, (uint32_t) &dma_buffer);
+  LL_DMA_SetPeriphAddress(DMA1, LL_DMA_CHANNEL_4, (uint32_t) &THERMO_GPIO_Port->IDR);
+  LL_DMA_SetDataLength(DMA1, LL_DMA_CHANNEL_4, 1);
+  LL_DMA_EnableChannel(DMA1, LL_DMA_CHANNEL_4);
 
   LL_TIM_OC_InitTypeDef oc;
+
+  LL_TIM_OC_StructInit(&oc);
+  oc.OCMode = LL_TIM_OCMODE_FROZEN;
+  oc.CompareValue = 560;
+  LL_TIM_OC_Init(TIM3, LL_TIM_CHANNEL_CH1, &oc);
+  LL_TIM_EnableDMAReq_CC1(TIM3);
+
+  LL_TIM_OC_StructInit(&oc);
   oc.OCMode = LL_TIM_OCMODE_FORCED_ACTIVE;
   oc.OCState = LL_TIM_OCSTATE_ENABLE;
-  oc.OCNState = LL_TIM_OCSTATE_DISABLE;
   oc.CompareValue = 480;
   oc.OCPolarity = LL_TIM_OCPOLARITY_LOW;
   LL_TIM_OC_Init(TIM3, LL_TIM_CHANNEL_CH2, &oc);
@@ -439,9 +455,15 @@ static void ds18b20_reset(void)
   LL_TIM_OC_SetMode(TIM3, LL_TIM_CHANNEL_CH2, LL_TIM_OCMODE_INACTIVE);
 
   LL_TIM_EnableCounter(TIM3);
-  while (!LL_TIM_IsEnabledCounter(TIM3))
+
+  while (LL_TIM_IsEnabledCounter(TIM3))
     ;
   // Counter is automatically disabled at the end of cycle
+
+  LL_TIM_DisableDMAReq_CC1(TIM3);
+  LL_DMA_DisableChannel(DMA1, LL_DMA_CHANNEL_4);
+
+  debug_printf("DMA = %08x [%u] (%u remains)\r\n", dma_buffer, !!(dma_buffer & THERMO_Pin), LL_DMA_GetDataLength(DMA1, LL_DMA_CHANNEL_4));
 }
 
 static void ds18b20_send_byte(byte b)
@@ -455,7 +477,6 @@ static void ds18b20_send_byte(byte b)
       LL_TIM_EnableCounter(TIM3);
       while (LL_TIM_IsEnabledCounter(TIM3))
        ;
-      // Counter is automatically disabled at the end of cycle
     }
 }