Support PM No_Soft_Reset bit in lspci

Signed-off-by: Yu Zhao <yu.zhao@intel.com>

diff --git a/lib/header.h b/lib/header.h
index 24b569e16c3e75deab4baa4a35b564253346cfd8..ad8bce6f4548bafbb7d54462a22c6e600afa86d6 100644 (file)
--- a/lib/header.h
+++ b/lib/header.h
@@ -238,6 +238,7 @@
 #define  PCI_PM_CAP_PME_D3_COLD        0x8000  /* PME can be asserted from D3cold */
 #define PCI_PM_CTRL            4       /* PM control and status register */
 #define  PCI_PM_CTRL_STATE_MASK        0x0003  /* Current power state (D0 to D3) */
+#define  PCI_PM_CTRL_NO_SOFT_RST       0x0008  /* No Soft Reset from D3hot to D0 */
 #define  PCI_PM_CTRL_PME_ENABLE        0x0100  /* PME pin enable */
 #define  PCI_PM_CTRL_DATA_SEL_MASK     0x1e00  /* PM table data index */
 #define  PCI_PM_CTRL_DATA_SCALE_MASK   0x6000  /* PM table data scaling factor */

diff --git a/ls-caps.c b/ls-caps.c
index 8b0f8204d4ec52dd230aaf56fb01d650d301014f..3e01f2c30e2bc554427d260d7059f72deffba7f7 100644 (file)
--- a/ls-caps.c
+++ b/ls-caps.c
@@ -34,8 +34,9 @@ cap_pm(struct device *d, int where, int cap)
   if (!config_fetch(d, where + PCI_PM_CTRL, PCI_PM_SIZEOF - PCI_PM_CTRL))
     return;
   t = get_conf_word(d, where + PCI_PM_CTRL);
-  printf("\t\tStatus: D%d PME-Enable%c DSel=%d DScale=%d PME%c\n",
+  printf("\t\tStatus: D%d NoSoftRst%c PME-Enable%c DSel=%d DScale=%d PME%c\n",
         t & PCI_PM_CTRL_STATE_MASK,
+        FLAG(t, PCI_PM_CTRL_NO_SOFT_RST),
         FLAG(t, PCI_PM_CTRL_PME_ENABLE),
         (t & PCI_PM_CTRL_DATA_SEL_MASK) >> 9,
         (t & PCI_PM_CTRL_DATA_SCALE_MASK) >> 13,