- debug_printf("DMA = %08x [%u] (%u remains)\r\n", dma_buffer, !!(dma_buffer & THERMO_Pin), LL_DMA_GetDataLength(DMA1, LL_DMA_CHANNEL_4));
+ // debug_printf("Init DMA: %08x [%u] (%u remains)\r\n", ds_dma_buffer, !!(ds_dma_buffer & THERMO_Pin), LL_DMA_GetDataLength(DMA1, LL_DMA_CHANNEL_4));
+}
+
+static void ds_send_byte(byte b)
+{
+ // debug_printf("DS write: %02x\r\n", b);
+ LL_TIM_SetAutoReload(TIM3, 99); // Each write slot takes 100μs
+ for (uint m=1; m < 0x100; m <<= 1)
+ {
+ LL_TIM_OC_SetCompareCH2(TIM3, ((b & m) ? 1 : 89)); // 1: 1μs pulse, 0: 89μs pulse
+ LL_TIM_OC_SetMode(TIM3, LL_TIM_CHANNEL_CH2, LL_TIM_OCMODE_FORCED_ACTIVE);
+ LL_TIM_OC_SetMode(TIM3, LL_TIM_CHANNEL_CH2, LL_TIM_OCMODE_INACTIVE);
+ LL_TIM_EnableCounter(TIM3);
+ while (LL_TIM_IsEnabledCounter(TIM3))
+ ;
+ }