ls-ecaps: Decode DPC RP PIO registers

ls-ecaps: Decode DPC RP PIO registers

The RP PIO registers in the DPC extended capability contain status
information and control bits related to how root ports handle failing
requests.

Sample output:
        Capabilities: [380 v1] Downstream Port Containment
                DpcCap: IntMsgNum 0, RPExt+ PoisonedTLP+ SwTrigger+ RP PIO Log 6, DL_ActiveErr+
                DpcCtl: Trigger:0 Cmpl+ INT+ ErrCor+ PoisonedTLP- SwTrigger- DL_ActiveErr-
                DpcSta: Trigger- Reason:00 INT- RPBusy- TriggerExt:00 RP PIO ErrPtr:11
                Source: 0000
                RP PIO:
                        Sta: CfgUR+ CfgCA- CfgCTO- IOUR- IOCA- IOCTO- MemUR- MemCA+ MemCTO-
                        Msk: CfgUR+ CfgCA+ CfgCTO+ IOUR+ IOCA+ IOCTO+ MemUR- MemCA- MemCTO-
                        Sev: CfgUR- CfgCA- CfgCTO- IOUR- IOCA- IOCTO- MemUR- MemCA- MemCTO-
                        Err: CfgUR- CfgCA- CfgCTO- IOUR- IOCA- IOCTO- MemUR- MemCA- MemCTO-
                        Exc: CfgUR- CfgCA- CfgCTO- IOUR- IOCA- IOCTO- MemUR- MemCA- MemCTO-
                        HeaderLog: 00001001 0000220f f7a01100 00000000
                        ImpSpecLog: 00000000
                        TLPPrefixLog: 00000000

Signed-off-by: Mattias Nissler <mnissler@meta.com>