]> mj.ucw.cz Git - pciutils.git/commit
pcilmr: Apply grading quirk for Ice Lake RC ports
authorNikita Proshkin <n.proshkin@yadro.com>
Wed, 22 May 2024 16:06:33 +0000 (19:06 +0300)
committerMartin Mares <mj@ucw.cz>
Mon, 27 May 2024 12:35:56 +0000 (14:35 +0200)
commit6de412a1f06de4d4e180c97a2e7dc393de072e33
treef1d40962535d9e8b9918fb21a6d9b63d50a542a8
parent839966c3e6b2d11b969e145d832f2f3afcdc1852
pcilmr: Apply grading quirk for Ice Lake RC ports

Ice Lake RC ports don't support two side independent timing margining,
however the entire margin across the eye is what is reported by one side
margining. Utility already has quirks for Ice Lake RC, so expand them
based on this grading information.

Signed-off-by: Nikita Proshkin <n.proshkin@yadro.com>
lmr/margin.c
lmr/margin_log.c