lspci: Indent PCIe Capability DevCap2 & DevCtl2 correctly

lspci: Indent PCIe Capability DevCap2 & DevCtl2 correctly

Indent the AtomicOpsCap and AtomicOpsCtl fields to make it clear that these
are part of the DevCap2 and DevCtl2 registers.

The difference in the "lspci -vv" output looks like this:

        DevCap2: Completion Timeout: Range ABC, TimeoutDis+, LTR+, OBFF Not Supported ARIFwd+
-       AtomicOpsCap: Routing- 32bit- 64bit- 128bitCAS-
+                AtomicOpsCap: Routing- 32bit- 64bit- 128bitCAS-
        DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-, LTR+, OBFF Disabled ARIFwd-
-       AtomicOpsCtl: ReqEn- EgressBlck-
+                AtomicOpsCtl: ReqEn- EgressBlck-

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>