lspci: add VirtIO SharedMemory capability support

lspci: add VirtIO SharedMemory capability support

This patch adds the support for VirtIO share memory capability [1].
A shared memory region is defined in a `struct virtio_pci_cap64`
where the highest 32 bits of `offset` and `size` are appened to the
original `struct virtio_pci_cap`.

With this patch, a VirtIO PMEM device (ID 27) shows like the
following:

```
00:02.0 Class ffff: Device 1af4:105b (rev 01)
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 0
        Region 0: Memory at 100001000 (64-bit, non-prefetchable) [size=4K]
        Region 2: Memory at 101000000 (64-bit, non-prefetchable) [size=16M]
        Capabilities: [40] Vendor Specific Information: VirtIO: CommonCfg
                BAR=0 offset=00000000 size=0000003c
        Capabilities: [50] Vendor Specific Information: VirtIO: ISR
                BAR=0 offset=0000003c size=00000001
        Capabilities: [60] Vendor Specific Information: VirtIO: Notify
                BAR=0 offset=00000040 size=00000002 multiplier=00000002
        Capabilities: [78] MSI-X: Enable+ Count=2 Masked-
                Vector table: BAR=0 offset=00000058
                PBA: BAR=0 offset=00000078
        Capabilities: [88] Vendor Specific Information: VirtIO: DeviceCfg
                BAR=0 offset=00000044 size=00000010
        Capabilities: [98] Vendor Specific Information: VirtIO: SharedMemory
                BAR=2 offset=0000000000000000 size=0000000001000000 id=0
        Kernel driver in use: virtio-pci
```

[1] Sec 4.1.4.7 https://docs.oasis-open.org/virtio/virtio/v1.2/csd01/virtio-v1.2-csd01.html#x1-1240004

Signed-off-by: Changyuan Lyu <changyuan.lv@gmail.com>