X-Git-Url: http://mj.ucw.cz/gitweb/?a=blobdiff_plain;f=ls-ecaps.c;h=ed10f72be2628512c44bff961da71b41c9f562a1;hb=e2864327195d067728dd904f8ff72959c8097508;hp=0d14b7f1c37d9671bbfabcfd5fac9e8e945234c8;hpb=187bf2f5bdd1eae3a81f697525511f34fab5536c;p=pciutils.git diff --git a/ls-ecaps.c b/ls-ecaps.c index 0d14b7f..ed10f72 100644 --- a/ls-ecaps.c +++ b/ls-ecaps.c @@ -1,7 +1,7 @@ /* * The PCI Utilities -- Show Extended Capabilities * - * Copyright (c) 1997--2008 Martin Mares + * Copyright (c) 1997--2010 Martin Mares * * Can be freely distributed and used under the terms of the GNU GPL. */ @@ -213,6 +213,176 @@ cap_sriov(struct device *d, int where) PCI_IOV_MSA_BIR(l)); } +static void +cap_vc(struct device *d, int where) +{ + u32 cr1, cr2; + u16 ctrl, status; + int evc_cnt; + int arb_table_pos; + int i, j; + static const char ref_clocks[][6] = { "100ns" }; + static const char arb_selects[8][7] = { "Fixed", "WRR32", "WRR64", "WRR128", "??4", "??5", "??6", "??7" }; + static const char vc_arb_selects[8][8] = { "Fixed", "WRR32", "WRR64", "WRR128", "TWRR128", "WRR256", "??6", "??7" }; + char buf[8]; + + printf("Virtual Channel\n"); + if (verbose < 2) + return; + + if (!config_fetch(d, where + 4, 0x1c - 4)) + return; + + cr1 = get_conf_long(d, where + PCI_VC_PORT_REG1); + cr2 = get_conf_long(d, where + PCI_VC_PORT_REG2); + ctrl = get_conf_word(d, where + PCI_VC_PORT_CTRL); + status = get_conf_word(d, where + PCI_VC_PORT_STATUS); + + evc_cnt = BITS(cr1, 0, 3); + printf("\t\tCaps:\tLPEVC=%d RefClk=%s PATEntryBits=%d\n", + BITS(cr1, 4, 3), + TABLE(ref_clocks, BITS(cr1, 8, 2), buf), + 1 << BITS(cr1, 10, 2)); + + printf("\t\tArb:"); + for (i=0; i<8; i++) + if (arb_selects[i][0] != '?' || cr2 & (1 << i)) + printf("%c%s%c", (i ? ' ' : '\t'), arb_selects[i], FLAG(cr2, 1 << i)); + arb_table_pos = BITS(cr2, 24, 8); + + printf("\n\t\tCtrl:\tArbSelect=%s\n", TABLE(arb_selects, BITS(ctrl, 1, 3), buf)); + printf("\t\tStatus:\tInProgress%c\n", FLAG(status, 1)); + + if (arb_table_pos) + { + arb_table_pos = where + 16*arb_table_pos; + printf("\t\tPort Arbitration Table [%x] \n", arb_table_pos); + } + + for (i=0; i<=evc_cnt; i++) + { + int pos = where + PCI_VC_RES_CAP + 12*i; + u32 rcap, rctrl; + u16 rstatus; + int pat_pos; + + printf("\t\tVC%d:\t", i); + if (!config_fetch(d, pos, 12)) + { + printf("\n"); + continue; + } + rcap = get_conf_long(d, pos); + rctrl = get_conf_long(d, pos+4); + rstatus = get_conf_word(d, pos+8); + + pat_pos = BITS(rcap, 24, 8); + printf("Caps:\tPATOffset=%02x MaxTimeSlots=%d RejSnoopTrans%c\n", + pat_pos, + BITS(rcap, 16, 6) + 1, + FLAG(rcap, 1 << 15)); + + printf("\t\t\tArb:"); + for (j=0; j<8; j++) + if (vc_arb_selects[j][0] != '?' || rcap & (1 << j)) + printf("%c%s%c", (j ? ' ' : '\t'), vc_arb_selects[j], FLAG(rcap, 1 << j)); + + printf("\n\t\t\tCtrl:\tEnable%c ID=%d ArbSelect=%s TC/VC=%02x\n", + FLAG(rctrl, 1 << 31), + BITS(rctrl, 24, 3), + TABLE(vc_arb_selects, BITS(rctrl, 17, 3), buf), + BITS(rctrl, 0, 8)); + + printf("\t\t\tStatus:\tNegoPending%c InProgress%c\n", + FLAG(rstatus, 2), + FLAG(rstatus, 1)); + + if (pat_pos) + printf("\t\t\tPort Arbitration Table \n"); + } +} + +static void +cap_rclink(struct device *d, int where) +{ + u32 esd; + int num_links; + int i; + static const char elt_types[][9] = { "Config", "Egress", "Internal" }; + char buf[8]; + + printf("Root Complex Link\n"); + if (verbose < 2) + return; + + if (!config_fetch(d, where + 4, PCI_RCLINK_LINK1 - 4)) + return; + + esd = get_conf_long(d, where + PCI_RCLINK_ESD); + num_links = BITS(esd, 8, 8); + printf("\t\tDesc:\tPortNumber=%02x ComponentID=%02x EltType=%s\n", + BITS(esd, 24, 8), + BITS(esd, 16, 8), + TABLE(elt_types, BITS(esd, 0, 8), buf)); + + for (i=0; i\n"); + return; + } + desc = get_conf_long(d, pos + PCI_RCLINK_LINK_DESC); + addr_lo = get_conf_long(d, pos + PCI_RCLINK_LINK_ADDR); + addr_hi = get_conf_long(d, pos + PCI_RCLINK_LINK_ADDR + 4); + + printf("Desc:\tTargetPort=%02x TargetComponent=%02x AssocRCRB%c LinkType=%s LinkValid%c\n", + BITS(desc, 24, 8), + BITS(desc, 16, 8), + FLAG(desc, 4), + ((desc & 2) ? "Config" : "MemMapped"), + FLAG(desc, 1)); + + if (desc & 2) + { + int n = addr_lo & 7; + if (!n) + n = 8; + printf("\t\t\tAddr:\t%02x:%02x.%d CfgSpace=%08x%08x\n", + BITS(addr_lo, 20, n), + BITS(addr_lo, 15, 5), + BITS(addr_lo, 12, 3), + addr_hi, addr_lo); + } + else + printf("\t\t\tAddr:\t%08x%08x\n", addr_hi, addr_lo); + } +} + +static void +cap_evendor(struct device *d, int where) +{ + u32 hdr; + + printf("Vendor Specific Information: "); + if (!config_fetch(d, where + PCI_EVNDR_HEADER, 4)) + { + printf("\n"); + return; + } + + hdr = get_conf_long(d, where + PCI_EVNDR_HEADER); + printf("ID=%04x Rev=%d Len=%03x \n", + BITS(hdr, 0, 16), + BITS(hdr, 16, 4), + BITS(hdr, 20, 12)); +} + void show_ext_caps(struct device *d) { @@ -222,7 +392,7 @@ show_ext_caps(struct device *d) do { u32 header; - int id; + int id, version; if (!config_fetch(d, where, 4)) break; @@ -230,7 +400,11 @@ show_ext_caps(struct device *d) if (!header) break; id = header & 0xffff; - printf("\tCapabilities: [%03x] ", where); + version = (header >> 16) & 0xf; + printf("\tCapabilities: [%03x", where); + if (verbose > 1) + printf(" v%d", version); + printf("] "); if (been_there[where]++) { printf("\n"); @@ -242,7 +416,8 @@ show_ext_caps(struct device *d) cap_aer(d, where); break; case PCI_EXT_CAP_ID_VC: - printf("Virtual Channel \n"); + case PCI_EXT_CAP_ID_VC2: + cap_vc(d, where); break; case PCI_EXT_CAP_ID_DSN: cap_dsn(d, where); @@ -251,7 +426,7 @@ show_ext_caps(struct device *d) printf("Power Budgeting \n"); break; case PCI_EXT_CAP_ID_RCLINK: - printf("Root Complex Link \n"); + cap_rclink(d, where); break; case PCI_EXT_CAP_ID_RCILINK: printf("Root Complex Internal Link \n"); @@ -266,7 +441,7 @@ show_ext_caps(struct device *d) printf("Root Bridge Control Block \n"); break; case PCI_EXT_CAP_ID_VNDR: - printf("Vendor Specific Information \n"); + cap_evendor(d, where); break; case PCI_EXT_CAP_ID_ACS: cap_acs(d, where); @@ -284,6 +459,6 @@ show_ext_caps(struct device *d) printf("#%02x\n", id); break; } - where = header >> 20; + where = (header >> 20) & ~3; } while (where); }