X-Git-Url: http://mj.ucw.cz/gitweb/?a=blobdiff_plain;f=ls-caps.c;h=c145ed66bb7048574d6f728f8c7d5d8f7bfb49f6;hb=1d9d1a01b02b2ce90e5fc7eeff109b5ad95ce0cd;hp=4a75ce70eb84f9455bbcec4befa0f531d300056c;hpb=37f8039da834b3bc1dac7473ff75ba5dde6a9318;p=pciutils.git diff --git a/ls-caps.c b/ls-caps.c index 4a75ce7..c145ed6 100644 --- a/ls-caps.c +++ b/ls-caps.c @@ -659,22 +659,27 @@ static void cap_express_dev(struct device *d, int where, int type) u16 w; t = get_conf_long(d, where + PCI_EXP_DEVCAP); - printf("\t\tDevCap:\tMaxPayload %d bytes, PhantFunc %d, Latency L0s %s, L1 %s\n", + printf("\t\tDevCap:\tMaxPayload %d bytes, PhantFunc %d", 128 << (t & PCI_EXP_DEVCAP_PAYLOAD), - (1 << ((t & PCI_EXP_DEVCAP_PHANTOM) >> 3)) - 1, + (1 << ((t & PCI_EXP_DEVCAP_PHANTOM) >> 3)) - 1); + if ((type == PCI_EXP_TYPE_ENDPOINT) || (type == PCI_EXP_TYPE_LEG_END)) + printf(", Latency L0s %s, L1 %s", latency_l0s((t & PCI_EXP_DEVCAP_L0S) >> 6), latency_l1((t & PCI_EXP_DEVCAP_L1) >> 9)); + printf("\n"); printf("\t\t\tExtTag%c", FLAG(t, PCI_EXP_DEVCAP_EXT_TAG)); if ((type == PCI_EXP_TYPE_ENDPOINT) || (type == PCI_EXP_TYPE_LEG_END) || (type == PCI_EXP_TYPE_UPSTREAM) || (type == PCI_EXP_TYPE_PCI_BRIDGE)) printf(" AttnBtn%c AttnInd%c PwrInd%c", FLAG(t, PCI_EXP_DEVCAP_ATN_BUT), FLAG(t, PCI_EXP_DEVCAP_ATN_IND), FLAG(t, PCI_EXP_DEVCAP_PWR_IND)); - printf(" RBE%c FLReset%c", - FLAG(t, PCI_EXP_DEVCAP_RBE), + printf(" RBE%c", + FLAG(t, PCI_EXP_DEVCAP_RBE)); + if ((type == PCI_EXP_TYPE_ENDPOINT) || (type == PCI_EXP_TYPE_LEG_END)) + printf(" FLReset%c", FLAG(t, PCI_EXP_DEVCAP_FLRESET)); if (type == PCI_EXP_TYPE_UPSTREAM) - printf("SlotPowerLimit %.3fW", + printf(" SlotPowerLimit %.3fW", power_limit((t & PCI_EXP_DEVCAP_PWR_VAL) >> 18, (t & PCI_EXP_DEVCAP_PWR_SCL) >> 26)); printf("\n"); @@ -691,9 +696,10 @@ static void cap_express_dev(struct device *d, int where, int type) FLAG(w, PCI_EXP_DEVCTL_PHANTOM), FLAG(w, PCI_EXP_DEVCTL_AUX_PME), FLAG(w, PCI_EXP_DEVCTL_NOSNOOP)); - if (type == PCI_EXP_TYPE_PCI_BRIDGE || type == PCI_EXP_TYPE_PCIE_BRIDGE) + if (type == PCI_EXP_TYPE_PCI_BRIDGE) printf(" BrConfRtry%c", FLAG(w, PCI_EXP_DEVCTL_BCRE)); - if (type == PCI_EXP_TYPE_ENDPOINT && (t & PCI_EXP_DEVCAP_FLRESET)) + if (((type == PCI_EXP_TYPE_ENDPOINT) || (type == PCI_EXP_TYPE_LEG_END)) && + (t & PCI_EXP_DEVCAP_FLRESET)) printf(" FLReset%c", FLAG(w, PCI_EXP_DEVCTL_FLRESET)); printf("\n\t\t\tMaxPayload %d bytes, MaxReadReq %d bytes\n", 128 << ((w & PCI_EXP_DEVCTL_PAYLOAD) >> 5), @@ -728,6 +734,8 @@ static char *aspm_support(int code) { switch (code) { + case 0: + return "not supported"; case 1: return "L0s"; case 2: @@ -751,26 +759,26 @@ static void cap_express_link(struct device *d, int where, int type) u16 w; t = get_conf_long(d, where + PCI_EXP_LNKCAP); - printf("\t\tLnkCap:\tPort #%d, Speed %s, Width x%d, ASPM %s, Latency L0 %s, L1 %s\n", + printf("\t\tLnkCap:\tPort #%d, Speed %s, Width x%d, ASPM %s, Exit Latency L0s %s, L1 %s\n", t >> 24, link_speed(t & PCI_EXP_LNKCAP_SPEED), (t & PCI_EXP_LNKCAP_WIDTH) >> 4, aspm_support((t & PCI_EXP_LNKCAP_ASPM) >> 10), latency_l0s((t & PCI_EXP_LNKCAP_L0S) >> 12), latency_l1((t & PCI_EXP_LNKCAP_L1) >> 15)); - printf("\t\t\tClockPM%c Surprise%c LLActRep%c BwNot%c\n", + printf("\t\t\tClockPM%c Surprise%c LLActRep%c BwNot%c ASPMOptComp%c\n", FLAG(t, PCI_EXP_LNKCAP_CLOCKPM), FLAG(t, PCI_EXP_LNKCAP_SURPRISE), FLAG(t, PCI_EXP_LNKCAP_DLLA), - FLAG(t, PCI_EXP_LNKCAP_LBNC)); + FLAG(t, PCI_EXP_LNKCAP_LBNC), + FLAG(t, PCI_EXP_LNKCAP_AOC)); w = get_conf_word(d, where + PCI_EXP_LNKCTL); printf("\t\tLnkCtl:\tASPM %s;", aspm_enabled(w & PCI_EXP_LNKCTL_ASPM)); if ((type == PCI_EXP_TYPE_ROOT_PORT) || (type == PCI_EXP_TYPE_ENDPOINT) || - (type == PCI_EXP_TYPE_LEG_END)) + (type == PCI_EXP_TYPE_LEG_END) || (type == PCI_EXP_TYPE_PCI_BRIDGE)) printf(" RCB %d bytes", w & PCI_EXP_LNKCTL_RCB ? 128 : 64); - printf(" Disabled%c Retrain%c CommClk%c\n\t\t\tExtSynch%c ClockPM%c AutWidDis%c BWInt%c AutBWInt%c\n", + printf(" Disabled%c CommClk%c\n\t\t\tExtSynch%c ClockPM%c AutWidDis%c BWInt%c AutBWInt%c\n", FLAG(w, PCI_EXP_LNKCTL_DISABLE), - FLAG(w, PCI_EXP_LNKCTL_RETRAIN), FLAG(w, PCI_EXP_LNKCTL_CLOCK), FLAG(w, PCI_EXP_LNKCTL_XSYNCH), FLAG(w, PCI_EXP_LNKCTL_CLOCKPM), @@ -920,24 +928,60 @@ static const char *cap_express_dev2_timeout_value(int type) } } +static const char *cap_express_devcap2_obff(int obff) +{ + switch (obff) + { + case 1: + return "Via message"; + case 2: + return "Via WAKE#"; + case 3: + return "Via message/WAKE#"; + default: + return "Not Supported"; + } +} + +static const char *cap_express_devctl2_obff(int obff) +{ + switch (obff) + { + case 0: + return "Disabled"; + case 1: + return "Via message A"; + case 2: + return "Via message B"; + case 3: + return "Via WAKE#"; + default: + return "Unknown"; + } +} + static void cap_express_dev2(struct device *d, int where, int type) { u32 l; u16 w; l = get_conf_long(d, where + PCI_EXP_DEVCAP2); - printf("\t\tDevCap2: Completion Timeout: %s, TimeoutDis%c", + printf("\t\tDevCap2: Completion Timeout: %s, TimeoutDis%c, LTR%c, OBFF %s", cap_express_dev2_timeout_range(PCI_EXP_DEV2_TIMEOUT_RANGE(l)), - FLAG(l, PCI_EXP_DEV2_TIMEOUT_DIS)); + FLAG(l, PCI_EXP_DEV2_TIMEOUT_DIS), + FLAG(l, PCI_EXP_DEVCAP2_LTR), + cap_express_devcap2_obff(PCI_EXP_DEVCAP2_OBFF(l))); if (type == PCI_EXP_TYPE_ROOT_PORT || type == PCI_EXP_TYPE_DOWNSTREAM) printf(" ARIFwd%c\n", FLAG(l, PCI_EXP_DEV2_ARI)); else printf("\n"); w = get_conf_word(d, where + PCI_EXP_DEVCTL2); - printf("\t\tDevCtl2: Completion Timeout: %s, TimeoutDis%c", + printf("\t\tDevCtl2: Completion Timeout: %s, TimeoutDis%c, LTR%c, OBFF %s", cap_express_dev2_timeout_value(PCI_EXP_DEV2_TIMEOUT_VALUE(w)), - FLAG(w, PCI_EXP_DEV2_TIMEOUT_DIS)); + FLAG(w, PCI_EXP_DEV2_TIMEOUT_DIS), + FLAG(w, PCI_EXP_DEV2_LTR), + cap_express_devctl2_obff(PCI_EXP_DEV2_OBFF(w))); if (type == PCI_EXP_TYPE_ROOT_PORT || type == PCI_EXP_TYPE_DOWNSTREAM) printf(" ARIFwd%c\n", FLAG(w, PCI_EXP_DEV2_ARI)); else @@ -1036,6 +1080,7 @@ cap_express(struct device *d, int where, int cap) int type = (cap & PCI_EXP_FLAGS_TYPE) >> 4; int size; int slot = 0; + int link = 1; printf("Express "); if (verbose >= 2) @@ -1060,15 +1105,17 @@ cap_express(struct device *d, int where, int cap) printf("Downstream Port (Slot%c)", FLAG(cap, PCI_EXP_FLAGS_SLOT)); break; case PCI_EXP_TYPE_PCI_BRIDGE: - printf("PCI/PCI-X Bridge"); + printf("PCI-Express to PCI/PCI-X Bridge"); break; case PCI_EXP_TYPE_PCIE_BRIDGE: printf("PCI/PCI-X to PCI-Express Bridge"); break; case PCI_EXP_TYPE_ROOT_INT_EP: + link = 0; printf("Root Complex Integrated Endpoint"); break; case PCI_EXP_TYPE_ROOT_EC: + link = 0; printf("Root Complex Event Collector"); break; default: @@ -1087,7 +1134,8 @@ cap_express(struct device *d, int where, int cap) return; cap_express_dev(d, where, type); - cap_express_link(d, where, type); + if (link) + cap_express_link(d, where, type); if (slot) cap_express_slot(d, where); if (type == PCI_EXP_TYPE_ROOT_PORT) @@ -1103,7 +1151,8 @@ cap_express(struct device *d, int where, int cap) return; cap_express_dev2(d, where, type); - cap_express_link2(d, where, type); + if (link) + cap_express_link2(d, where, type); if (slot) cap_express_slot2(d, where); } @@ -1206,14 +1255,14 @@ cap_sata_hba(struct device *d, int where, int cap) } void -show_caps(struct device *d) +show_caps(struct device *d, int where) { int can_have_ext_caps = 0; if (get_conf_word(d, PCI_STATUS) & PCI_STATUS_CAP_LIST) { - int where = get_conf_byte(d, PCI_CAPABILITY_LIST) & ~3; byte been_there[256]; + where = get_conf_byte(d, where) & ~3; memset(been_there, 0, 256); while (where) { @@ -1266,7 +1315,7 @@ show_caps(struct device *d) cap_ht(d, where, cap); break; case PCI_CAP_ID_VNDR: - printf("Vendor Specific Information: Len=%02x \n", BITS(cap, 0, 8)); + show_vendor_caps(d, where, cap); break; case PCI_CAP_ID_DBG: cap_debug_port(cap);