X-Git-Url: http://mj.ucw.cz/gitweb/?a=blobdiff_plain;f=ls-caps.c;h=bc1443af8a8b457fe6c94798a57291573113e486;hb=7d23054d18402b1891343f090d3cd37d7e83c82f;hp=0b6c97b3ed750d04e823d630fb3f1ec3cc5198af;hpb=cac545f64e6f5863b430f5b94442b777aa7f1165;p=pciutils.git diff --git a/ls-caps.c b/ls-caps.c index 0b6c97b..bc1443a 100644 --- a/ls-caps.c +++ b/ls-caps.c @@ -3,7 +3,9 @@ * * Copyright (c) 1997--2018 Martin Mares * - * Can be freely distributed and used under the terms of the GNU GPL. + * Can be freely distributed and used under the terms of the GNU GPL v2+. + * + * SPDX-License-Identifier: GPL-2.0-or-later */ #include @@ -44,8 +46,8 @@ cap_pm(struct device *d, int where, int cap) b = get_conf_byte(d, where + PCI_PM_PPB_EXTENSIONS); if (b) printf("\t\tBridge: PM%c B3%c\n", - FLAG(t, PCI_PM_BPCC_ENABLE), - FLAG(~t, PCI_PM_PPB_B2_B3)); + FLAG(b, PCI_PM_BPCC_ENABLE), + FLAG(~b, PCI_PM_PPB_B2_B3)); } static void @@ -839,7 +841,7 @@ static void cap_express_link(struct device *d, int where, int type) if ((type == PCI_EXP_TYPE_ROOT_PORT) || (type == PCI_EXP_TYPE_ENDPOINT) || (type == PCI_EXP_TYPE_LEG_END) || (type == PCI_EXP_TYPE_PCI_BRIDGE)) printf(" RCB %d bytes,", w & PCI_EXP_LNKCTL_RCB ? 128 : 64); - printf(" Disabled%c CommClk%c\n\t\t\tExtSynch%c ClockPM%c AutWidDis%c BWInt%c AutBWInt%c\n", + printf(" LnkDisable%c CommClk%c\n\t\t\tExtSynch%c ClockPM%c AutWidDis%c BWInt%c AutBWInt%c\n", FLAG(w, PCI_EXP_LNKCTL_DISABLE), FLAG(w, PCI_EXP_LNKCTL_CLOCK), FLAG(w, PCI_EXP_LNKCTL_XSYNCH), @@ -1083,7 +1085,7 @@ device_has_memory_space_bar(struct device *d) int i, found = 0; for (i=0; i<6; i++) - if (p->base_addr[i] && p->size[i]) + if (p->base_addr[i] || p->size[i]) { if (!(p->base_addr[i] & PCI_BASE_ADDRESS_SPACE_IO)) { @@ -1151,12 +1153,9 @@ static void cap_express_dev2(struct device *d, int where, int type) } w = get_conf_word(d, where + PCI_EXP_DEVCTL2); - printf("\t\tDevCtl2: Completion Timeout: %s, TimeoutDis%c LTR%c 10BitTagReq%c OBFF %s,", + printf("\t\tDevCtl2: Completion Timeout: %s, TimeoutDis%c", cap_express_dev2_timeout_value(PCI_EXP_DEVCTL2_TIMEOUT_VALUE(w)), - FLAG(w, PCI_EXP_DEVCTL2_TIMEOUT_DIS), - FLAG(w, PCI_EXP_DEVCTL2_LTR), - FLAG(w, PCI_EXP_DEVCTL2_10BIT_TAG_REQ), - cap_express_devctl2_obff(PCI_EXP_DEVCTL2_OBFF(w))); + FLAG(w, PCI_EXP_DEVCTL2_TIMEOUT_DIS)); if (type == PCI_EXP_TYPE_ROOT_PORT || type == PCI_EXP_TYPE_DOWNSTREAM) printf(" ARIFwd%c\n", FLAG(w, PCI_EXP_DEVCTL2_ARI)); else @@ -1174,6 +1173,15 @@ static void cap_express_dev2(struct device *d, int where, int type) printf(" EgressBlck%c", FLAG(w, PCI_EXP_DEVCTL2_ATOMICOP_EGRESS_BLOCK)); printf("\n"); } + printf("\t\t\t IDOReq%c IDOCompl%c LTR%c EmergencyPowerReductionReq%c\n", + FLAG(w, PCI_EXP_DEVCTL2_IDO_REQ_EN), + FLAG(w, PCI_EXP_DEVCTL2_IDO_CMP_EN), + FLAG(w, PCI_EXP_DEVCTL2_LTR), + FLAG(w, PCI_EXP_DEVCTL2_EPR_REQ)); + printf("\t\t\t 10BitTagReq%c OBFF %s, EETLPPrefixBlk%c\n", + FLAG(w, PCI_EXP_DEVCTL2_10BIT_TAG_REQ), + cap_express_devctl2_obff(PCI_EXP_DEVCTL2_OBFF(w)), + FLAG(w, PCI_EXP_DEVCTL2_EE_TLP_BLK)); } static const char *cap_express_link2_speed_cap(int vector) @@ -1183,8 +1191,10 @@ static const char *cap_express_link2_speed_cap(int vector) * permitted to skip support for any data rates between 2.5GT/s and the * highest supported rate. */ - if (vector & 0x60) + if (vector & 0x40) return "RsvdP"; + if (vector & 0x20) + return "2.5-64GT/s"; if (vector & 0x10) return "2.5-32GT/s"; if (vector & 0x08) @@ -1428,7 +1438,7 @@ cap_express(struct device *d, int where, int cap) default: printf("Unknown type %d", type); } - printf(", MSI %02x\n", (cap & PCI_EXP_FLAGS_IRQ) >> 9); + printf(", IntMsgNum %d\n", (cap & PCI_EXP_FLAGS_IRQ) >> 9); if (verbose < 2) return type; @@ -1802,6 +1812,7 @@ show_caps(struct device *d, int where) break; case PCI_CAP_ID_EXP: type = cap_express(d, where, cap); + struct pci_cap* test = pci_find_cap(d->dev, PCI_CAP_ID_EXP, PCI_CAP_NORMAL); can_have_ext_caps = 1; break; case PCI_CAP_ID_MSIX: