X-Git-Url: http://mj.ucw.cz/gitweb/?a=blobdiff_plain;f=lib%2Fi386-ports.c;h=1e2c4028e08dca240bee387c9b0d0e443cf76f5f;hb=6182921907ef3cc31be3394eb468b24bcd3955a8;hp=2e64fe4826238d358cc7aaca682a65b3797832d7;hpb=83d1cbf1e8bd451008271e2761f6f5826678241b;p=pciutils.git

diff --git a/lib/i386-ports.c b/lib/i386-ports.c
index 2e64fe4..1e2c402 100644
--- a/lib/i386-ports.c
+++ b/lib/i386-ports.c
@@ -3,7 +3,9 @@
  *
  *	Copyright (c) 1997--2006 Martin Mares <mj@ucw.cz>
  *
- *	Can be freely distributed and used under the terms of the GNU GPL.
+ *	Can be freely distributed and used under the terms of the GNU GPL v2+.
+ *
+ *	SPDX-License-Identifier: GPL-2.0-or-later
  */
 
 #define _GNU_SOURCE
@@ -136,6 +138,9 @@ conf1_read(struct pci_dev *d, int pos, byte *buf, int len)
   if (d->domain || pos >= 256)
     return 0;
 
+  if (len != 1 && len != 2 && len != 4)
+    return pci_generic_block_read(d, pos, buf, len);
+
   intel_io_lock();
   outl(0x80000000 | ((d->bus & 0xff) << 16) | (PCI_DEVFN(d->dev, d->func) << 8) | (pos&~3), 0xcf8);
 
@@ -150,8 +155,6 @@ conf1_read(struct pci_dev *d, int pos, byte *buf, int len)
     case 4:
       ((u32 *) buf)[0] = cpu_to_le32(inl(addr));
       break;
-    default:
-      res = pci_generic_block_read(d, pos, buf, len);
     }
 
   intel_io_unlock();
@@ -167,6 +170,9 @@ conf1_write(struct pci_dev *d, int pos, byte *buf, int len)
   if (d->domain || pos >= 256)
     return 0;
 
+  if (len != 1 && len != 2 && len != 4)
+    return pci_generic_block_write(d, pos, buf, len);
+
   intel_io_lock();
   outl(0x80000000 | ((d->bus & 0xff) << 16) | (PCI_DEVFN(d->dev, d->func) << 8) | (pos&~3), 0xcf8);
 
@@ -181,8 +187,6 @@ conf1_write(struct pci_dev *d, int pos, byte *buf, int len)
     case 4:
       outl(le32_to_cpu(((u32 *) buf)[0]), addr);
       break;
-    default:
-      res = pci_generic_block_write(d, pos, buf, len);
     }
   intel_io_unlock();
   return res;
@@ -228,6 +232,9 @@ conf2_read(struct pci_dev *d, int pos, byte *buf, int len)
     /* conf2 supports only 16 devices per bus */
     return 0;
 
+  if (len != 1 && len != 2 && len != 4)
+    return pci_generic_block_read(d, pos, buf, len);
+
   intel_io_lock();
   outb((d->func << 1) | 0xf0, 0xcf8);
   outb(d->bus, 0xcfa);
@@ -242,8 +249,6 @@ conf2_read(struct pci_dev *d, int pos, byte *buf, int len)
     case 4:
       ((u32 *) buf)[0] = cpu_to_le32(inl(addr));
       break;
-    default:
-      res = pci_generic_block_read(d, pos, buf, len);
     }
   outb(0, 0xcf8);
   intel_io_unlock();
@@ -263,6 +268,9 @@ conf2_write(struct pci_dev *d, int pos, byte *buf, int len)
     /* conf2 supports only 16 devices per bus */
     return 0;
 
+  if (len != 1 && len != 2 && len != 4)
+    return pci_generic_block_write(d, pos, buf, len);
+
   intel_io_lock();
   outb((d->func << 1) | 0xf0, 0xcf8);
   outb(d->bus, 0xcfa);
@@ -277,8 +285,6 @@ conf2_write(struct pci_dev *d, int pos, byte *buf, int len)
     case 4:
       outl(le32_to_cpu(* (u32 *) buf), addr);
       break;
-    default:
-      res = pci_generic_block_write(d, pos, buf, len);
     }
 
   outb(0, 0xcf8);