X-Git-Url: http://mj.ucw.cz/gitweb/?a=blobdiff_plain;f=ChangeLog;h=0c14d9897529585612e03ff6ee4602b3609071af;hb=668b22f9427bc81743e4980a962840c8e2dccd0e;hp=d1c4802a76b9441d3df500594ac2062a1845433d;hpb=21c4801a4f26764d1df323afd1f61b6f7b65013d;p=pciutils.git diff --git a/ChangeLog b/ChangeLog index d1c4802..0c14d98 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,4 +1,101 @@ -2022-04-16 Martin Mares +2024-02-18 Martin Mares + + * Will be released as 3.11.0. + + * update-pciids now supports XZ compression. If libpci is configured + with support for compression, all downloaded files are recompressed + as gzip. Otherwise they are stored as plain text. + + * update-pciids now sends itself as the User-Agent. + + * Added a pcilmr utility for PCIe lane margining. Thanks to Nikita + Proshkin for contributing it. + + * Re-factored access to i386 ports on all relevant platforms. + + * Added i386 port access on OpenBSD. + + * Linux systems without pread/pwrite are no longer supported + as they are hopefully long gone. This helps avoid the tricky check + for presence of pread which was found to fail on musl libc. + + * Improved decoding of PCIe control and status registers. + + * Decoding of CXL capabilities now supports up to CXL 3.0. + + * lspci now displays interrupt message numbers consistently across + different capabilities. + + * Cache of IDs resolved via DNS, which was located in ~/.pci-ids + by default, is now stored according to the XDG base directory + specification in $XDG_CACHE_HOME/pci-ids. + + * All source files now have SPDX license identifiers. + + * Internal: The "aux" fields of structs pci_access and pci_dev + reserved for use by back-ends were renamed to backend_data to better + reflect their meaning. + + * As usually, various minor bug fixes and updated pci.ids. + +2023-05-01 Martin Mares + + * Released as 3.10.0. + + * Fixed bug in definition of versioned symbol aliases + in shared libpci, which made compiling with link-time + optimization fail. + + * Filters now accept "0x..." syntax for backward compatibility. + + * Windows: The cfgmgr32 back-end which provides the list of devices + can be combined with another back-end which provides access + to configuration space. + + * ECAM (Enhanced Configuration Access Mechanism), which is defined + by the PCIe standard, is now supported. It requires root privileges, + access to physical memory, and also manual configuration on some + systems. + + * lspci: Tree view now works on multi-domain systems. It now respects + filters properly. + + * Last but not least, pci.ids were updated to the current snapshot + of the database. This includes overall cleanup of entries with + non-ASCII characters in their names -- such characters are allowed, + but only if they convey interesting information (e.g., umlauts + in German company names, but not the "registered trade mark" sign). + +2022-11-20 Martin Mares + + * Released as 3.9.0. + + * We decode Compute Express Link (CXL) capabilities. + + * The tree mode of lspci is now compatible with filtering options. + + * When setpci is used with a named register, it checks whether + the register is present in the particular header type. + + * Linux: The intel-conf[12] back-ends prefer to use ioperm() instead + of iopl() to gain access to I/O ports. + + * Windows: We have two new back-ends thanks to Pali Rohár. + One uses the NT SysDbg interface, the other uses kldbgdrv.sys + (which is a part of the Microsoft WinDbg tool). + + * Windows: We support building libpci as a DLL. Also, Windows + binaries now include meta-data with version. + + * Hurd: The Hurd back-end works again. + + * mmio-conf1(-ext): Added a new back-end implementing the intel-conf1 + interface over MMIO. This is useful on some ARM machines, but it + requires manual configuration of the MMIO addresses. + + * As usually, updated pci.ids to the current snapshot of the database. + +2022-04-18 Martin Mares * Released as 3.8.0.