if (!config_fetch(d, where + PCI_HT_PRI_LCTR0, PCI_HT_PRI_SIZEOF - PCI_HT_PRI_LCTR0))
return;
rid = get_conf_byte(d, where + PCI_HT_PRI_RID);
- if (rid < 0x23 && rid > 0x11)
+ if (rid < 0x22 && rid > 0x11)
printf("\t\t!!! Possibly incomplete decoding\n");
- if (rid >= 0x23)
+ if (rid >= 0x22)
fmt = "\t\tCommand: BaseUnitID=%u UnitCnt=%u MastHost%c DefDir%c DUL%c\n";
else
fmt = "\t\tCommand: BaseUnitID=%u UnitCnt=%u MastHost%c DefDir%c\n";
FLAG(cmd, PCI_HT_PRI_CMD_DD),
FLAG(cmd, PCI_HT_PRI_CMD_DUL));
lctr0 = get_conf_word(d, where + PCI_HT_PRI_LCTR0);
- if (rid >= 0x23)
+ if (rid >= 0x22)
fmt = "\t\tLink Control 0: CFlE%c CST%c CFE%c <LkFail%c Init%c EOC%c TXO%c <CRCErr=%x IsocEn%c LSEn%c ExtCTL%c 64b%c\n";
else
fmt = "\t\tLink Control 0: CFlE%c CST%c CFE%c <LkFail%c Init%c EOC%c TXO%c <CRCErr=%x\n";
FLAG(lctr0, PCI_HT_LCTR_EXTCTL),
FLAG(lctr0, PCI_HT_LCTR_64B));
lcnf0 = get_conf_word(d, where + PCI_HT_PRI_LCNF0);
- if (rid >= 0x23)
+ if (rid >= 0x22)
fmt = "\t\tLink Config 0: MLWI=%1$s DwFcIn%5$c MLWO=%2$s DwFcOut%6$c LWI=%3$s DwFcInEn%7$c LWO=%4$s DwFcOutEn%8$c\n";
else
fmt = "\t\tLink Config 0: MLWI=%s MLWO=%s LWI=%s LWO=%s\n";
FLAG(lcnf0, PCI_HT_LCNF_DFIE),
FLAG(lcnf0, PCI_HT_LCNF_DFOE));
lctr1 = get_conf_word(d, where + PCI_HT_PRI_LCTR1);
- if (rid >= 0x23)
+ if (rid >= 0x22)
fmt = "\t\tLink Control 1: CFlE%c CST%c CFE%c <LkFail%c Init%c EOC%c TXO%c <CRCErr=%x IsocEn%c LSEn%c ExtCTL%c 64b%c\n";
else
fmt = "\t\tLink Control 1: CFlE%c CST%c CFE%c <LkFail%c Init%c EOC%c TXO%c <CRCErr=%x\n";
FLAG(lctr1, PCI_HT_LCTR_EXTCTL),
FLAG(lctr1, PCI_HT_LCTR_64B));
lcnf1 = get_conf_word(d, where + PCI_HT_PRI_LCNF1);
- if (rid >= 0x23)
+ if (rid >= 0x22)
fmt = "\t\tLink Config 1: MLWI=%1$s DwFcIn%5$c MLWO=%2$s DwFcOut%6$c LWI=%3$s DwFcInEn%7$c LWO=%4$s DwFcOutEn%8$c\n";
else
fmt = "\t\tLink Config 1: MLWI=%s MLWO=%s LWI=%s LWO=%s\n";
FLAG(lcnf1, PCI_HT_LCNF_DFOE));
printf("\t\tRevision ID: %u.%02u\n",
(rid & PCI_HT_RID_MAJ) >> 5, (rid & PCI_HT_RID_MIN));
- if (rid < 0x23)
+ if (rid < 0x22)
return;
lfrer0 = get_conf_byte(d, where + PCI_HT_PRI_LFRER0);
printf("\t\tLink Frequency 0: %s\n", ht_link_freq(lfrer0 & PCI_HT_LFRER_FREQ));
if (!config_fetch(d, where + PCI_HT_SEC_LCTR, PCI_HT_SEC_SIZEOF - PCI_HT_SEC_LCTR))
return;
rid = get_conf_byte(d, where + PCI_HT_SEC_RID);
- if (rid < 0x23 && rid > 0x11)
+ if (rid < 0x22 && rid > 0x11)
printf("\t\t!!! Possibly incomplete decoding\n");
- if (rid >= 0x23)
+ if (rid >= 0x22)
fmt = "\t\tCommand: WarmRst%c DblEnd%c DevNum=%u ChainSide%c HostHide%c Slave%c <EOCErr%c DUL%c\n";
else
fmt = "\t\tCommand: WarmRst%c DblEnd%c\n";
FLAG(cmd, PCI_HT_SEC_CMD_HIECE),
FLAG(cmd, PCI_HT_SEC_CMD_DUL));
lctr = get_conf_word(d, where + PCI_HT_SEC_LCTR);
- if (rid >= 0x23)
+ if (rid >= 0x22)
fmt = "\t\tLink Control: CFlE%c CST%c CFE%c <LkFail%c Init%c EOC%c TXO%c <CRCErr=%x IsocEn%c LSEn%c ExtCTL%c 64b%c\n";
else
fmt = "\t\tLink Control: CFlE%c CST%c CFE%c <LkFail%c Init%c EOC%c TXO%c <CRCErr=%x\n";
FLAG(lctr, PCI_HT_LCTR_EXTCTL),
FLAG(lctr, PCI_HT_LCTR_64B));
lcnf = get_conf_word(d, where + PCI_HT_SEC_LCNF);
- if (rid >= 0x23)
+ if (rid >= 0x22)
fmt = "\t\tLink Config: MLWI=%1$s DwFcIn%5$c MLWO=%2$s DwFcOut%6$c LWI=%3$s DwFcInEn%7$c LWO=%4$s DwFcOutEn%8$c\n";
else
fmt = "\t\tLink Config: MLWI=%s MLWO=%s LWI=%s LWO=%s\n";
FLAG(lcnf, PCI_HT_LCNF_DFOE));
printf("\t\tRevision ID: %u.%02u\n",
(rid & PCI_HT_RID_MAJ) >> 5, (rid & PCI_HT_RID_MIN));
- if (rid < 0x23)
+ if (rid < 0x22)
return;
lfrer = get_conf_byte(d, where + PCI_HT_SEC_LFRER);
printf("\t\tLink Frequency: %s\n", ht_link_freq(lfrer & PCI_HT_LFRER_FREQ));
u32 t;
u16 w;
- printf("Message Signalled Interrupts: Mask%c 64bit%c Queue=%d/%d Enable%c\n",
+ printf("MSI: Mask%c 64bit%c Count=%d/%d Enable%c\n",
FLAG(cap, PCI_MSI_FLAGS_MASK_BIT),
FLAG(cap, PCI_MSI_FLAGS_64BIT),
- (cap & PCI_MSI_FLAGS_QSIZE) >> 4,
- (cap & PCI_MSI_FLAGS_QMASK) >> 1,
+ 1 << ((cap & PCI_MSI_FLAGS_QSIZE) >> 4),
+ 1 << ((cap & PCI_MSI_FLAGS_QMASK) >> 1),
FLAG(cap, PCI_MSI_FLAGS_ENABLE));
if (verbose < 2)
return;
printf("Debug port: BAR=%d offset=%04x\n", bar, pos);
}
+static void
+cap_aer(struct device *d, int where)
+{
+ u32 l;
+
+ printf("Advanced Error Reporting\n");
+ if (!config_fetch(d, where + PCI_ERR_UNCOR_STATUS, 24))
+ return;
+
+ l = get_conf_long(d, where + PCI_ERR_UNCOR_STATUS);
+ printf("\t\tUESta:\tDLP%c SDES%c TLP%c FCP%c CmpltTO%c CmpltAbrt%c UnxCmplt%c RxOF%c "
+ "MalfTLP%c ECRC%c UnsupReq%c ACSViol%c\n",
+ FLAG(l, PCI_ERR_UNC_DLP), FLAG(l, PCI_ERR_UNC_SDES), FLAG(l, PCI_ERR_UNC_POISON_TLP),
+ FLAG(l, PCI_ERR_UNC_FCP), FLAG(l, PCI_ERR_UNC_COMP_TIME), FLAG(l, PCI_ERR_UNC_COMP_ABORT),
+ FLAG(l, PCI_ERR_UNC_UNX_COMP), FLAG(l, PCI_ERR_UNC_RX_OVER), FLAG(l, PCI_ERR_UNC_MALF_TLP),
+ FLAG(l, PCI_ERR_UNC_ECRC), FLAG(l, PCI_ERR_UNC_UNSUP), FLAG(l, PCI_ERR_UNC_ACS_VIOL));
+ l = get_conf_long(d, where + PCI_ERR_UNCOR_MASK);
+ printf("\t\tUEMsk:\tDLP%c SDES%c TLP%c FCP%c CmpltTO%c CmpltAbrt%c UnxCmplt%c RxOF%c "
+ "MalfTLP%c ECRC%c UnsupReq%c ACSViol%c\n",
+ FLAG(l, PCI_ERR_UNC_DLP), FLAG(l, PCI_ERR_UNC_SDES), FLAG(l, PCI_ERR_UNC_POISON_TLP),
+ FLAG(l, PCI_ERR_UNC_FCP), FLAG(l, PCI_ERR_UNC_COMP_TIME), FLAG(l, PCI_ERR_UNC_COMP_ABORT),
+ FLAG(l, PCI_ERR_UNC_UNX_COMP), FLAG(l, PCI_ERR_UNC_RX_OVER), FLAG(l, PCI_ERR_UNC_MALF_TLP),
+ FLAG(l, PCI_ERR_UNC_ECRC), FLAG(l, PCI_ERR_UNC_UNSUP), FLAG(l, PCI_ERR_UNC_ACS_VIOL));
+ l = get_conf_long(d, where + PCI_ERR_UNCOR_SEVER);
+ printf("\t\tUESvrt:\tDLP%c SDES%c TLP%c FCP%c CmpltTO%c CmpltAbrt%c UnxCmplt%c RxOF%c "
+ "MalfTLP%c ECRC%c UnsupReq%c ACSViol%c\n",
+ FLAG(l, PCI_ERR_UNC_DLP), FLAG(l, PCI_ERR_UNC_SDES), FLAG(l, PCI_ERR_UNC_POISON_TLP),
+ FLAG(l, PCI_ERR_UNC_FCP), FLAG(l, PCI_ERR_UNC_COMP_TIME), FLAG(l, PCI_ERR_UNC_COMP_ABORT),
+ FLAG(l, PCI_ERR_UNC_UNX_COMP), FLAG(l, PCI_ERR_UNC_RX_OVER), FLAG(l, PCI_ERR_UNC_MALF_TLP),
+ FLAG(l, PCI_ERR_UNC_ECRC), FLAG(l, PCI_ERR_UNC_UNSUP), FLAG(l, PCI_ERR_UNC_ACS_VIOL));
+ l = get_conf_long(d, where + PCI_ERR_COR_STATUS);
+ printf("\t\tCESta:\tRxErr%c BadTLP%c BadDLLP%c Rollover%c Timeout%c NonFatalErr%c\n",
+ FLAG(l, PCI_ERR_COR_RCVR), FLAG(l, PCI_ERR_COR_BAD_TLP), FLAG(l, PCI_ERR_COR_BAD_DLLP),
+ FLAG(l, PCI_ERR_COR_REP_ROLL), FLAG(l, PCI_ERR_COR_REP_TIMER), FLAG(l, PCI_ERR_COR_REP_ANFE));
+ l = get_conf_long(d, where + PCI_ERR_COR_MASK);
+ printf("\t\tCEMsk:\tRxErr%c BadTLP%c BadDLLP%c Rollover%c Timeout%c NonFatalErr%c\n",
+ FLAG(l, PCI_ERR_COR_RCVR), FLAG(l, PCI_ERR_COR_BAD_TLP), FLAG(l, PCI_ERR_COR_BAD_DLLP),
+ FLAG(l, PCI_ERR_COR_REP_ROLL), FLAG(l, PCI_ERR_COR_REP_TIMER), FLAG(l, PCI_ERR_COR_REP_ANFE));
+ l = get_conf_long(d, where + PCI_ERR_CAP);
+ printf("\t\tAERCap:\tFirst Error Pointer: %02x, GenCap%c CGenEn%c ChkCap%c ChkEn%c\n",
+ PCI_ERR_CAP_FEP(l), FLAG(l, PCI_ERR_CAP_ECRC_GENC), FLAG(l, PCI_ERR_CAP_ECRC_GENE),
+ FLAG(l, PCI_ERR_CAP_ECRC_CHKC), FLAG(l, PCI_ERR_CAP_ECRC_CHKE));
+
+}
+
+static void
+cap_acs(struct device *d, int where)
+{
+ u16 w;
+
+ printf("Access Control Services\n");
+ if (!config_fetch(d, where + PCI_ACS_CAP, 4))
+ return;
+
+ w = get_conf_word(d, where + PCI_ACS_CAP);
+ printf("\t\tACSCap:\tSrcValid%c TransBlk%c ReqRedir%c CmpltRedir%c UpstreamFwd%c EgressCtrl%c "
+ "DirectTrans%c\n",
+ FLAG(w, PCI_ACS_CAP_VALID), FLAG(w, PCI_ACS_CAP_BLOCK), FLAG(w, PCI_ACS_CAP_REQ_RED),
+ FLAG(w, PCI_ACS_CAP_CMPLT_RED), FLAG(w, PCI_ACS_CAP_FORWARD), FLAG(w, PCI_ACS_CAP_EGRESS),
+ FLAG(w, PCI_ACS_CAP_TRANS));
+ w = get_conf_word(d, where + PCI_ACS_CTRL);
+ printf("\t\tACSCtl:\tSrcValid%c TransBlk%c ReqRedir%c CmpltRedir%c UpstreamFwd%c EgressCtrl%c "
+ "DirectTrans%c\n",
+ FLAG(w, PCI_ACS_CTRL_VALID), FLAG(w, PCI_ACS_CTRL_BLOCK), FLAG(w, PCI_ACS_CTRL_REQ_RED),
+ FLAG(w, PCI_ACS_CTRL_CMPLT_RED), FLAG(w, PCI_ACS_CTRL_FORWARD), FLAG(w, PCI_ACS_CTRL_EGRESS),
+ FLAG(w, PCI_ACS_CTRL_TRANS));
+}
+
+static void
+cap_ari(struct device *d, int where)
+{
+ u16 w;
+
+ printf("Alternative Routing-ID Interpretation (ARI)\n");
+ if (!config_fetch(d, where + PCI_ARI_CAP, 4))
+ return;
+
+ w = get_conf_word(d, where + PCI_ARI_CAP);
+ printf("\t\tARICap:\tMFVC%c ACS%c, Next Function: %d\n",
+ FLAG(w, PCI_ARI_CAP_MFVC), FLAG(w, PCI_ARI_CAP_ACS),
+ PCI_ARI_CAP_NFN(w));
+ w = get_conf_word(d, where + PCI_ARI_CTRL);
+ printf("\t\tARICtl:\tMFVC%c ACS%c, Function Group: %d\n",
+ FLAG(w, PCI_ARI_CTRL_MFVC), FLAG(w, PCI_ARI_CTRL_ACS),
+ PCI_ARI_CTRL_FG(w));
+}
+
+static void
+cap_sriov(struct device *d, int where)
+{
+ u16 b;
+ u16 w;
+ u32 l;
+
+ printf("Single Root I/O Virtualization (SR-IOV)\n");
+ if (!config_fetch(d, where + PCI_IOV_CAP, 0x3c))
+ return;
+
+ l = get_conf_long(d, where + PCI_IOV_CAP);
+ printf("\t\tIOVCap:\tMigration%c, Interrupt Message Number: %03x\n",
+ FLAG(l, PCI_IOV_CAP_VFM), PCI_IOV_CAP_IMN(l));
+ w = get_conf_word(d, where + PCI_IOV_CTRL);
+ printf("\t\tIOVCtl:\tEnable%c Migration%c Interrupt%c MSE%c ARIHierarchy%c\n",
+ FLAG(w, PCI_IOV_CTRL_VFE), FLAG(w, PCI_IOV_CTRL_VFME),
+ FLAG(w, PCI_IOV_CTRL_VFMIE), FLAG(w, PCI_IOV_CTRL_MSE),
+ FLAG(w, PCI_IOV_CTRL_ARI));
+ w = get_conf_word(d, where + PCI_IOV_STATUS);
+ printf("\t\tIOVSta:\tMigration%c\n", FLAG(w, PCI_IOV_STATUS_MS));
+ w = get_conf_word(d, where + PCI_IOV_INITIALVF);
+ printf("\t\tInitial VFs: %d, ", w);
+ w = get_conf_word(d, where + PCI_IOV_TOTALVF);
+ printf("Total VFs: %d, ", w);
+ w = get_conf_word(d, where + PCI_IOV_NUMVF);
+ printf("Number of VFs: %d, ", w);
+ b = get_conf_byte(d, where + PCI_IOV_FDL);
+ printf("Function Dependency Link: %02x\n", b);
+ w = get_conf_word(d, where + PCI_IOV_OFFSET);
+ printf("\t\tVF offset: %d, ", w);
+ w = get_conf_word(d, where + PCI_IOV_STRIDE);
+ printf("stride: %d, ", w);
+ w = get_conf_word(d, where + PCI_IOV_DID);
+ printf("Device ID: %04x\n", w);
+ l = get_conf_long(d, where + PCI_IOV_SUPPS);
+ printf("\t\tSupported Page Size: %08x, ", l);
+ l = get_conf_long(d, where + PCI_IOV_SYSPS);
+ printf("System Page Size: %08x\n", l);
+ printf("\t\tVF Migration: offset: %08x, BIR: %x\n", PCI_IOV_MSA_OFFSET(l),
+ PCI_IOV_MSA_BIR(l));
+}
+
static void
show_ext_caps(struct device *d)
{
switch (id)
{
case PCI_EXT_CAP_ID_AER:
- printf("Advanced Error Reporting <?>\n");
+ cap_aer(d, where);
break;
case PCI_EXT_CAP_ID_VC:
printf("Virtual Channel <?>\n");
printf("Vendor Specific Information <?>\n");
break;
case PCI_EXT_CAP_ID_ACS:
- printf("Access Controls <?>\n");
+ cap_acs(d, where);
+ break;
+ case PCI_EXT_CAP_ID_ARI:
+ cap_ari(d, where);
+ break;
+ case PCI_EXT_CAP_ID_SRIOV:
+ cap_sriov(d, where);
break;
default:
printf("#%02x\n", id);
projects / pciutils.git / blobdiff