Released as 3.1.5.

[pciutils.git] / ls-ecaps.c

diff --git a/ls-ecaps.c b/ls-ecaps.c
index 38da824f5696ca589a9a8267983d4d4c95914b67..7888214d5c9db42a65fc95f5c0c04f193e9cf733 100644 (file)
--- a/ls-ecaps.c
+++ b/ls-ecaps.c
@@ -145,6 +145,7 @@ cap_sriov(struct device *d, int where)
   u16 b;
   u16 w;
   u32 l;
+  int i;
 
   printf("Single Root I/O Virtualization (SR-IOV)\n");
   if (verbose < 2)
@@ -181,6 +182,32 @@ cap_sriov(struct device *d, int where)
   printf("\t\tSupported Page Size: %08x, ", l);
   l = get_conf_long(d, where + PCI_IOV_SYSPS);
   printf("System Page Size: %08x\n", l);
+
+  for (i=0; i < PCI_IOV_NUM_BAR; i++)
+    {
+      u32 addr;
+      int type;
+      u32 h;
+      l = get_conf_long(d, where + PCI_IOV_BAR_BASE + 4*i);
+      if (l == 0xffffffff)
+       l = 0;
+      if (!l)
+       continue;
+      printf("\t\tRegion %d: Memory at ", i);
+      addr = l & PCI_ADDR_MEM_MASK;
+      type = l & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
+      if (type == PCI_BASE_ADDRESS_MEM_TYPE_64)
+       {
+         i++;
+         h = get_conf_long(d, where + PCI_IOV_BAR_BASE + (i*4));
+         printf("%08x", h);
+       }
+      printf("%08x (%s-bit, %sprefetchable)\n",
+       addr,
+       (type == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32" : "64",
+       (l & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-");
+    }
+
   l = get_conf_long(d, where + PCI_IOV_MSAO);
   printf("\t\tVF Migration: offset: %08x, BIR: %x\n", PCI_IOV_MSA_OFFSET(l),
        PCI_IOV_MSA_BIR(l));
@@ -257,6 +284,6 @@ show_ext_caps(struct device *d)
            printf("#%02x\n", id);
            break;
        }
-      where = header >> 20;
+      where = (header >> 20) & ~3;
     } while (where);
 }