Released as 3.1.5.

[pciutils.git] / ls-ecaps.c

diff --git a/ls-ecaps.c b/ls-ecaps.c
index 2d8153b8398092c696a1c317e551cdc4dd4eb3bb..7888214d5c9db42a65fc95f5c0c04f193e9cf733 100644 (file)
--- a/ls-ecaps.c
+++ b/ls-ecaps.c
@@ -20,8 +20,8 @@ cap_dsn(struct device *d, int where)
   t1 = get_conf_long(d, where + 4);
   t2 = get_conf_long(d, where + 8);
   printf("Device Serial Number %02x-%02x-%02x-%02x-%02x-%02x-%02x-%02x\n",
-       t1 & 0xff, (t1 >> 8) & 0xff, (t1 >> 16) & 0xff, t1 >> 24,
-       t2 & 0xff, (t2 >> 8) & 0xff, (t2 >> 16) & 0xff, t2 >> 24);
+       t2 >> 24, (t2 >> 16) & 0xff, (t2 >> 8) & 0xff, t2 & 0xff,
+       t1 >> 24, (t1 >> 16) & 0xff, (t1 >> 8) & 0xff, t1 & 0xff);
 }
 
 static void
@@ -30,6 +30,9 @@ cap_aer(struct device *d, int where)
   u32 l;
 
   printf("Advanced Error Reporting\n");
+  if (verbose < 2)
+    return;
+
   if (!config_fetch(d, where + PCI_ERR_UNCOR_STATUS, 24))
     return;
 
@@ -75,6 +78,9 @@ cap_acs(struct device *d, int where)
   u16 w;
 
   printf("Access Control Services\n");
+  if (verbose < 2)
+    return;
+
   if (!config_fetch(d, where + PCI_ACS_CAP, 4))
     return;
 
@@ -98,6 +104,9 @@ cap_ari(struct device *d, int where)
   u16 w;
 
   printf("Alternative Routing-ID Interpretation (ARI)\n");
+  if (verbose < 2)
+    return;
+
   if (!config_fetch(d, where + PCI_ARI_CAP, 4))
     return;
 
@@ -117,6 +126,9 @@ cap_ats(struct device *d, int where)
   u16 w;
 
   printf("Address Translation Service (ATS)\n");
+  if (verbose < 2)
+    return;
+
   if (!config_fetch(d, where + PCI_ATS_CAP, 4))
     return;
 
@@ -133,8 +145,12 @@ cap_sriov(struct device *d, int where)
   u16 b;
   u16 w;
   u32 l;
+  int i;
 
   printf("Single Root I/O Virtualization (SR-IOV)\n");
+  if (verbose < 2)
+    return;
+
   if (!config_fetch(d, where + PCI_IOV_CAP, 0x3c))
     return;
 
@@ -166,6 +182,32 @@ cap_sriov(struct device *d, int where)
   printf("\t\tSupported Page Size: %08x, ", l);
   l = get_conf_long(d, where + PCI_IOV_SYSPS);
   printf("System Page Size: %08x\n", l);
+
+  for (i=0; i < PCI_IOV_NUM_BAR; i++)
+    {
+      u32 addr;
+      int type;
+      u32 h;
+      l = get_conf_long(d, where + PCI_IOV_BAR_BASE + 4*i);
+      if (l == 0xffffffff)
+       l = 0;
+      if (!l)
+       continue;
+      printf("\t\tRegion %d: Memory at ", i);
+      addr = l & PCI_ADDR_MEM_MASK;
+      type = l & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
+      if (type == PCI_BASE_ADDRESS_MEM_TYPE_64)
+       {
+         i++;
+         h = get_conf_long(d, where + PCI_IOV_BAR_BASE + (i*4));
+         printf("%08x", h);
+       }
+      printf("%08x (%s-bit, %sprefetchable)\n",
+       addr,
+       (type == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32" : "64",
+       (l & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-");
+    }
+
   l = get_conf_long(d, where + PCI_IOV_MSAO);
   printf("\t\tVF Migration: offset: %08x, BIR: %x\n", PCI_IOV_MSA_OFFSET(l),
        PCI_IOV_MSA_BIR(l));
@@ -242,6 +284,6 @@ show_ext_caps(struct device *d)
            printf("#%02x\n", id);
            break;
        }
-      where = header >> 20;
+      where = (header >> 20) & ~3;
     } while (where);
 }