VPD: Cleanup

[pciutils.git] / ls-ecaps.c

diff --git a/ls-ecaps.c b/ls-ecaps.c
index 800a0322e1b77076bd2b8a28b12e56bf85762e97..55059480ee7a417bf5311a60e042e15babdcb375 100644 (file)
--- a/ls-ecaps.c
+++ b/ls-ecaps.c
@@ -737,6 +737,9 @@ show_ext_caps(struct device *d, int type)
        }
       switch (id)
        {
+         case PCI_EXT_CAP_ID_NULL:
+           printf("Null\n");
+           break;
          case PCI_EXT_CAP_ID_AER:
            cap_aer(d, where, type);
            break;
@@ -765,8 +768,8 @@ show_ext_caps(struct device *d, int type)
          case PCI_EXT_CAP_ID_MFVC:
            printf("Multi-Function Virtual Channel <?>\n");
            break;
-         case PCI_EXT_CAP_ID_RBCB:
-           printf("Root Bridge Control Block <?>\n");
+         case PCI_EXT_CAP_ID_RCRB:
+           printf("Root Complex Register Block <?>\n");
            break;
          case PCI_EXT_CAP_ID_VNDR:
            cap_evendor(d, where);
@@ -783,26 +786,74 @@ show_ext_caps(struct device *d, int type)
          case PCI_EXT_CAP_ID_SRIOV:
            cap_sriov(d, where);
            break;
+         case PCI_EXT_CAP_ID_MRIOV:
+           printf("Multi-Root I/O Virtualization <?>\n");
+           break;
          case PCI_EXT_CAP_ID_PRI:
            cap_pri(d, where);
            break;
+         case PCI_EXT_CAP_ID_REBAR:
+           printf("Resizable BAR <?>\n");
+           break;
+         case PCI_EXT_CAP_ID_DPA:
+           printf("Dynamic Power Allocation <?>\n");
+           break;
          case PCI_EXT_CAP_ID_TPH:
            cap_tph(d, where);
            break;
          case PCI_EXT_CAP_ID_LTR:
            cap_ltr(d, where);
            break;
+         case PCI_EXT_CAP_ID_SECPCI:
+           printf("Secondary PCI Express <?>\n");
+           break;
+         case PCI_EXT_CAP_ID_PMUX:
+           printf("Protocol Multiplexing <?>\n");
+           break;
          case PCI_EXT_CAP_ID_PASID:
            cap_pasid(d, where);
            break;
+         case PCI_EXT_CAP_ID_LNR:
+           printf("LN Requester <?>\n");
+           break;
          case PCI_EXT_CAP_ID_L1PM:
            cap_l1pm(d, where);
            break;
          case PCI_EXT_CAP_ID_PTM:
            cap_ptm(d, where);
            break;
+         case PCI_EXT_CAP_ID_M_PCIE:
+           printf("PCI Express over M_PHY <?>\n");
+           break;
+         case PCI_EXT_CAP_ID_FRS:
+           printf("FRS Queueing <?>\n");
+           break;
+         case PCI_EXT_CAP_ID_RTR:
+           printf("Readiness Time Reporting <?>\n");
+           break;
+         case PCI_EXT_CAP_ID_DVSEC:
+           printf("Designated Vendor-Specific <?>\n");
+           break;
+         case PCI_EXT_CAP_ID_VF_REBAR:
+           printf("VF Resizable BAR <?>\n");
+           break;
+         case PCI_EXT_CAP_ID_DLNK:
+           printf("Data Link Feature <?>\n");
+           break;
+         case PCI_EXT_CAP_ID_16GT:
+           printf("Physical Layer 16.0 GT/s <?>\n");
+           break;
+         case PCI_EXT_CAP_ID_LMR:
+           printf("Lane Margining at the Receiver <?>\n");
+           break;
+         case PCI_EXT_CAP_ID_HIER_ID:
+           printf("Hierarchy ID <?>\n");
+           break;
+         case PCI_EXT_CAP_ID_NPEM:
+           printf("Native PCIe Enclosure Management <?>\n");
+           break;
          default:
-           printf("#%02x\n", id);
+           printf("Extended Capability ID %#02x\n", id);
            break;
        }
       where = (header >> 20) & ~3;