lspci: Fix extra newline if L1.2 is not supported.

[pciutils.git] / ls-ecaps.c

diff --git a/ls-ecaps.c b/ls-ecaps.c
index 3deb53500bfff712e16fd8586bf46494acc581e6..4417cd9e1824bd552d4948214f5b289686b2a60c 100644 (file)
--- a/ls-ecaps.c
+++ b/ls-ecaps.c
@@ -76,6 +76,37 @@ cap_ltr(struct device *d, int where)
         ((unsigned long long)nosnoop & PCI_LTR_VALUE_MASK) * scale);
 }
 
+static void
+cap_sec(struct device *d, int where, int type)
+{
+  u32 ctrl3, lane_err_stat;
+  u8 lane;
+  printf("Secondary PCI Express\n");
+  if (verbose < 2 && type == 0)
+    return;
+
+  if (!config_fetch(d, where + PCI_SEC_LNKCTL3, 12))
+    return;
+
+  ctrl3 = get_conf_word(d, where + PCI_SEC_LNKCTL3);
+  printf("\t\tLnkCtl3: LnkEquIntrruptEn%c, PerformEqu%c\n",
+       FLAG(ctrl3, PCI_SEC_LNKCTL3_LNK_EQU_REQ_INTR_EN),
+       FLAG(ctrl3, PCI_SEC_LNKCTL3_PERFORM_LINK_EQU));
+
+  lane_err_stat = get_conf_word(d, where + PCI_SEC_LANE_ERR);
+  printf("\t\tLaneErrStat: ");
+  if (lane_err_stat)
+    {
+      printf("LaneErr at lane:");
+      for (lane = 0; lane_err_stat; lane_err_stat >>= 1, lane += 1)
+        if (BITS(lane_err_stat, 0, 1))
+          printf(" %u", lane);
+    }
+  else
+    printf("0");
+  printf("\n");
+}
+
 static void
 cap_dsn(struct device *d, int where)
 {
@@ -680,17 +711,19 @@ cap_l1pm(struct device *d, int where)
     FLAG(val, PCI_L1PM_SUBSTAT_CTL1_ASPM_L11));
 
   if (l1_cap & PCI_L1PM_SUBSTAT_CAP_PM_L12 || l1_cap & PCI_L1PM_SUBSTAT_CAP_ASPM_L12)
-    printf("\t\t\t   T_CommonMode=%dus", BITS(val, 8, 8));
-
-  if (l1_cap & PCI_L1PM_SUBSTAT_CAP_ASPM_L12)
     {
-      scale = BITS(val, 29, 3);
-      if (scale > 5)
-       printf(" LTR1.2_Threshold=<error>");
-      else
-       printf(" LTR1.2_Threshold=%lldns", BITS(val, 16, 10) * (unsigned long long) cap_ltr_scale(scale));
+      printf("\t\t\t   T_CommonMode=%dus", BITS(val, 8, 8));
+
+      if (l1_cap & PCI_L1PM_SUBSTAT_CAP_ASPM_L12)
+       {
+         scale = BITS(val, 29, 3);
+         if (scale > 5)
+           printf(" LTR1.2_Threshold=<error>");
+         else
+           printf(" LTR1.2_Threshold=%lldns", BITS(val, 16, 10) * (unsigned long long) cap_ltr_scale(scale));
+       }
+      printf("\n");
     }
-  printf("\n");
 
   val = get_conf_long(d, where + PCI_L1PM_SUBSTAT_CTL2);
   printf("\t\tL1SubCtl2:");
@@ -864,7 +897,7 @@ show_ext_caps(struct device *d, int type)
            cap_ltr(d, where);
            break;
          case PCI_EXT_CAP_ID_SECPCI:
-           printf("Secondary PCI Express <?>\n");
+           cap_sec(d, where, type);
            break;
          case PCI_EXT_CAP_ID_PMUX:
            printf("Protocol Multiplexing <?>\n");