struct id_bucket *current_id_bucket;
int id_load_failed;
int id_cache_status; /* 0=not read, 1=read, 2=dirty */
- int fd; /* proc: fd */
- int fd_rw; /* proc: fd opened read-write */
- struct pci_dev *cached_dev; /* proc: device the fd is for */
- int fd_pos; /* proc: current position */
+ int fd; /* proc/sys: fd for config space */
+ int fd_rw; /* proc/sys: fd opened read-write */
+ int fd_pos; /* proc/sys: current position */
+ int fd_vpd; /* sys: fd for VPD */
+ struct pci_dev *cached_dev; /* proc/sys: device the fds are for */
};
/* Initialize PCI access */
pciaddr_t rom_base_addr; /* Expansion ROM base address */
pciaddr_t rom_size; /* Expansion ROM size */
struct pci_cap *first_cap; /* List of capabilities */
+ char *phy_slot; /* Physical slot */
/* Fields used internally: */
struct pci_access *access;
#define PCI_ADDR_IO_MASK (~(pciaddr_t) 0x3)
#define PCI_ADDR_MEM_MASK (~(pciaddr_t) 0xf)
+#define PCI_ADDR_FLAG_MASK 0xf
u8 pci_read_byte(struct pci_dev *, int pos) PCI_ABI; /* Access to configuration space */
u16 pci_read_word(struct pci_dev *, int pos) PCI_ABI;
#define PCI_FILL_CLASS 32
#define PCI_FILL_CAPS 64
#define PCI_FILL_EXT_CAPS 128
+#define PCI_FILL_PHYS_SLOT 256
#define PCI_FILL_RESCAN 0x10000
void pci_setup_cache(struct pci_dev *, u8 *cache, int len) PCI_ABI;