MacOS: An attempt to appease compiler picky about attribute placement

[pciutils.git] / lib / pci.h

diff --git a/lib/pci.h b/lib/pci.h
index 3f9151173b862c9338558f6e75a6d477850ce96c..03b4c41694ff03d4302f6564336d4e6757f43162 100644 (file)
--- a/lib/pci.h
+++ b/lib/pci.h
@@ -1,9 +1,11 @@
 /*
  *     The PCI Library
  *
- *     Copyright (c) 1997--2020 Martin Mares <mj@ucw.cz>
+ *     Copyright (c) 1997--2023 Martin Mares <mj@ucw.cz>
  *
- *     Can be freely distributed and used under the terms of the GNU GPL.
+ *     Can be freely distributed and used under the terms of the GNU GPL v2+
+ *
+ *     SPDX-License-Identifier: GPL-2.0-or-later
  */
 
 #ifndef _PCI_LIB_H
@@ -16,7 +18,7 @@
 #include "header.h"
 #include "types.h"
 
-#define PCI_LIB_VERSION 0x030700
+#define PCI_LIB_VERSION 0x030a00
 
 #ifndef PCI_ABI
 #define PCI_ABI
@@ -44,6 +46,11 @@ enum pci_access_type {
   PCI_ACCESS_SYLIXOS_DEVICE,           /* SylixOS pci */
   PCI_ACCESS_HURD,                     /* GNU/Hurd */
   PCI_ACCESS_WIN32_CFGMGR32,           /* Win32 cfgmgr32.dll */
+  PCI_ACCESS_WIN32_KLDBG,              /* Win32 kldbgdrv.sys */
+  PCI_ACCESS_WIN32_SYSDBG,             /* Win32 NT SysDbg */
+  PCI_ACCESS_MMIO_TYPE1,               /* MMIO ports, type 1 */
+  PCI_ACCESS_MMIO_TYPE1_EXT,           /* MMIO ports, type 1 extended */
+  PCI_ACCESS_ECAM,                     /* PCIe ECAM via /dev/mem */
   PCI_ACCESS_MAX
 };
 
@@ -80,9 +87,9 @@ struct pci_access {
   struct udev_hwdb *id_udev_hwdb;
   int fd;                              /* proc/sys: fd for config space */
   int fd_rw;                           /* proc/sys: fd opened read-write */
-  int fd_pos;                          /* proc/sys: current position */
   int fd_vpd;                          /* sys: fd for VPD */
   struct pci_dev *cached_dev;          /* proc/sys: device the fds are for */
+  void *backend_data;                  /* Private data of the back end */
 };
 
 /* Initialize PCI access */
@@ -157,7 +164,7 @@ struct pci_dev {
   u8 *cache;                           /* Cached config registers */
   int cache_len;
   int hdrtype;                         /* Cached low 7 bits of header type, -1 if unknown */
-  void *aux;                           /* Auxiliary data for use by the back-end */
+  void *backend_data;                  /* Private data for of the back end */
   struct pci_property *properties;     /* A linked list of extra properties */
   struct pci_cap *last_cap;            /* Last capability in the list */
 };
@@ -166,14 +173,17 @@ struct pci_dev {
 #define PCI_ADDR_MEM_MASK (~(pciaddr_t) 0xf)
 #define PCI_ADDR_FLAG_MASK 0xf
 
-u8 pci_read_byte(struct pci_dev *, int pos) PCI_ABI; /* Access to configuration space */
+/* Access to configuration space */
+u8 pci_read_byte(struct pci_dev *, int pos) PCI_ABI;
 u16 pci_read_word(struct pci_dev *, int pos) PCI_ABI;
 u32 pci_read_long(struct pci_dev *, int pos) PCI_ABI;
-int pci_read_block(struct pci_dev *, int pos, u8 *buf, int len) PCI_ABI;
 int pci_read_vpd(struct pci_dev *d, int pos, u8 *buf, int len) PCI_ABI;
 int pci_write_byte(struct pci_dev *, int pos, u8 data) PCI_ABI;
 int pci_write_word(struct pci_dev *, int pos, u16 data) PCI_ABI;
 int pci_write_long(struct pci_dev *, int pos, u32 data) PCI_ABI;
+
+/* Configuration space as a sequence of bytes (little-endian) */
+int pci_read_block(struct pci_dev *, int pos, u8 *buf, int len) PCI_ABI;
 int pci_write_block(struct pci_dev *, int pos, u8 *buf, int len) PCI_ABI;
 
 /*
@@ -246,8 +256,11 @@ struct pci_cap *pci_find_cap_nr(struct pci_dev *, unsigned int id, unsigned int
 
 struct pci_filter {
   int domain, bus, slot, func;                 /* -1 = ANY */
-  int vendor, device, device_class;
-  int rfu[3];
+  int vendor, device;
+  int device_class;
+  unsigned int device_class_mask;              /* Which bits of the device_class are compared, default=all */
+  int prog_if;
+  int rfu[1];
 };
 
 void pci_filter_init(struct pci_access *, struct pci_filter *) PCI_ABI;