lspci: Add support for CXL MLD DVSEC

[pciutils.git] / lib / i386-ports.c

diff --git a/lib/i386-ports.c b/lib/i386-ports.c
index 0b1677a236c7320139f1dafb2f3f2959a0bace47..2e64fe4826238d358cc7aaca682a65b3797832d7 100644 (file)
--- a/lib/i386-ports.c
+++ b/lib/i386-ports.c
@@ -10,7 +10,7 @@
 
 #include "internal.h"
 
-#include <unistd.h>
+#include <string.h>
 
 #if defined(PCI_OS_LINUX)
 #include "i386-io-linux.h"
@@ -50,10 +50,13 @@ conf12_init(struct pci_access *a)
 }
 
 static void
-conf12_cleanup(struct pci_access *a UNUSED)
+conf12_cleanup(struct pci_access *a)
 {
   if (conf12_io_enabled > 0)
-    conf12_io_enabled = intel_cleanup_io(a);
+    {
+      intel_cleanup_io(a);
+      conf12_io_enabled = -1;
+    }
 }
 
 /*
@@ -72,6 +75,7 @@ intel_sanity_check(struct pci_access *a, struct pci_methods *m)
 {
   struct pci_dev d;
 
+  memset(&d, 0, sizeof(d));
   a->debug("...sanity check");
   d.bus = 0;
   d.func = 0;
@@ -129,7 +133,7 @@ conf1_read(struct pci_dev *d, int pos, byte *buf, int len)
   int addr = 0xcfc + (pos&3);
   int res = 1;
 
-  if (pos >= 256)
+  if (d->domain || pos >= 256)
     return 0;
 
   intel_io_lock();
@@ -160,7 +164,7 @@ conf1_write(struct pci_dev *d, int pos, byte *buf, int len)
   int addr = 0xcfc + (pos&3);
   int res = 1;
 
-  if (pos >= 256)
+  if (d->domain || pos >= 256)
     return 0;
 
   intel_io_lock();
@@ -217,7 +221,7 @@ conf2_read(struct pci_dev *d, int pos, byte *buf, int len)
   int res = 1;
   int addr = 0xc000 | (d->dev << 8) | pos;
 
-  if (pos >= 256)
+  if (d->domain || pos >= 256)
     return 0;
 
   if (d->dev >= 16)
@@ -252,11 +256,12 @@ conf2_write(struct pci_dev *d, int pos, byte *buf, int len)
   int res = 1;
   int addr = 0xc000 | (d->dev << 8) | pos;
 
-  if (pos >= 256)
+  if (d->domain || pos >= 256)
     return 0;
 
   if (d->dev >= 16)
-    d->access->error("conf2_write: only first 16 devices exist.");
+    /* conf2 supports only 16 devices per bus */
+    return 0;
 
   intel_io_lock();
   outb((d->func << 1) | 0xf0, 0xcf8);