#include "internal.h"
-#include <unistd.h>
+#include <string.h>
#if defined(PCI_OS_LINUX)
#include "i386-io-linux.h"
}
static void
-conf12_cleanup(struct pci_access *a UNUSED)
+conf12_cleanup(struct pci_access *a)
{
if (conf12_io_enabled > 0)
- conf12_io_enabled = intel_cleanup_io(a);
+ {
+ intel_cleanup_io(a);
+ conf12_io_enabled = -1;
+ }
}
/*
{
struct pci_dev d;
+ memset(&d, 0, sizeof(d));
a->debug("...sanity check");
d.bus = 0;
d.func = 0;
int addr = 0xcfc + (pos&3);
int res = 1;
- if (pos >= 256)
+ if (d->domain || pos >= 256)
return 0;
+ if (len != 1 && len != 2 && len != 4)
+ return pci_generic_block_read(d, pos, buf, len);
+
intel_io_lock();
outl(0x80000000 | ((d->bus & 0xff) << 16) | (PCI_DEVFN(d->dev, d->func) << 8) | (pos&~3), 0xcf8);
case 4:
((u32 *) buf)[0] = cpu_to_le32(inl(addr));
break;
- default:
- res = pci_generic_block_read(d, pos, buf, len);
}
intel_io_unlock();
int addr = 0xcfc + (pos&3);
int res = 1;
- if (pos >= 256)
+ if (d->domain || pos >= 256)
return 0;
+ if (len != 1 && len != 2 && len != 4)
+ return pci_generic_block_write(d, pos, buf, len);
+
intel_io_lock();
outl(0x80000000 | ((d->bus & 0xff) << 16) | (PCI_DEVFN(d->dev, d->func) << 8) | (pos&~3), 0xcf8);
case 4:
outl(le32_to_cpu(((u32 *) buf)[0]), addr);
break;
- default:
- res = pci_generic_block_write(d, pos, buf, len);
}
intel_io_unlock();
return res;
int res = 1;
int addr = 0xc000 | (d->dev << 8) | pos;
- if (pos >= 256)
+ if (d->domain || pos >= 256)
return 0;
if (d->dev >= 16)
/* conf2 supports only 16 devices per bus */
return 0;
+ if (len != 1 && len != 2 && len != 4)
+ return pci_generic_block_read(d, pos, buf, len);
+
intel_io_lock();
outb((d->func << 1) | 0xf0, 0xcf8);
outb(d->bus, 0xcfa);
case 4:
((u32 *) buf)[0] = cpu_to_le32(inl(addr));
break;
- default:
- res = pci_generic_block_read(d, pos, buf, len);
}
outb(0, 0xcf8);
intel_io_unlock();
int res = 1;
int addr = 0xc000 | (d->dev << 8) | pos;
- if (pos >= 256)
+ if (d->domain || pos >= 256)
return 0;
if (d->dev >= 16)
- d->access->error("conf2_write: only first 16 devices exist.");
+ /* conf2 supports only 16 devices per bus */
+ return 0;
+
+ if (len != 1 && len != 2 && len != 4)
+ return pci_generic_block_write(d, pos, buf, len);
intel_io_lock();
outb((d->func << 1) | 0xf0, 0xcf8);
case 4:
outl(le32_to_cpu(* (u32 *) buf), addr);
break;
- default:
- res = pci_generic_block_write(d, pos, buf, len);
}
outb(0, 0xcf8);