+2024-04-05 Martin Mares <mj@ucw.cz>
+
+ * lspci decodes the IDE (Integrity & Data Encryption) and TEE-IO
+ extended capabilities.
+
+ * Several bugs in back-ends for Windows were fixed and the
+ README.Windows updated.
+
+ * Fixed building on Haiku.
+
+ * We now use more C99 features.
+
+ * Optimization flags used for compiling individual object files
+ should be the same as optimization flags for linking the final
+ executable to make link-time optimization possible.
+
+ * We no longer look up subsystems in the HWDB, because there is
+ no API for querying only the subsystem. The lookup we used
+ previously returned a device name if there was no entry for
+ the particular subsystem.
+
+ * Updated pci.ids.
+
+2024-02-25 Martin Mares <mj@ucw.cz>
+
+ * Released as 3.11.1.
+
+ * Fixed wrong API version in lib/pci.h.
+
+ * Updated README.Windows.
+
+ * Fix compilation on Windows.
+
+2024-02-24 Martin Mares <mj@ucw.cz>
+
+ * Released as 3.11.0.
+
+ * update-pciids now supports XZ compression. If libpci is configured
+ with support for compression, all downloaded files are recompressed
+ as gzip. Otherwise they are stored as plain text.
+
+ * update-pciids now sends itself as the User-Agent.
+
+ * Added a pcilmr utility for PCIe lane margining. Thanks to Nikita
+ Proshkin for contributing it.
+
+ * Re-factored access to i386 ports on all relevant platforms.
+
+ * Added i386 port access on OpenBSD.
+
+ * Back-ends for Windows received many bug fixes and improvements.
+
+ * ECAM back-end now scans ACPI and BIOS memory faster.
+
+ * Linux systems without pread/pwrite are no longer supported
+ as they are hopefully long gone. This helps avoid the tricky check
+ for presence of pread which was found to fail on musl libc.
+
+ * Improved decoding of PCIe control and status registers.
+
+ * Decoding of CXL capabilities now supports up to CXL 3.0.
+
+ * lspci now displays interrupt message numbers consistently across
+ different capabilities.
+
+ * Cache of IDs resolved via DNS, which was located in ~/.pci-ids
+ by default, is now stored according to the XDG base directory
+ specification in $XDG_CACHE_HOME/pci-ids.
+
+ * All source files now have SPDX license identifiers.
+
+ * Internal: The "aux" fields of structs pci_access and pci_dev
+ reserved for use by back-ends were renamed to backend_data to better
+ reflect their meaning.
+
+ * As usually, various minor bug fixes and updated pci.ids.
+
+2023-05-01 Martin Mares <mj@ucw.cz>
+
+ * Released as 3.10.0.
+
+ * Fixed bug in definition of versioned symbol aliases
+ in shared libpci, which made compiling with link-time
+ optimization fail.
+
+ * Filters now accept "0x..." syntax for backward compatibility.
+
+ * Windows: The cfgmgr32 back-end which provides the list of devices
+ can be combined with another back-end which provides access
+ to configuration space.
+
+ * ECAM (Enhanced Configuration Access Mechanism), which is defined
+ by the PCIe standard, is now supported. It requires root privileges,
+ access to physical memory, and also manual configuration on some
+ systems.
+
+ * lspci: Tree view now works on multi-domain systems. It now respects
+ filters properly.
+
+ * Last but not least, pci.ids were updated to the current snapshot
+ of the database. This includes overall cleanup of entries with
+ non-ASCII characters in their names -- such characters are allowed,
+ but only if they convey interesting information (e.g., umlauts
+ in German company names, but not the "registered trade mark" sign).
+
+2022-11-20 Martin Mares <mj@ucw.cz>
+
+ * Released as 3.9.0.
+
+ * We decode Compute Express Link (CXL) capabilities.
+
+ * The tree mode of lspci is now compatible with filtering options.
+
+ * When setpci is used with a named register, it checks whether
+ the register is present in the particular header type.
+
+ * Linux: The intel-conf[12] back-ends prefer to use ioperm() instead
+ of iopl() to gain access to I/O ports.
+
+ * Windows: We have two new back-ends thanks to Pali Rohár.
+ One uses the NT SysDbg interface, the other uses kldbgdrv.sys
+ (which is a part of the Microsoft WinDbg tool).
+
+ * Windows: We support building libpci as a DLL. Also, Windows
+ binaries now include meta-data with version.
+
+ * Hurd: The Hurd back-end works again.
+
+ * mmio-conf1(-ext): Added a new back-end implementing the intel-conf1
+ interface over MMIO. This is useful on some ARM machines, but it
+ requires manual configuration of the MMIO addresses.
+
+ * As usually, updated pci.ids to the current snapshot of the database.
+
+2022-04-18 Martin Mares <mj@ucw.cz>
+
+ * Released as 3.8.0.
+
+ * Filters can now match devices based on partially specified
+ class code and also on the programming interface.
+
+ * Reporting of link speeds, power limits, and virtual function tags
+ has been updated to the current PCIe specification.
+
+ * We decode the Data Object Exchange capability.
+
+ * Bus mapping mode works in non-zero domains.
+
+ * pci_fill_info() can fetch more fields: bridge bases, programming
+ interface, revision, subsystem vendor and device ID, OS driver,
+ and also parent bridge. Internally, the implementation was rewritten,
+ significantly reducing the number of corner cases to be handled.
+
+ * The Windows port was revived and greatly improved by Pali Rohár.
+ It requires less magic to compile. More importantly, it runs on both
+ old and recent Windows systems (see README.Windows for details).
+
+ * Added a new Windows back-end using the cfgmgr32 interface.
+ It does not provide direct access to the configuration space,
+ but basic information about the device is reported via pci_fill_info().
+ For back-ends of this type, we now provide an emulated read-only
+ config space.
+
+ * If the configuration space is not readable for some reason
+ (e.g., the cfgmgr32 back-end, but also badly implemented sleep mode
+ of some devices), lspci prints only information provided by the OS.
+
+ * The Hurd back-end was greatly improved thanks to Joan Lledó.
+
+ * Various minor bug fixes and improvements.
+
+ * We officially require a working C99 compiler. Sorry, MSVC.
+
+ * As usually, updated pci.ids to the current snapshot of the database.
+
2020-05-31 Martin Mares <mj@ucw.cz>
* Released as 3.7.0.
2007-08-31 Martin Mares <mj@ucw.cz>
- * Makefile, lib/Makefile: `ar' and `ranlib' can be overriden to allow
+ * Makefile, lib/Makefile: `ar' and `ranlib' can be overridden to allow
cross-compilation.
2007-08-27 Martin Mares <mj@ucw.cz>
is not supported by all C libraries.
* Makefile: Always enter the lib directory (remember that we don't have
- full dependecies for the library in the top-level Makefile; hmmm, another
+ full dependencies for the library in the top-level Makefile; hmmm, another
thing to rewrite some day).
* lib/sysfs.c: Added Linux sysfs access method based on the patch
* lspci.c (show_msi): Added dumping of the MSI capability.
(show_slotid): The same for SlotID capability.
- (show_caps): Seperated capability dumping, because it should
+ (show_caps): Separated capability dumping, because it should
be used for both htype0 and htype1. Even PCI 2.2 doesn't mention
layout of htype2, so I'm a bit unsure about it wrt capabilities
-- they at least have to live somewhere else since address 0x34
is mainly guesswork based on DEC/Intel 21153 bridge specs
since I don't have the PCI Power Management document).
- * lspci.c: Replaced numerous occurences of (x & flag) ? '+' : '-'
+ * lspci.c: Replaced numerous occurrences of (x & flag) ? '+' : '-'
by FLAG macro.
* lspci.c: Added bridge checks to bus mapping code.
* lib/header.h: Until kernel adopts new layout of PCI
includes (i.e., separate declaration of header structure,
functions and device IDs), which is not going to happen
- before 2.3, we'll use our own definiton of the header.
+ before 2.3, we'll use our own definition of the header.
* lspci.c (show_verbose): Display `Cap' flag in device status.
- * lspci.c (show_htype0): Display capability lists whereever
+ * lspci.c (show_htype0): Display capability lists wherever
available. The only capability name we recognize now is `AGP'.
Unfortunately, capabilities are stored in device-dependent
portion of the configuration space and are thus available