+ if (verbose > 1)
+ printf("\tSecondary status: 66MHz%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c <SERR%c <PERR%c\n",
+ FLAG(sec_stat, PCI_STATUS_66MHZ),
+ FLAG(sec_stat, PCI_STATUS_FAST_BACK),
+ FLAG(sec_stat, PCI_STATUS_PARITY),
+ ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
+ ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
+ ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
+ FLAG(sec_stat, PCI_STATUS_SIG_TARGET_ABORT),
+ FLAG(sec_stat, PCI_STATUS_REC_TARGET_ABORT),
+ FLAG(sec_stat, PCI_STATUS_REC_MASTER_ABORT),
+ FLAG(sec_stat, PCI_STATUS_SIG_SYSTEM_ERROR),
+ FLAG(sec_stat, PCI_STATUS_DETECTED_PARITY));
+
+ show_rom(d, PCI_ROM_ADDRESS1);
+
+ if (verbose > 1)
+ {
+ printf("\tBridgeCtl: Parity%c SERR%c NoISA%c VGA%c MAbort%c >Reset%c FastB2B%c\n",
+ FLAG(brc, PCI_BRIDGE_CTL_PARITY),
+ FLAG(brc, PCI_BRIDGE_CTL_SERR),
+ FLAG(brc, PCI_BRIDGE_CTL_NO_ISA),
+ FLAG(brc, PCI_BRIDGE_CTL_VGA),
+ FLAG(brc, PCI_BRIDGE_CTL_MASTER_ABORT),
+ FLAG(brc, PCI_BRIDGE_CTL_BUS_RESET),
+ FLAG(brc, PCI_BRIDGE_CTL_FAST_BACK));
+ printf("\t\tPriDiscTmr%c SecDiscTmr%c DiscTmrStat%c DiscTmrSERREn%c\n",
+ FLAG(brc, PCI_BRIDGE_CTL_PRI_DISCARD_TIMER),
+ FLAG(brc, PCI_BRIDGE_CTL_SEC_DISCARD_TIMER),
+ FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_STATUS),
+ FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_SERR_EN));
+ }
+
+ show_caps(d, PCI_CAPABILITY_LIST);
+}