+ pciaddr_t bridge_base_addr[4]; /* Bridge base addresses (without flags) */
+ pciaddr_t bridge_size[4]; /* Bridge sizes */
+ pciaddr_t bridge_flags[4]; /* PCI_IORESOURCE_* flags for bridge addresses */
+ u8 prog_if, rev_id; /* Programming interface for device_class and revision id */
+ u16 subsys_vendor_id, subsys_id; /* Subsystem vendor id and subsystem id */
+ struct pci_dev *parent; /* Parent device, does not have to be always accessible */
+ int no_config_access; /* No access to config space for this device */