Names: Fixed a rare bug in loading of pci.ids

[pciutils.git] / ChangeLog

diff --git a/ChangeLog b/ChangeLog
index a6142813bb453ecf09a6f247d1ad4d489af251ea..39df71344f60e47f6de56d3d97d0c36f19edc9ad 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,6 +1,40 @@
-2022-11-18  Martin Mares <mj@ucw.cz>
+2024-02-17  Martin Mares <mj@ucw.cz>

 
 

-       * XXX: To be released as 3.9.0.
+       * Will be released as 3.11.0.
+
+       * All source files now have SPDX license identifiers.
+
+2023-05-01  Martin Mares <mj@ucw.cz>
+
+       * Released as 3.10.0.
+
+       * Fixed bug in definition of versioned symbol aliases
+         in shared libpci, which made compiling with link-time
+         optimization fail.
+
+       * Filters now accept "0x..." syntax for backward compatibility.
+
+       * Windows: The cfgmgr32 back-end which provides the list of devices
+         can be combined with another back-end which provides access
+         to configuration space.
+
+       * ECAM (Enhanced Configuration Access Mechanism), which is defined
+         by the PCIe standard, is now supported. It requires root privileges,
+         access to physical memory, and also manual configuration on some
+         systems.
+
+       * lspci: Tree view now works on multi-domain systems. It now respects
+         filters properly.
+
+       * Last but not least, pci.ids were updated to the current snapshot
+         of the database. This includes overall cleanup of entries with
+         non-ASCII characters in their names -- such characters are allowed,
+         but only if they convey interesting information (e.g., umlauts
+         in German company names, but not the "registered trade mark" sign).
+
+2022-11-20  Martin Mares <mj@ucw.cz>
+
+       * Released as 3.9.0.

 
        * We decode Compute Express Link (CXL) capabilities.
 
 
        * We decode Compute Express Link (CXL) capabilities.
 


@@ -21,10 +55,12 @@
 
        * Hurd: The Hurd back-end works again.
 
 
        * Hurd: The Hurd back-end works again.
 

-       * mmio-ports: Added a new back-end implementing the intel-conf1
+       * mmio-conf1(-ext): Added a new back-end implementing the intel-conf1

          interface over MMIO. This is useful on some ARM machines, but it
          requires manual configuration of the MMIO addresses.
 
          interface over MMIO. This is useful on some ARM machines, but it
          requires manual configuration of the MMIO addresses.
 

+       * As usually, updated pci.ids to the current snapshot of the database.
+

 2022-04-18  Martin Mares <mj@ucw.cz>
 
        * Released as 3.8.0.
 2022-04-18  Martin Mares <mj@ucw.cz>
 
        * Released as 3.8.0.