2 * $Id: lspci.c,v 1.42 2002/04/06 12:08:26 mj Exp $
4 * Linux PCI Utilities -- List All PCI Devices
6 * Copyright (c) 1997--2002 Martin Mares <mj@ucw.cz>
8 * Can be freely distributed and used under the terms of the GNU GPL.
21 static int verbose; /* Show detailed information */
22 static int buscentric_view; /* Show bus addresses/IRQ's instead of CPU-visible ones */
23 static int show_hex; /* Show contents of config space as hexadecimal numbers */
24 static struct pci_filter filter; /* Device filter */
25 static int show_tree; /* Show bus tree */
26 static int machine_readable; /* Generate machine-readable output */
27 static int map_mode; /* Bus mapping mode enabled */
29 static char options[] = "nvbxs:d:ti:mgM" GENERIC_OPTIONS ;
31 static char help_msg[] = "\
32 Usage: lspci [<switches>]\n\
35 -n\t\tShow numeric ID's\n\
36 -b\t\tBus-centric view (PCI addresses and IRQ's instead of those seen by the CPU)\n\
37 -x\t\tShow hex-dump of the standard portion of config space\n\
38 -xxx\t\tShow hex-dump of the whole config space (dangerous; root only)\n\
39 -s [[<bus>]:][<slot>][.[<func>]]\tShow only devices in selected slots\n\
40 -d [<vendor>]:[<device>]\tShow only selected devices\n\
41 -t\t\tShow bus tree\n\
42 -m\t\tProduce machine-readable output\n\
43 -i <file>\tUse specified ID database instead of %s\n\
44 -M\t\tEnable `bus mapping' mode (dangerous; root only)\n"
48 /* Communication with libpci */
50 static struct pci_access *pacc;
52 /* Format strings used for IRQ numbers and memory addresses */
55 #define IRQ_FORMAT "%08x"
57 #define IRQ_FORMAT "%d"
60 #ifdef HAVE_64BIT_ADDRESS
61 #ifdef HAVE_LONG_ADDRESS
62 #define ADDR_FORMAT "%016Lx"
64 #define ADDR_FORMAT "%016lx"
67 #define ADDR_FORMAT "%08lx"
71 #define IO_FORMAT "%016Lx"
72 #elif defined(HAVE_LONG_ADDRESS)
73 #define IO_FORMAT "%04Lx"
75 #define IO_FORMAT "%04lx"
79 * If we aren't being compiled by GCC, use malloc() instead of alloca().
80 * This increases our memory footprint, but only slightly since we don't
88 /* Our view of the PCI bus */
93 unsigned int config_cnt;
97 static struct device *first_dev;
99 static struct device *
100 scan_device(struct pci_dev *p)
102 int how_much = (show_hex > 2) ? 256 : 64;
105 if (!pci_filter_match(&filter, p))
107 d = xmalloc(sizeof(struct device));
108 bzero(d, sizeof(*d));
110 if (!pci_read_block(p, 0, d->config, how_much))
111 die("Unable to read %d bytes of configuration space.", how_much);
112 if (how_much < 128 && (d->config[PCI_HEADER_TYPE] & 0x7f) == PCI_HEADER_TYPE_CARDBUS)
114 /* For cardbus bridges, we need to fetch 64 bytes more to get the full standard header... */
115 if (!pci_read_block(p, 64, d->config+64, 64))
116 die("Unable to read cardbus bridge extension data.");
119 d->config_cnt = how_much;
120 pci_setup_cache(p, d->config, d->config_cnt);
121 pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_IRQ | PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES);
132 for(p=pacc->devices; p; p=p->next)
133 if (d = scan_device(p))
143 static int is_root = -1;
146 is_root = !geteuid();
151 config_fetch(struct device *d, unsigned int pos, unsigned int len)
153 if (pos + len < d->config_cnt)
155 if (pacc->method != PCI_ACCESS_DUMP && !check_root())
157 return pci_read_block(d->dev, pos, d->config + pos, len);
160 /* Config space accesses */
163 get_conf_byte(struct device *d, unsigned int pos)
165 return d->config[pos];
169 get_conf_word(struct device *d, unsigned int pos)
171 return d->config[pos] | (d->config[pos+1] << 8);
175 get_conf_long(struct device *d, unsigned int pos)
177 return d->config[pos] |
178 (d->config[pos+1] << 8) |
179 (d->config[pos+2] << 16) |
180 (d->config[pos+3] << 24);
186 compare_them(const void *A, const void *B)
188 const struct pci_dev *a = (*(const struct device **)A)->dev;
189 const struct pci_dev *b = (*(const struct device **)B)->dev;
199 if (a->func < b->func)
201 if (a->func > b->func)
209 struct device **index, **h, **last_dev;
214 for(d=first_dev; d; d=d->next)
216 h = index = alloca(sizeof(struct device *) * cnt);
217 for(d=first_dev; d; d=d->next)
219 qsort(index, cnt, sizeof(struct device *), compare_them);
220 last_dev = &first_dev;
225 last_dev = &(*h)->next;
233 #define FLAG(x,y) ((x & y) ? '+' : '-')
236 show_terse(struct device *d)
239 struct pci_dev *p = d->dev;
240 byte classbuf[128], devbuf[128];
242 printf("%02x:%02x.%x %s: %s",
246 pci_lookup_name(pacc, classbuf, sizeof(classbuf),
248 get_conf_word(d, PCI_CLASS_DEVICE), 0, 0, 0),
249 pci_lookup_name(pacc, devbuf, sizeof(devbuf),
250 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
251 p->vendor_id, p->device_id, 0, 0));
252 if (c = get_conf_byte(d, PCI_REVISION_ID))
253 printf(" (rev %02x)", c);
257 c = get_conf_byte(d, PCI_CLASS_PROG);
258 x = pci_lookup_name(pacc, devbuf, sizeof(devbuf),
260 get_conf_word(d, PCI_CLASS_DEVICE), c, 0, 0);
263 printf(" (prog-if %02x", c);
273 show_size(pciaddr_t x)
279 printf("%d", (int) x);
280 else if (x < 1048576)
281 printf("%dK", (int)(x / 1024));
282 else if (x < 0x80000000)
283 printf("%dM", (int)(x / 1048576));
285 printf(ADDR_FORMAT, x);
290 show_bases(struct device *d, int cnt)
292 struct pci_dev *p = d->dev;
293 word cmd = get_conf_word(d, PCI_COMMAND);
298 pciaddr_t pos = p->base_addr[i];
299 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->size[i] : 0;
300 u32 flg = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
301 if (flg == 0xffffffff)
303 if (!pos && !flg && !len)
306 printf("\tRegion %d: ", i);
309 if (pos && !flg) /* Reported by the OS, but not by the device */
311 printf("[virtual] ");
314 if (flg & PCI_BASE_ADDRESS_SPACE_IO)
316 pciaddr_t a = pos & PCI_BASE_ADDRESS_IO_MASK;
317 printf("I/O ports at ");
319 printf(IO_FORMAT, a);
320 else if (flg & PCI_BASE_ADDRESS_IO_MASK)
323 printf("<unassigned>");
324 if (!(cmd & PCI_COMMAND_IO))
325 printf(" [disabled]");
329 int t = flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
330 pciaddr_t a = pos & PCI_ADDR_MEM_MASK;
334 printf("Memory at ");
335 if (t == PCI_BASE_ADDRESS_MEM_TYPE_64)
339 printf("<invalid-64bit-slot>");
345 z = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
349 printf("%08x" ADDR_FORMAT, z, a);
351 printf("<unassigned>");
359 printf(ADDR_FORMAT, a);
361 printf(((flg & PCI_BASE_ADDRESS_MEM_MASK) || z) ? "<ignored>" : "<unassigned>");
363 printf(" (%s, %sprefetchable)",
364 (t == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32-bit" :
365 (t == PCI_BASE_ADDRESS_MEM_TYPE_64) ? "64-bit" :
366 (t == PCI_BASE_ADDRESS_MEM_TYPE_1M) ? "low-1M" : "type 3",
367 (flg & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-");
368 if (!(cmd & PCI_COMMAND_MEMORY))
369 printf(" [disabled]");
377 show_pm(struct device *d, int where, int cap)
380 static int pm_aux_current[8] = { 0, 55, 100, 160, 220, 270, 320, 375 };
382 printf("Power Management version %d\n", cap & PCI_PM_CAP_VER_MASK);
385 printf("\t\tFlags: PMEClk%c DSI%c D1%c D2%c AuxCurrent=%dmA PME(D0%c,D1%c,D2%c,D3hot%c,D3cold%c)\n",
386 FLAG(cap, PCI_PM_CAP_PME_CLOCK),
387 FLAG(cap, PCI_PM_CAP_DSI),
388 FLAG(cap, PCI_PM_CAP_D1),
389 FLAG(cap, PCI_PM_CAP_D2),
390 pm_aux_current[(cap >> 6) & 7],
391 FLAG(cap, PCI_PM_CAP_PME_D0),
392 FLAG(cap, PCI_PM_CAP_PME_D1),
393 FLAG(cap, PCI_PM_CAP_PME_D2),
394 FLAG(cap, PCI_PM_CAP_PME_D3_HOT),
395 FLAG(cap, PCI_PM_CAP_PME_D3_COLD));
396 config_fetch(d, where + PCI_PM_CTRL, PCI_PM_SIZEOF - PCI_PM_CTRL);
397 t = get_conf_word(d, where + PCI_PM_CTRL);
398 printf("\t\tStatus: D%d PME-Enable%c DSel=%d DScale=%d PME%c\n",
399 t & PCI_PM_CTRL_STATE_MASK,
400 FLAG(t, PCI_PM_CTRL_PME_ENABLE),
401 (t & PCI_PM_CTRL_DATA_SEL_MASK) >> 9,
402 (t & PCI_PM_CTRL_DATA_SCALE_MASK) >> 13,
403 FLAG(t, PCI_PM_CTRL_PME_STATUS));
404 b = get_conf_byte(d, where + PCI_PM_PPB_EXTENSIONS);
406 printf("\t\tBridge: PM%c B3%c\n",
407 FLAG(t, PCI_PM_BPCC_ENABLE),
408 FLAG(~t, PCI_PM_PPB_B2_B3));
412 format_agp_rate(int rate, char *buf)
423 *c++ = '0' + (1 << i);
428 strcpy(buf, "<none>");
432 show_agp(struct device *d, int where, int cap)
438 printf("AGP version %x.%x\n", cap/16, cap%16);
441 config_fetch(d, where + PCI_AGP_STATUS, PCI_AGP_SIZEOF - PCI_AGP_STATUS);
442 t = get_conf_long(d, where + PCI_AGP_STATUS);
443 format_agp_rate(t & 7, rate);
444 printf("\t\tStatus: RQ=%d SBA%c 64bit%c FW%c Rate=%s\n",
445 (t & PCI_AGP_STATUS_RQ_MASK) >> 24U,
446 FLAG(t, PCI_AGP_STATUS_SBA),
447 FLAG(t, PCI_AGP_STATUS_64BIT),
448 FLAG(t, PCI_AGP_STATUS_FW),
450 t = get_conf_long(d, where + PCI_AGP_COMMAND);
451 format_agp_rate(t & 7, rate);
452 printf("\t\tCommand: RQ=%d SBA%c AGP%c 64bit%c FW%c Rate=%s\n",
453 (t & PCI_AGP_COMMAND_RQ_MASK) >> 24U,
454 FLAG(t, PCI_AGP_COMMAND_SBA),
455 FLAG(t, PCI_AGP_COMMAND_AGP),
456 FLAG(t, PCI_AGP_COMMAND_64BIT),
457 FLAG(t, PCI_AGP_COMMAND_FW),
462 show_pcix_nobridge(struct device *d, int where)
464 u16 command = get_conf_word(d, where + PCI_PCIX_COMMAND);
465 u32 status = get_conf_long(d, where + PCI_PCIX_STATUS);
466 printf("PCI-X non-bridge device.\n");
469 printf("\t\tCommand: DPERE%c ERO%c RBC=%d OST=%d\n",
470 FLAG(command, PCI_PCIX_COMMAND_DPERE),
471 FLAG(command, PCI_PCIX_COMMAND_ERO),
472 ((command & PCI_PCIX_COMMAND_MAX_MEM_READ_BYTE_COUNT) >> 2U),
473 ((command & PCI_PCIX_COMMAND_MAX_OUTSTANDING_SPLIT_TRANS) >> 4U));
474 printf("\t\tStatus: Bus=%u Dev=%u Func=%u 64bit%c 133MHz%c SCD%c USC%c, DC=%s, DMMRBC=%u, DMOST=%u, DMCRS=%u, RSCEM%c",
475 ((status >> 8) & 0xffU), // bus
476 ((status >> 3) & 0x1fU), // dev
477 (status & PCI_PCIX_BRIDGE_STATUS_FUNCTION), // function
478 FLAG(status, PCI_PCIX_STATUS_64BIT),
479 FLAG(status, PCI_PCIX_STATUS_133MHZ),
480 FLAG(status, PCI_PCIX_STATUS_SC_DISCARDED),
481 FLAG(status, PCI_PCIX_STATUS_UNEXPECTED_SC),
482 ((status & PCI_PCIX_STATUS_DEVICE_COMPLEXITY) ? "bridge" : "simple"),
483 ((status >> 21) & 3U),
484 ((status >> 23) & 7U),
485 ((status >> 26) & 7U),
486 FLAG(status, PCI_PCIX_STATUS_RCVD_SC_ERR_MESS));
490 show_pcix_bridge(struct device *d, int where)
493 u32 status, upstcr, downstcr;
494 printf("PCI-X bridge device.\n");
497 secstatus = get_conf_word(d, where + PCI_PCIX_BRIDGE_SEC_STATUS);
498 printf("\t\tSecondary Status: 64bit%c, 133MHz%c, SCD%c, USC%c, SCO%c, SRD%c Freq=%d\n",
499 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_64BIT),
500 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_133MHZ),
501 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_SC_DISCARDED),
502 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_UNEXPECTED_SC),
503 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_SC_OVERRUN),
504 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_SPLIT_REQUEST_DELAYED),
505 ((secstatus >> 6) & 7));
506 status = get_conf_long(d, where + PCI_PCIX_BRIDGE_STATUS);
507 printf("\t\tStatus: Bus=%u Dev=%u Func=%u 64bit%c 133MHz%c SCD%c USC%c, SCO%c, SRD%c\n",
508 ((status >> 8) & 0xff), // bus
509 ((status >> 3) & 0x1f), // dev
510 (status & PCI_PCIX_BRIDGE_STATUS_FUNCTION), // function
511 FLAG(status, PCI_PCIX_BRIDGE_STATUS_64BIT),
512 FLAG(status, PCI_PCIX_BRIDGE_STATUS_133MHZ),
513 FLAG(status, PCI_PCIX_BRIDGE_STATUS_SC_DISCARDED),
514 FLAG(status, PCI_PCIX_BRIDGE_STATUS_UNEXPECTED_SC),
515 FLAG(status, PCI_PCIX_BRIDGE_STATUS_SC_OVERRUN),
516 FLAG(status, PCI_PCIX_BRIDGE_STATUS_SPLIT_REQUEST_DELAYED));
517 upstcr = get_conf_long(d, where + PCI_PCIX_BRIDGE_UPSTREAM_SPLIT_TRANS_CTRL);
518 printf("\t\t: Upstream: Capacity=%u, Commitment Limit=%u\n",
519 (upstcr & PCI_PCIX_BRIDGE_STR_CAPACITY),
520 (upstcr >> 16) & 0xffff);
521 downstcr = get_conf_long(d, where + PCI_PCIX_BRIDGE_DOWNSTREAM_SPLIT_TRANS_CTRL);
522 printf("\t\t: Downstream: Capacity=%u, Commitment Limit=%u\n",
523 (downstcr & PCI_PCIX_BRIDGE_STR_CAPACITY),
524 (downstcr >> 16) & 0xffff);
528 show_pcix(struct device *d, int where)
530 switch (d->dev->hdrtype)
532 case PCI_HEADER_TYPE_NORMAL:
533 show_pcix_nobridge(d, where);
535 case PCI_HEADER_TYPE_BRIDGE:
536 show_pcix_bridge(d, where);
542 show_rom(struct device *d)
544 struct pci_dev *p = d->dev;
545 pciaddr_t rom = p->rom_base_addr;
546 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->rom_size : 0;
550 printf("\tExpansion ROM at ");
551 if (rom & PCI_ROM_ADDRESS_MASK)
552 printf(ADDR_FORMAT, rom & PCI_ROM_ADDRESS_MASK);
554 printf("<unassigned>");
555 if (!(rom & PCI_ROM_ADDRESS_ENABLE))
556 printf(" [disabled]");
562 show_msi(struct device *d, int where, int cap)
568 printf("Message Signalled Interrupts: 64bit%c Queue=%d/%d Enable%c\n",
569 FLAG(cap, PCI_MSI_FLAGS_64BIT),
570 (cap & PCI_MSI_FLAGS_QSIZE) >> 4,
571 (cap & PCI_MSI_FLAGS_QMASK) >> 1,
572 FLAG(cap, PCI_MSI_FLAGS_ENABLE));
575 is64 = cap & PCI_MSI_FLAGS_64BIT;
576 config_fetch(d, where + PCI_MSI_ADDRESS_LO, (is64 ? PCI_MSI_DATA_64 : PCI_MSI_DATA_32) + 2 - PCI_MSI_ADDRESS_LO);
577 printf("\t\tAddress: ");
580 t = get_conf_long(d, where + PCI_MSI_ADDRESS_HI);
581 w = get_conf_word(d, where + PCI_MSI_DATA_64);
585 w = get_conf_word(d, where + PCI_MSI_DATA_32);
586 t = get_conf_long(d, where + PCI_MSI_ADDRESS_LO);
587 printf("%08x Data: %04x\n", t, w);
593 int esr = cap & 0xff;
596 printf("Slot ID: %d slots, First%c, chassis %02x\n",
597 esr & PCI_SID_ESR_NSLOTS,
598 FLAG(esr, PCI_SID_ESR_FIC),
603 show_caps(struct device *d)
605 if (get_conf_word(d, PCI_STATUS) & PCI_STATUS_CAP_LIST)
607 int where = get_conf_byte(d, PCI_CAPABILITY_LIST) & ~3;
611 printf("\tCapabilities: ");
612 if (!config_fetch(d, where, 4))
614 puts("<available only to root>");
617 id = get_conf_byte(d, where + PCI_CAP_LIST_ID);
618 next = get_conf_byte(d, where + PCI_CAP_LIST_NEXT) & ~3;
619 cap = get_conf_word(d, where + PCI_CAP_FLAGS);
620 printf("[%02x] ", where);
623 printf("<chain broken>\n");
629 show_pm(d, where, cap);
632 show_agp(d, where, cap);
635 printf("Vital Product Data\n");
637 case PCI_CAP_ID_SLOTID:
641 show_msi(d, where, cap);
643 case PCI_CAP_ID_PCIX:
647 printf("#%02x [%04x]\n", id, cap);
655 show_htype0(struct device *d)
663 show_htype1(struct device *d)
665 u32 io_base = get_conf_byte(d, PCI_IO_BASE);
666 u32 io_limit = get_conf_byte(d, PCI_IO_LIMIT);
667 u32 io_type = io_base & PCI_IO_RANGE_TYPE_MASK;
668 u32 mem_base = get_conf_word(d, PCI_MEMORY_BASE);
669 u32 mem_limit = get_conf_word(d, PCI_MEMORY_LIMIT);
670 u32 mem_type = mem_base & PCI_MEMORY_RANGE_TYPE_MASK;
671 u32 pref_base = get_conf_word(d, PCI_PREF_MEMORY_BASE);
672 u32 pref_limit = get_conf_word(d, PCI_PREF_MEMORY_LIMIT);
673 u32 pref_type = pref_base & PCI_PREF_RANGE_TYPE_MASK;
674 word brc = get_conf_word(d, PCI_BRIDGE_CONTROL);
675 int verb = verbose > 2;
678 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
679 get_conf_byte(d, PCI_PRIMARY_BUS),
680 get_conf_byte(d, PCI_SECONDARY_BUS),
681 get_conf_byte(d, PCI_SUBORDINATE_BUS),
682 get_conf_byte(d, PCI_SEC_LATENCY_TIMER));
684 if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) ||
685 (io_type != PCI_IO_RANGE_TYPE_16 && io_type != PCI_IO_RANGE_TYPE_32))
686 printf("\t!!! Unknown I/O range types %x/%x\n", io_base, io_limit);
689 io_base = (io_base & PCI_IO_RANGE_MASK) << 8;
690 io_limit = (io_limit & PCI_IO_RANGE_MASK) << 8;
691 if (io_type == PCI_IO_RANGE_TYPE_32)
693 io_base |= (get_conf_word(d, PCI_IO_BASE_UPPER16) << 16);
694 io_limit |= (get_conf_word(d, PCI_IO_LIMIT_UPPER16) << 16);
696 if (io_base <= io_limit || verb)
697 printf("\tI/O behind bridge: %08x-%08x\n", io_base, io_limit+0xfff);
700 if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) ||
702 printf("\t!!! Unknown memory range types %x/%x\n", mem_base, mem_limit);
705 mem_base = (mem_base & PCI_MEMORY_RANGE_MASK) << 16;
706 mem_limit = (mem_limit & PCI_MEMORY_RANGE_MASK) << 16;
707 if (mem_base <= mem_limit || verb)
708 printf("\tMemory behind bridge: %08x-%08x\n", mem_base, mem_limit + 0xfffff);
711 if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) ||
712 (pref_type != PCI_PREF_RANGE_TYPE_32 && pref_type != PCI_PREF_RANGE_TYPE_64))
713 printf("\t!!! Unknown prefetchable memory range types %x/%x\n", pref_base, pref_limit);
716 pref_base = (pref_base & PCI_PREF_RANGE_MASK) << 16;
717 pref_limit = (pref_limit & PCI_PREF_RANGE_MASK) << 16;
718 if (pref_base <= pref_limit || verb)
720 if (pref_type == PCI_PREF_RANGE_TYPE_32)
721 printf("\tPrefetchable memory behind bridge: %08x-%08x\n", pref_base, pref_limit + 0xfffff);
723 printf("\tPrefetchable memory behind bridge: %08x%08x-%08x%08x\n",
724 get_conf_long(d, PCI_PREF_BASE_UPPER32),
726 get_conf_long(d, PCI_PREF_LIMIT_UPPER32),
731 if (get_conf_word(d, PCI_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
732 printf("\tSecondary status: SERR\n");
737 printf("\tBridgeCtl: Parity%c SERR%c NoISA%c VGA%c MAbort%c >Reset%c FastB2B%c\n",
738 FLAG(brc, PCI_BRIDGE_CTL_PARITY),
739 FLAG(brc, PCI_BRIDGE_CTL_SERR),
740 FLAG(brc, PCI_BRIDGE_CTL_NO_ISA),
741 FLAG(brc, PCI_BRIDGE_CTL_VGA),
742 FLAG(brc, PCI_BRIDGE_CTL_MASTER_ABORT),
743 FLAG(brc, PCI_BRIDGE_CTL_BUS_RESET),
744 FLAG(brc, PCI_BRIDGE_CTL_FAST_BACK));
750 show_htype2(struct device *d)
753 word cmd = get_conf_word(d, PCI_COMMAND);
754 word brc = get_conf_word(d, PCI_CB_BRIDGE_CONTROL);
755 word exca = get_conf_word(d, PCI_CB_LEGACY_MODE_BASE);
756 int verb = verbose > 2;
759 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
760 get_conf_byte(d, PCI_CB_PRIMARY_BUS),
761 get_conf_byte(d, PCI_CB_CARD_BUS),
762 get_conf_byte(d, PCI_CB_SUBORDINATE_BUS),
763 get_conf_byte(d, PCI_CB_LATENCY_TIMER));
767 u32 base = get_conf_long(d, PCI_CB_MEMORY_BASE_0 + p);
768 u32 limit = get_conf_long(d, PCI_CB_MEMORY_LIMIT_0 + p);
769 if (limit > base || verb)
770 printf("\tMemory window %d: %08x-%08x%s%s\n", i, base, limit,
771 (cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]",
772 (brc & (PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 << i)) ? " (prefetchable)" : "");
777 u32 base = get_conf_long(d, PCI_CB_IO_BASE_0 + p);
778 u32 limit = get_conf_long(d, PCI_CB_IO_LIMIT_0 + p);
779 if (!(base & PCI_IO_RANGE_TYPE_32))
784 base &= PCI_CB_IO_RANGE_MASK;
785 limit = (limit & PCI_CB_IO_RANGE_MASK) + 3;
786 if (base <= limit || verb)
787 printf("\tI/O window %d: %08x-%08x%s\n", i, base, limit,
788 (cmd & PCI_COMMAND_IO) ? "" : " [disabled]");
791 if (get_conf_word(d, PCI_CB_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
792 printf("\tSecondary status: SERR\n");
794 printf("\tBridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c\n",
795 FLAG(brc, PCI_CB_BRIDGE_CTL_PARITY),
796 FLAG(brc, PCI_CB_BRIDGE_CTL_SERR),
797 FLAG(brc, PCI_CB_BRIDGE_CTL_ISA),
798 FLAG(brc, PCI_CB_BRIDGE_CTL_VGA),
799 FLAG(brc, PCI_CB_BRIDGE_CTL_MASTER_ABORT),
800 FLAG(brc, PCI_CB_BRIDGE_CTL_CB_RESET),
801 FLAG(brc, PCI_CB_BRIDGE_CTL_16BIT_INT),
802 FLAG(brc, PCI_CB_BRIDGE_CTL_POST_WRITES));
804 printf("\t16-bit legacy interface ports at %04x\n", exca);
808 show_verbose(struct device *d)
810 struct pci_dev *p = d->dev;
811 word status = get_conf_word(d, PCI_STATUS);
812 word cmd = get_conf_word(d, PCI_COMMAND);
813 word class = get_conf_word(d, PCI_CLASS_DEVICE);
814 byte bist = get_conf_byte(d, PCI_BIST);
815 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
816 byte latency = get_conf_byte(d, PCI_LATENCY_TIMER);
817 byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE);
818 byte max_lat, min_gnt;
819 byte int_pin = get_conf_byte(d, PCI_INTERRUPT_PIN);
820 unsigned int irq = p->irq;
821 word subsys_v, subsys_d;
828 case PCI_HEADER_TYPE_NORMAL:
829 if (class == PCI_CLASS_BRIDGE_PCI)
830 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
831 max_lat = get_conf_byte(d, PCI_MAX_LAT);
832 min_gnt = get_conf_byte(d, PCI_MIN_GNT);
833 subsys_v = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
834 subsys_d = get_conf_word(d, PCI_SUBSYSTEM_ID);
836 case PCI_HEADER_TYPE_BRIDGE:
837 if (class != PCI_CLASS_BRIDGE_PCI)
838 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
839 irq = int_pin = min_gnt = max_lat = 0;
840 subsys_v = subsys_d = 0;
842 case PCI_HEADER_TYPE_CARDBUS:
843 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
844 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
845 min_gnt = max_lat = 0;
846 subsys_v = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
847 subsys_d = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
850 printf("\t!!! Unknown header type %02x\n", htype);
854 if (subsys_v && subsys_v != 0xffff)
855 printf("\tSubsystem: %s\n",
856 pci_lookup_name(pacc, ssnamebuf, sizeof(ssnamebuf),
857 PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
858 p->vendor_id, p->device_id, subsys_v, subsys_d));
862 printf("\tControl: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c\n",
863 FLAG(cmd, PCI_COMMAND_IO),
864 FLAG(cmd, PCI_COMMAND_MEMORY),
865 FLAG(cmd, PCI_COMMAND_MASTER),
866 FLAG(cmd, PCI_COMMAND_SPECIAL),
867 FLAG(cmd, PCI_COMMAND_INVALIDATE),
868 FLAG(cmd, PCI_COMMAND_VGA_PALETTE),
869 FLAG(cmd, PCI_COMMAND_PARITY),
870 FLAG(cmd, PCI_COMMAND_WAIT),
871 FLAG(cmd, PCI_COMMAND_SERR),
872 FLAG(cmd, PCI_COMMAND_FAST_BACK));
873 printf("\tStatus: Cap%c 66Mhz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c >SERR%c <PERR%c\n",
874 FLAG(status, PCI_STATUS_CAP_LIST),
875 FLAG(status, PCI_STATUS_66MHZ),
876 FLAG(status, PCI_STATUS_UDF),
877 FLAG(status, PCI_STATUS_FAST_BACK),
878 FLAG(status, PCI_STATUS_PARITY),
879 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
880 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
881 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
882 FLAG(status, PCI_STATUS_SIG_TARGET_ABORT),
883 FLAG(status, PCI_STATUS_REC_TARGET_ABORT),
884 FLAG(status, PCI_STATUS_REC_MASTER_ABORT),
885 FLAG(status, PCI_STATUS_SIG_SYSTEM_ERROR),
886 FLAG(status, PCI_STATUS_DETECTED_PARITY));
887 if (cmd & PCI_COMMAND_MASTER)
889 printf("\tLatency: %d", latency);
890 if (min_gnt || max_lat)
894 printf("%dns min", min_gnt*250);
895 if (min_gnt && max_lat)
898 printf("%dns max", max_lat*250);
902 printf(", cache line size %02x", cache_line);
906 printf("\tInterrupt: pin %c routed to IRQ " IRQ_FORMAT "\n",
907 (int_pin ? 'A' + int_pin - 1 : '?'), irq);
912 if (cmd & PCI_COMMAND_MASTER)
913 printf("bus master, ");
914 if (cmd & PCI_COMMAND_VGA_PALETTE)
915 printf("VGA palette snoop, ");
916 if (cmd & PCI_COMMAND_WAIT)
917 printf("stepping, ");
918 if (cmd & PCI_COMMAND_FAST_BACK)
919 printf("fast Back2Back, ");
920 if (status & PCI_STATUS_66MHZ)
922 if (status & PCI_STATUS_UDF)
923 printf("user-definable features, ");
925 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
926 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
927 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??");
928 if (cmd & PCI_COMMAND_MASTER)
929 printf(", latency %d", latency);
931 printf(", IRQ " IRQ_FORMAT, irq);
935 if (bist & PCI_BIST_CAPABLE)
937 if (bist & PCI_BIST_START)
938 printf("\tBIST is running\n");
940 printf("\tBIST result: %02x\n", bist & PCI_BIST_CODE_MASK);
945 case PCI_HEADER_TYPE_NORMAL:
948 case PCI_HEADER_TYPE_BRIDGE:
951 case PCI_HEADER_TYPE_CARDBUS:
958 show_hex_dump(struct device *d)
962 for(i=0; i<d->config_cnt; i++)
966 printf(" %02x", get_conf_byte(d, i));
973 show_machine(struct device *d)
975 struct pci_dev *p = d->dev;
977 word sv_id=0, sd_id=0;
978 char classbuf[128], vendbuf[128], devbuf[128], svbuf[128], sdbuf[128];
980 switch (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f)
982 case PCI_HEADER_TYPE_NORMAL:
983 sv_id = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
984 sd_id = get_conf_word(d, PCI_SUBSYSTEM_ID);
986 case PCI_HEADER_TYPE_CARDBUS:
987 sv_id = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
988 sd_id = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
994 printf("Device:\t%02x:%02x.%x\n", p->bus, p->dev, p->func);
995 printf("Class:\t%s\n",
996 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, get_conf_word(d, PCI_CLASS_DEVICE), 0, 0, 0));
997 printf("Vendor:\t%s\n",
998 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id, 0, 0));
999 printf("Device:\t%s\n",
1000 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, 0, 0));
1001 if (sv_id && sv_id != 0xffff)
1003 printf("SVendor:\t%s\n",
1004 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id, sv_id, sd_id));
1005 printf("SDevice:\t%s\n",
1006 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
1008 if (c = get_conf_byte(d, PCI_REVISION_ID))
1009 printf("Rev:\t%02x\n", c);
1010 if (c = get_conf_byte(d, PCI_CLASS_PROG))
1011 printf("ProgIf:\t%02x\n", c);
1015 printf("%02x:%02x.%x ", p->bus, p->dev, p->func);
1016 printf("\"%s\" \"%s\" \"%s\"",
1017 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS,
1018 get_conf_word(d, PCI_CLASS_DEVICE), 0, 0, 0),
1019 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR,
1020 p->vendor_id, p->device_id, 0, 0),
1021 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE,
1022 p->vendor_id, p->device_id, 0, 0));
1023 if (c = get_conf_byte(d, PCI_REVISION_ID))
1024 printf(" -r%02x", c);
1025 if (c = get_conf_byte(d, PCI_CLASS_PROG))
1026 printf(" -p%02x", c);
1027 if (sv_id && sv_id != 0xffff)
1028 printf(" \"%s\" \"%s\"",
1029 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id, sv_id, sd_id),
1030 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
1032 printf(" \"\" \"\"");
1038 show_device(struct device *d)
1040 if (machine_readable)
1048 if (verbose || show_hex)
1057 for(d=first_dev; d; d=d->next)
1064 struct bridge *chain; /* Single-linked list of bridges */
1065 struct bridge *next, *child; /* Tree of bridges */
1066 struct bus *first_bus; /* List of busses connected to this bridge */
1067 unsigned int primary, secondary, subordinate; /* Bus numbers */
1068 struct device *br_dev;
1072 unsigned int number;
1073 struct bus *sibling;
1074 struct device *first_dev, **last_dev;
1077 static struct bridge host_bridge = { NULL, NULL, NULL, NULL, ~0, 0, ~0, NULL };
1080 find_bus(struct bridge *b, unsigned int n)
1084 for(bus=b->first_bus; bus; bus=bus->sibling)
1085 if (bus->number == n)
1091 new_bus(struct bridge *b, unsigned int n)
1093 struct bus *bus = xmalloc(sizeof(struct bus));
1095 bus = xmalloc(sizeof(struct bus));
1097 bus->sibling = b->first_bus;
1098 bus->first_dev = NULL;
1099 bus->last_dev = &bus->first_dev;
1105 insert_dev(struct device *d, struct bridge *b)
1107 struct pci_dev *p = d->dev;
1110 if (! (bus = find_bus(b, p->bus)))
1113 for(c=b->child; c; c=c->next)
1114 if (c->secondary <= p->bus && p->bus <= c->subordinate)
1119 bus = new_bus(b, p->bus);
1121 /* Simple insertion at the end _does_ guarantee the correct order as the
1122 * original device list was sorted by (bus, devfn) lexicographically
1123 * and all devices on the new list have the same bus number.
1126 bus->last_dev = &d->next;
1133 struct device *d, *d2;
1134 struct bridge **last_br, *b;
1136 /* Build list of bridges */
1138 last_br = &host_bridge.chain;
1139 for(d=first_dev; d; d=d->next)
1141 word class = get_conf_word(d, PCI_CLASS_DEVICE);
1142 byte ht = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
1143 if (class == PCI_CLASS_BRIDGE_PCI &&
1144 (ht == PCI_HEADER_TYPE_BRIDGE || ht == PCI_HEADER_TYPE_CARDBUS))
1146 b = xmalloc(sizeof(struct bridge));
1147 if (ht == PCI_HEADER_TYPE_BRIDGE)
1149 b->primary = get_conf_byte(d, PCI_CB_PRIMARY_BUS);
1150 b->secondary = get_conf_byte(d, PCI_CB_CARD_BUS);
1151 b->subordinate = get_conf_byte(d, PCI_CB_SUBORDINATE_BUS);
1155 b->primary = get_conf_byte(d, PCI_PRIMARY_BUS);
1156 b->secondary = get_conf_byte(d, PCI_SECONDARY_BUS);
1157 b->subordinate = get_conf_byte(d, PCI_SUBORDINATE_BUS);
1160 last_br = &b->chain;
1161 b->next = b->child = NULL;
1162 b->first_bus = NULL;
1168 /* Create a bridge tree */
1170 for(b=&host_bridge; b; b=b->chain)
1172 struct bridge *c, *best;
1174 for(c=&host_bridge; c; c=c->chain)
1175 if (c != b && b->primary >= c->secondary && b->primary <= c->subordinate &&
1176 (!best || best->subordinate - best->primary > c->subordinate - c->primary))
1180 b->next = best->child;
1185 /* Insert secondary bus for each bridge */
1187 for(b=&host_bridge; b; b=b->chain)
1188 if (!find_bus(b, b->secondary))
1189 new_bus(b, b->secondary);
1191 /* Create bus structs and link devices */
1193 for(d=first_dev; d;)
1196 insert_dev(d, &host_bridge);
1202 print_it(byte *line, byte *p)
1206 fputs(line, stdout);
1207 for(p=line; *p; p++)
1208 if (*p == '+' || *p == '|')
1214 static void show_tree_bridge(struct bridge *, byte *, byte *);
1217 show_tree_dev(struct device *d, byte *line, byte *p)
1219 struct pci_dev *q = d->dev;
1223 p += sprintf(p, "%02x.%x", q->dev, q->func);
1224 for(b=&host_bridge; b; b=b->chain)
1227 if (b->secondary == b->subordinate)
1228 p += sprintf(p, "-[%02x]-", b->secondary);
1230 p += sprintf(p, "-[%02x-%02x]-", b->secondary, b->subordinate);
1231 show_tree_bridge(b, line, p);
1235 p += sprintf(p, " %s",
1236 pci_lookup_name(pacc, namebuf, sizeof(namebuf),
1237 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
1238 q->vendor_id, q->device_id, 0, 0));
1243 show_tree_bus(struct bus *b, byte *line, byte *p)
1247 else if (!b->first_dev->next)
1251 show_tree_dev(b->first_dev, line, p);
1255 struct device *d = b->first_dev;
1260 show_tree_dev(d, line, p+2);
1265 show_tree_dev(d, line, p+2);
1270 show_tree_bridge(struct bridge *b, byte *line, byte *p)
1273 if (!b->first_bus->sibling)
1275 if (b == &host_bridge)
1276 p += sprintf(p, "[%02x]-", b->first_bus->number);
1277 show_tree_bus(b->first_bus, line, p);
1281 struct bus *u = b->first_bus;
1286 k = p + sprintf(p, "+-[%02x]-", u->number);
1287 show_tree_bus(u, line, k);
1290 k = p + sprintf(p, "\\-[%02x]-", u->number);
1291 show_tree_bus(u, line, k);
1301 show_tree_bridge(&host_bridge, line, line);
1304 /* Bus mapping mode */
1307 struct bus_bridge *next;
1308 byte this, dev, func, first, last, bug;
1314 struct bus_bridge *bridges, *via;
1317 static struct bus_info *bus_info;
1320 map_bridge(struct bus_info *bi, struct device *d, int np, int ns, int nl)
1322 struct bus_bridge *b = xmalloc(sizeof(struct bus_bridge));
1323 struct pci_dev *p = d->dev;
1325 b->next = bi->bridges;
1327 b->this = get_conf_byte(d, np);
1330 b->first = get_conf_byte(d, ns);
1331 b->last = get_conf_byte(d, nl);
1332 printf("## %02x.%02x:%d is a bridge from %02x to %02x-%02x\n",
1333 p->bus, p->dev, p->func, b->this, b->first, b->last);
1334 if (b->this != p->bus)
1335 printf("!!! Bridge points to invalid primary bus.\n");
1336 if (b->first > b->last)
1338 printf("!!! Bridge points to invalid bus range.\n");
1347 int verbose = pacc->debugging;
1348 struct bus_info *bi = bus_info + bus;
1352 printf("Mapping bus %02x\n", bus);
1353 for(dev = 0; dev < 32; dev++)
1354 if (filter.slot < 0 || filter.slot == dev)
1357 for(func = 0; func < func_limit; func++)
1358 if (filter.func < 0 || filter.func == func)
1360 struct pci_dev *p = pci_get_dev(pacc, bus, dev, func);
1361 u16 vendor = pci_read_word(p, PCI_VENDOR_ID);
1362 if (vendor && vendor != 0xffff)
1364 if (!func && (pci_read_byte(p, PCI_HEADER_TYPE) & 0x80))
1367 printf("Discovered device %02x:%02x.%d\n", bus, dev, func);
1369 if (d = scan_device(p))
1372 switch (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f)
1374 case PCI_HEADER_TYPE_BRIDGE:
1375 map_bridge(bi, d, PCI_PRIMARY_BUS, PCI_SECONDARY_BUS, PCI_SUBORDINATE_BUS);
1377 case PCI_HEADER_TYPE_CARDBUS:
1378 map_bridge(bi, d, PCI_CB_PRIMARY_BUS, PCI_CB_CARD_BUS, PCI_CB_SUBORDINATE_BUS);
1384 printf("But it was filtered out.\n");
1392 do_map_bridges(int bus, int min, int max)
1394 struct bus_info *bi = bus_info + bus;
1395 struct bus_bridge *b;
1398 for(b=bi->bridges; b; b=b->next)
1400 if (bus_info[b->first].guestbook)
1402 else if (b->first < min || b->last > max)
1406 bus_info[b->first].via = b;
1407 do_map_bridges(b->first, b->first, b->last);
1417 printf("\nSummary of buses:\n\n");
1418 for(i=0; i<256; i++)
1419 if (bus_info[i].exists && !bus_info[i].guestbook)
1420 do_map_bridges(i, 0, 255);
1421 for(i=0; i<256; i++)
1423 struct bus_info *bi = bus_info + i;
1424 struct bus_bridge *b = bi->via;
1428 printf("%02x: ", i);
1430 printf("Entered via %02x:%02x.%d\n", b->this, b->dev, b->func);
1432 printf("Primary host bus\n");
1434 printf("Secondary host bus (?)\n");
1436 for(b=bi->bridges; b; b=b->next)
1438 printf("\t%02x.%d Bridge to %02x-%02x", b->dev, b->func, b->first, b->last);
1442 printf(" <overlap bug>");
1445 printf(" <crossing bug>");
1456 if (pacc->method == PCI_ACCESS_PROC_BUS_PCI ||
1457 pacc->method == PCI_ACCESS_DUMP)
1458 printf("WARNING: Bus mapping can be reliable only with direct hardware access enabled.\n\n");
1459 else if (!check_root())
1460 die("Only root can map the bus.");
1461 bus_info = xmalloc(sizeof(struct bus_info) * 256);
1462 bzero(bus_info, sizeof(struct bus_info) * 256);
1463 if (filter.bus >= 0)
1464 do_map_bus(filter.bus);
1468 for(bus=0; bus<256; bus++)
1477 main(int argc, char **argv)
1482 if (argc == 2 && !strcmp(argv[1], "--version"))
1484 puts("lspci version " PCIUTILS_VERSION);
1490 pci_filter_init(pacc, &filter);
1492 while ((i = getopt(argc, argv, options)) != -1)
1496 pacc->numeric_ids = 1;
1502 pacc->buscentric = 1;
1503 buscentric_view = 1;
1506 if (msg = pci_filter_parse_slot(&filter, optarg))
1510 if (msg = pci_filter_parse_id(&filter, optarg))
1520 pacc->id_file_name = optarg;
1529 if (parse_generic_option(i, pacc, optarg))
1532 fprintf(stderr, help_msg, pacc->id_file_name);