2 * The PCI Utilities -- List All PCI Devices
4 * Copyright (c) 1997--2020 Martin Mares <mj@ucw.cz>
6 * Can be freely distributed and used under the terms of the GNU GPL.
18 int verbose; /* Show detailed information */
19 static int opt_hex; /* Show contents of config space as hexadecimal numbers */
20 struct pci_filter filter; /* Device filter */
21 static int opt_filter; /* Any filter was given */
22 static int opt_tree; /* Show bus tree */
23 static int opt_path; /* Show bridge path */
24 static int opt_machine; /* Generate machine-readable output */
25 static int opt_map_mode; /* Bus mapping mode enabled */
26 static int opt_domains; /* Show domain numbers (0=disabled, 1=auto-detected, 2=requested) */
27 static int opt_kernel; /* Show kernel drivers */
28 static int opt_query_dns; /* Query the DNS (0=disabled, 1=enabled, 2=refresh cache) */
29 static int opt_query_all; /* Query the DNS for all entries */
30 char *opt_pcimap; /* Override path to Linux modules.pcimap */
32 const char program_name[] = "lspci";
34 static char options[] = "nvbxs:d:tPi:mgp:qkMDQ" GENERIC_OPTIONS ;
36 static char help_msg[] =
37 "Usage: lspci [<switches>]\n"
39 "Basic display modes:\n"
40 "-mm\t\tProduce machine-readable output (single -m for an obsolete format)\n"
41 "-t\t\tShow bus tree\n"
44 "-v\t\tBe verbose (-vv or -vvv for higher verbosity)\n"
46 "-k\t\tShow kernel drivers handling each device\n"
48 "-x\t\tShow hex-dump of the standard part of the config space\n"
49 "-xxx\t\tShow hex-dump of the whole config space (dangerous; root only)\n"
50 "-xxxx\t\tShow hex-dump of the 4096-byte extended config space (root only)\n"
51 "-b\t\tBus-centric view (addresses and IRQ's as seen by the bus)\n"
52 "-D\t\tAlways show domain numbers\n"
53 "-P\t\tDisplay bridge path in addition to bus and device number\n"
54 "-PP\t\tDisplay bus path in addition to bus and device number\n"
56 "Resolving of device ID's to names:\n"
57 "-n\t\tShow numeric ID's\n"
58 "-nn\t\tShow both textual and numeric ID's (names & numbers)\n"
60 "-q\t\tQuery the PCI ID database for unknown ID's via DNS\n"
61 "-qq\t\tAs above, but re-query locally cached entries\n"
62 "-Q\t\tQuery the PCI ID database for all ID's via DNS\n"
65 "Selection of devices:\n"
66 "-s [[[[<domain>]:]<bus>]:][<slot>][.[<func>]]\tShow only devices in selected slots\n"
67 "-d [<vendor>]:[<device>][:<class>]\t\tShow only devices with specified ID's\n"
70 "-i <file>\tUse specified ID database instead of %s\n"
72 "-p <file>\tLook up kernel modules in a given file instead of default modules.pcimap\n"
74 "-M\t\tEnable `bus mapping' mode (dangerous; root only)\n"
76 "PCI access options:\n"
80 /*** Our view of the PCI bus ***/
82 struct pci_access *pacc;
83 struct device *first_dev;
84 static int seen_errors;
85 static int need_topology;
88 config_fetch(struct device *d, unsigned int pos, unsigned int len)
90 unsigned int end = pos+len;
93 while (pos < d->config_bufsize && len && d->present[pos])
95 while (pos+len <= d->config_bufsize && len && d->present[pos+len-1])
100 if (end > d->config_bufsize)
102 int orig_size = d->config_bufsize;
103 while (end > d->config_bufsize)
104 d->config_bufsize *= 2;
105 d->config = xrealloc(d->config, d->config_bufsize);
106 d->present = xrealloc(d->present, d->config_bufsize);
107 memset(d->present + orig_size, 0, d->config_bufsize - orig_size);
109 result = pci_read_block(d->dev, pos, d->config + pos, len);
111 memset(d->present + pos, 1, len);
116 scan_device(struct pci_dev *p)
120 if (p->domain && !opt_domains)
122 if (!pci_filter_match(&filter, p) && !need_topology)
124 d = xmalloc(sizeof(struct device));
125 memset(d, 0, sizeof(*d));
127 d->config_cached = d->config_bufsize = 64;
128 d->config = xmalloc(64);
129 d->present = xmalloc(64);
130 memset(d->present, 1, 64);
131 if (!pci_read_block(p, 0, d->config, 64))
133 fprintf(stderr, "lspci: Unable to read the standard configuration space header of device %04x:%02x:%02x.%d\n",
134 p->domain, p->bus, p->dev, p->func);
138 if ((d->config[PCI_HEADER_TYPE] & 0x7f) == PCI_HEADER_TYPE_CARDBUS)
140 /* For cardbus bridges, we need to fetch 64 bytes more to get the
141 * full standard header... */
142 if (config_fetch(d, 64, 64))
143 d->config_cached += 64;
145 pci_setup_cache(p, d->config, d->config_cached);
146 pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_CLASS);
157 for (p=pacc->devices; p; p=p->next)
158 if (d = scan_device(p))
165 /*** Config space accesses ***/
168 check_conf_range(struct device *d, unsigned int pos, unsigned int len)
171 if (!d->present[pos])
172 die("Internal bug: Accessing non-read configuration byte at position %x", pos);
178 get_conf_byte(struct device *d, unsigned int pos)
180 check_conf_range(d, pos, 1);
181 return d->config[pos];
185 get_conf_word(struct device *d, unsigned int pos)
187 check_conf_range(d, pos, 2);
188 return d->config[pos] | (d->config[pos+1] << 8);
192 get_conf_long(struct device *d, unsigned int pos)
194 check_conf_range(d, pos, 4);
195 return d->config[pos] |
196 (d->config[pos+1] << 8) |
197 (d->config[pos+2] << 16) |
198 (d->config[pos+3] << 24);
204 compare_them(const void *A, const void *B)
206 const struct pci_dev *a = (*(const struct device **)A)->dev;
207 const struct pci_dev *b = (*(const struct device **)B)->dev;
209 if (a->domain < b->domain)
211 if (a->domain > b->domain)
221 if (a->func < b->func)
223 if (a->func > b->func)
231 struct device **index, **h, **last_dev;
236 for (d=first_dev; d; d=d->next)
238 h = index = alloca(sizeof(struct device *) * cnt);
239 for (d=first_dev; d; d=d->next)
241 qsort(index, cnt, sizeof(struct device *), compare_them);
242 last_dev = &first_dev;
247 last_dev = &(*h)->next;
253 /*** Normal output ***/
256 show_slot_path(struct device *d)
258 struct pci_dev *p = d->dev;
262 struct bus *bus = d->parent_bus;
263 struct bridge *br = bus->parent_bridge;
265 if (br && br->br_dev)
267 show_slot_path(br->br_dev);
269 printf("/%02x:%02x.%d", p->bus, p->dev, p->func);
271 printf("/%02x.%d", p->dev, p->func);
275 printf("%02x:%02x.%d", p->bus, p->dev, p->func);
279 show_slot_name(struct device *d)
281 struct pci_dev *p = d->dev;
283 if (!opt_machine ? opt_domains : (p->domain || opt_domains >= 2))
284 printf("%04x:", p->domain);
289 get_subid(struct device *d, word *subvp, word *subdp)
291 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
293 if (htype == PCI_HEADER_TYPE_NORMAL)
295 *subvp = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
296 *subdp = get_conf_word(d, PCI_SUBSYSTEM_ID);
298 else if (htype == PCI_HEADER_TYPE_CARDBUS && d->config_cached >= 128)
300 *subvp = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
301 *subdp = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
304 *subvp = *subdp = 0xffff;
308 show_terse(struct device *d)
311 struct pci_dev *p = d->dev;
312 char classbuf[128], devbuf[128];
316 pci_lookup_name(pacc, classbuf, sizeof(classbuf),
319 pci_lookup_name(pacc, devbuf, sizeof(devbuf),
320 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
321 p->vendor_id, p->device_id));
322 if (c = get_conf_byte(d, PCI_REVISION_ID))
323 printf(" (rev %02x)", c);
327 c = get_conf_byte(d, PCI_CLASS_PROG);
328 x = pci_lookup_name(pacc, devbuf, sizeof(devbuf),
329 PCI_LOOKUP_PROGIF | PCI_LOOKUP_NO_NUMBERS,
333 printf(" (prog-if %02x", c);
341 if (verbose || opt_kernel)
343 word subsys_v, subsys_d;
346 pci_fill_info(p, PCI_FILL_LABEL);
349 printf("\tDeviceName: %s", p->label);
350 get_subid(d, &subsys_v, &subsys_d);
351 if (subsys_v && subsys_v != 0xffff)
352 printf("\tSubsystem: %s\n",
353 pci_lookup_name(pacc, ssnamebuf, sizeof(ssnamebuf),
354 PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
355 p->vendor_id, p->device_id, subsys_v, subsys_d));
359 /*** Verbose output ***/
364 static const char suffix[][2] = { "", "K", "M", "G", "T" };
368 for (i = 0; i < (sizeof(suffix) / sizeof(*suffix) - 1); i++) {
373 printf(" [size=%u%s]", (unsigned)x, suffix[i]);
377 show_range(char *prefix, u64 base, u64 limit, int bits, int disabled)
379 printf("%s:", prefix);
380 if (base <= limit || verbose > 2)
381 printf(" %0*" PCI_U64_FMT_X "-%0*" PCI_U64_FMT_X, (bits+3)/4, base, (bits+3)/4, limit);
382 if (!disabled && base <= limit)
383 show_size(limit - base + 1);
385 printf(" [disabled]");
386 printf(" [%d-bit]", bits);
391 show_bases(struct device *d, int cnt)
393 struct pci_dev *p = d->dev;
394 word cmd = get_conf_word(d, PCI_COMMAND);
398 for (i=0; i<cnt; i++)
400 pciaddr_t pos = p->base_addr[i];
401 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->size[i] : 0;
402 pciaddr_t ioflg = (p->known_fields & PCI_FILL_IO_FLAGS) ? p->flags[i] : 0;
403 u32 flg = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
408 if (flg == 0xffffffff)
410 if (!pos && !flg && !len)
414 printf("\tRegion %d: ", i);
418 /* Read address as seen by the hardware */
419 if (flg & PCI_BASE_ADDRESS_SPACE_IO)
420 hw_lower = flg & PCI_BASE_ADDRESS_IO_MASK;
423 hw_lower = flg & PCI_BASE_ADDRESS_MEM_MASK;
424 if ((flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == PCI_BASE_ADDRESS_MEM_TYPE_64)
431 hw_upper = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
436 /* Detect virtual regions, which are reported by the OS, but unassigned in the device */
437 if (pos && !hw_lower && !hw_upper && !(ioflg & PCI_IORESOURCE_PCI_EA_BEI))
443 /* Print base address */
444 if (flg & PCI_BASE_ADDRESS_SPACE_IO)
446 pciaddr_t a = pos & PCI_BASE_ADDRESS_IO_MASK;
447 printf("I/O ports at ");
448 if (a || (cmd & PCI_COMMAND_IO))
449 printf(PCIADDR_PORT_FMT, a);
453 printf("<unassigned>");
455 printf(" [virtual]");
456 else if (!(cmd & PCI_COMMAND_IO))
457 printf(" [disabled]");
461 int t = flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
462 pciaddr_t a = pos & PCI_ADDR_MEM_MASK;
464 printf("Memory at ");
466 printf("<broken-64-bit-slot>");
468 printf(PCIADDR_T_FMT, a);
469 else if (hw_lower || hw_upper)
472 printf("<unassigned>");
473 printf(" (%s, %sprefetchable)",
474 (t == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32-bit" :
475 (t == PCI_BASE_ADDRESS_MEM_TYPE_64) ? "64-bit" :
476 (t == PCI_BASE_ADDRESS_MEM_TYPE_1M) ? "low-1M" : "type 3",
477 (flg & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-");
479 printf(" [virtual]");
480 else if (!(cmd & PCI_COMMAND_MEMORY))
481 printf(" [disabled]");
484 if (ioflg & PCI_IORESOURCE_PCI_EA_BEI)
485 printf(" [enhanced]");
493 show_rom(struct device *d, int reg)
495 struct pci_dev *p = d->dev;
496 pciaddr_t rom = p->rom_base_addr;
497 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->rom_size : 0;
498 pciaddr_t ioflg = (p->known_fields & PCI_FILL_IO_FLAGS) ? p->rom_flags : 0;
499 u32 flg = get_conf_long(d, reg);
500 word cmd = get_conf_word(d, PCI_COMMAND);
503 if (!rom && !flg && !len)
506 if ((rom & PCI_ROM_ADDRESS_MASK) && !(flg & PCI_ROM_ADDRESS_MASK) && !(ioflg & PCI_IORESOURCE_PCI_EA_BEI))
512 printf("\tExpansion ROM at ");
513 if (rom & PCI_ROM_ADDRESS_MASK)
514 printf(PCIADDR_T_FMT, rom & PCI_ROM_ADDRESS_MASK);
515 else if (flg & PCI_ROM_ADDRESS_MASK)
518 printf("<unassigned>");
521 printf(" [virtual]");
523 if (!(flg & PCI_ROM_ADDRESS_ENABLE))
524 printf(" [disabled]");
525 else if (!virtual && !(cmd & PCI_COMMAND_MEMORY))
526 printf(" [disabled by cmd]");
528 if (ioflg & PCI_IORESOURCE_PCI_EA_BEI)
529 printf(" [enhanced]");
536 show_htype0(struct device *d)
539 show_rom(d, PCI_ROM_ADDRESS);
540 show_caps(d, PCI_CAPABILITY_LIST);
544 show_htype1(struct device *d)
546 struct pci_dev *p = d->dev;
547 u32 io_base = get_conf_byte(d, PCI_IO_BASE);
548 u32 io_limit = get_conf_byte(d, PCI_IO_LIMIT);
549 u32 io_type = io_base & PCI_IO_RANGE_TYPE_MASK;
550 u32 mem_base = get_conf_word(d, PCI_MEMORY_BASE);
551 u32 mem_limit = get_conf_word(d, PCI_MEMORY_LIMIT);
552 u32 mem_type = mem_base & PCI_MEMORY_RANGE_TYPE_MASK;
553 u32 pref_base = get_conf_word(d, PCI_PREF_MEMORY_BASE);
554 u32 pref_limit = get_conf_word(d, PCI_PREF_MEMORY_LIMIT);
555 u32 pref_type = pref_base & PCI_PREF_RANGE_TYPE_MASK;
556 word sec_stat = get_conf_word(d, PCI_SEC_STATUS);
557 word brc = get_conf_word(d, PCI_BRIDGE_CONTROL);
558 int io_disabled = (p->known_fields & PCI_FILL_BRIDGE_BASES) && !p->bridge_size[0];
559 int mem_disabled = (p->known_fields & PCI_FILL_BRIDGE_BASES) && !p->bridge_size[1];
560 int pref_disabled = (p->known_fields & PCI_FILL_BRIDGE_BASES) && !p->bridge_size[2];
561 int io_bits, pref_bits;
564 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
565 get_conf_byte(d, PCI_PRIMARY_BUS),
566 get_conf_byte(d, PCI_SECONDARY_BUS),
567 get_conf_byte(d, PCI_SUBORDINATE_BUS),
568 get_conf_byte(d, PCI_SEC_LATENCY_TIMER));
570 if ((p->known_fields & PCI_FILL_BRIDGE_BASES) && !io_disabled)
572 io_base = p->bridge_base_addr[0] & PCI_IO_RANGE_MASK;
573 io_limit = io_base + p->bridge_size[0] - 1;
574 io_type = p->bridge_base_addr[0] & PCI_IO_RANGE_TYPE_MASK;
575 io_bits = (io_type == PCI_IO_RANGE_TYPE_32) ? 32 : 16;
576 show_range("\tI/O behind bridge", io_base, io_limit, io_bits, io_disabled);
578 else if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) ||
579 (io_type != PCI_IO_RANGE_TYPE_16 && io_type != PCI_IO_RANGE_TYPE_32))
580 printf("\t!!! Unknown I/O range types %x/%x\n", io_base, io_limit);
583 io_base = (io_base & PCI_IO_RANGE_MASK) << 8;
584 io_limit = (io_limit & PCI_IO_RANGE_MASK) << 8;
585 if (io_type == PCI_IO_RANGE_TYPE_32)
587 io_base |= (get_conf_word(d, PCI_IO_BASE_UPPER16) << 16);
588 io_limit |= (get_conf_word(d, PCI_IO_LIMIT_UPPER16) << 16);
590 /* I/O is unsupported if both base and limit are zeros and resource is disabled */
591 if (!(io_base == 0x0 && io_limit == 0x0 && io_disabled))
594 io_bits = (io_type == PCI_IO_RANGE_TYPE_32) ? 32 : 16;
595 show_range("\tI/O behind bridge", io_base, io_limit, io_bits, io_disabled);
599 if ((p->known_fields & PCI_FILL_BRIDGE_BASES) && !mem_disabled)
601 mem_base = p->bridge_base_addr[1] & PCI_MEMORY_RANGE_MASK;
602 mem_limit = mem_base + p->bridge_size[1] - 1;
603 show_range("\tMemory behind bridge", mem_base, mem_limit, 32, mem_disabled);
605 else if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) ||
607 printf("\t!!! Unknown memory range types %x/%x\n", mem_base, mem_limit);
610 mem_base = (mem_base & PCI_MEMORY_RANGE_MASK) << 16;
611 mem_limit = (mem_limit & PCI_MEMORY_RANGE_MASK) << 16;
612 show_range("\tMemory behind bridge", mem_base, mem_limit + 0xfffff, 32, mem_disabled);
615 if ((p->known_fields & PCI_FILL_BRIDGE_BASES) && !pref_disabled)
617 u64 pref_base_64 = p->bridge_base_addr[2] & PCI_MEMORY_RANGE_MASK;
618 u64 pref_limit_64 = pref_base_64 + p->bridge_size[2] - 1;
619 pref_type = p->bridge_base_addr[2] & PCI_MEMORY_RANGE_TYPE_MASK;
620 pref_bits = (pref_type == PCI_PREF_RANGE_TYPE_64) ? 64 : 32;
621 show_range("\tPrefetchable memory behind bridge", pref_base_64, pref_limit_64, pref_bits, pref_disabled);
623 else if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) ||
624 (pref_type != PCI_PREF_RANGE_TYPE_32 && pref_type != PCI_PREF_RANGE_TYPE_64))
625 printf("\t!!! Unknown prefetchable memory range types %x/%x\n", pref_base, pref_limit);
628 u64 pref_base_64 = (pref_base & PCI_PREF_RANGE_MASK) << 16;
629 u64 pref_limit_64 = (pref_limit & PCI_PREF_RANGE_MASK) << 16;
630 if (pref_type == PCI_PREF_RANGE_TYPE_64)
632 pref_base_64 |= (u64) get_conf_long(d, PCI_PREF_BASE_UPPER32) << 32;
633 pref_limit_64 |= (u64) get_conf_long(d, PCI_PREF_LIMIT_UPPER32) << 32;
635 /* Prefetchable memory is unsupported if both base and limit are zeros and resource is disabled */
636 if (!(pref_base_64 == 0x0 && pref_limit_64 == 0x0 && pref_disabled))
638 pref_limit_64 += 0xfffff;
639 pref_bits = (pref_type == PCI_PREF_RANGE_TYPE_64) ? 64 : 32;
640 show_range("\tPrefetchable memory behind bridge", pref_base_64, pref_limit_64, pref_bits, pref_disabled);
645 printf("\tSecondary status: 66MHz%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c <SERR%c <PERR%c\n",
646 FLAG(sec_stat, PCI_STATUS_66MHZ),
647 FLAG(sec_stat, PCI_STATUS_FAST_BACK),
648 FLAG(sec_stat, PCI_STATUS_PARITY),
649 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
650 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
651 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
652 FLAG(sec_stat, PCI_STATUS_SIG_TARGET_ABORT),
653 FLAG(sec_stat, PCI_STATUS_REC_TARGET_ABORT),
654 FLAG(sec_stat, PCI_STATUS_REC_MASTER_ABORT),
655 FLAG(sec_stat, PCI_STATUS_SIG_SYSTEM_ERROR),
656 FLAG(sec_stat, PCI_STATUS_DETECTED_PARITY));
658 show_rom(d, PCI_ROM_ADDRESS1);
662 printf("\tBridgeCtl: Parity%c SERR%c NoISA%c VGA%c VGA16%c MAbort%c >Reset%c FastB2B%c\n",
663 FLAG(brc, PCI_BRIDGE_CTL_PARITY),
664 FLAG(brc, PCI_BRIDGE_CTL_SERR),
665 FLAG(brc, PCI_BRIDGE_CTL_NO_ISA),
666 FLAG(brc, PCI_BRIDGE_CTL_VGA),
667 FLAG(brc, PCI_BRIDGE_CTL_VGA_16BIT),
668 FLAG(brc, PCI_BRIDGE_CTL_MASTER_ABORT),
669 FLAG(brc, PCI_BRIDGE_CTL_BUS_RESET),
670 FLAG(brc, PCI_BRIDGE_CTL_FAST_BACK));
671 printf("\t\tPriDiscTmr%c SecDiscTmr%c DiscTmrStat%c DiscTmrSERREn%c\n",
672 FLAG(brc, PCI_BRIDGE_CTL_PRI_DISCARD_TIMER),
673 FLAG(brc, PCI_BRIDGE_CTL_SEC_DISCARD_TIMER),
674 FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_STATUS),
675 FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_SERR_EN));
678 show_caps(d, PCI_CAPABILITY_LIST);
682 show_htype2(struct device *d)
685 word cmd = get_conf_word(d, PCI_COMMAND);
686 word brc = get_conf_word(d, PCI_CB_BRIDGE_CONTROL);
688 int verb = verbose > 2;
691 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
692 get_conf_byte(d, PCI_CB_PRIMARY_BUS),
693 get_conf_byte(d, PCI_CB_CARD_BUS),
694 get_conf_byte(d, PCI_CB_SUBORDINATE_BUS),
695 get_conf_byte(d, PCI_CB_LATENCY_TIMER));
699 u32 base = get_conf_long(d, PCI_CB_MEMORY_BASE_0 + p);
700 u32 limit = get_conf_long(d, PCI_CB_MEMORY_LIMIT_0 + p);
701 limit = limit + 0xfff;
702 if (base <= limit || verb)
703 printf("\tMemory window %d: %08x-%08x%s%s\n", i, base, limit,
704 (cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]",
705 (brc & (PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 << i)) ? " (prefetchable)" : "");
710 u32 base = get_conf_long(d, PCI_CB_IO_BASE_0 + p);
711 u32 limit = get_conf_long(d, PCI_CB_IO_LIMIT_0 + p);
712 if (!(base & PCI_IO_RANGE_TYPE_32))
717 base &= PCI_CB_IO_RANGE_MASK;
718 limit = (limit & PCI_CB_IO_RANGE_MASK) + 3;
719 if (base <= limit || verb)
720 printf("\tI/O window %d: %08x-%08x%s\n", i, base, limit,
721 (cmd & PCI_COMMAND_IO) ? "" : " [disabled]");
724 if (get_conf_word(d, PCI_CB_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
725 printf("\tSecondary status: SERR\n");
727 printf("\tBridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c\n",
728 FLAG(brc, PCI_CB_BRIDGE_CTL_PARITY),
729 FLAG(brc, PCI_CB_BRIDGE_CTL_SERR),
730 FLAG(brc, PCI_CB_BRIDGE_CTL_ISA),
731 FLAG(brc, PCI_CB_BRIDGE_CTL_VGA),
732 FLAG(brc, PCI_CB_BRIDGE_CTL_MASTER_ABORT),
733 FLAG(brc, PCI_CB_BRIDGE_CTL_CB_RESET),
734 FLAG(brc, PCI_CB_BRIDGE_CTL_16BIT_INT),
735 FLAG(brc, PCI_CB_BRIDGE_CTL_POST_WRITES));
737 if (d->config_cached < 128)
739 printf("\t<access denied to the rest>\n");
743 exca = get_conf_word(d, PCI_CB_LEGACY_MODE_BASE);
745 printf("\t16-bit legacy interface ports at %04x\n", exca);
746 show_caps(d, PCI_CB_CAPABILITY_LIST);
750 show_verbose(struct device *d)
752 struct pci_dev *p = d->dev;
753 word status = get_conf_word(d, PCI_STATUS);
754 word cmd = get_conf_word(d, PCI_COMMAND);
755 word class = p->device_class;
756 byte bist = get_conf_byte(d, PCI_BIST);
757 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
758 byte latency = get_conf_byte(d, PCI_LATENCY_TIMER);
759 byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE);
760 byte max_lat, min_gnt;
761 byte int_pin = get_conf_byte(d, PCI_INTERRUPT_PIN);
763 char *dt_node, *iommu_group;
767 pci_fill_info(p, PCI_FILL_IRQ | PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES |
768 PCI_FILL_PHYS_SLOT | PCI_FILL_NUMA_NODE | PCI_FILL_DT_NODE | PCI_FILL_IOMMU_GROUP |
769 PCI_FILL_BRIDGE_BASES);
774 case PCI_HEADER_TYPE_NORMAL:
775 if (class == PCI_CLASS_BRIDGE_PCI)
776 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
777 max_lat = get_conf_byte(d, PCI_MAX_LAT);
778 min_gnt = get_conf_byte(d, PCI_MIN_GNT);
780 case PCI_HEADER_TYPE_BRIDGE:
781 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
782 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
783 min_gnt = max_lat = 0;
785 case PCI_HEADER_TYPE_CARDBUS:
786 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
787 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
788 min_gnt = max_lat = 0;
791 printf("\t!!! Unknown header type %02x\n", htype);
796 printf("\tPhysical Slot: %s\n", p->phy_slot);
798 if (dt_node = pci_get_string_property(p, PCI_FILL_DT_NODE))
799 printf("\tDevice tree node: %s\n", dt_node);
803 printf("\tControl: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c DisINTx%c\n",
804 FLAG(cmd, PCI_COMMAND_IO),
805 FLAG(cmd, PCI_COMMAND_MEMORY),
806 FLAG(cmd, PCI_COMMAND_MASTER),
807 FLAG(cmd, PCI_COMMAND_SPECIAL),
808 FLAG(cmd, PCI_COMMAND_INVALIDATE),
809 FLAG(cmd, PCI_COMMAND_VGA_PALETTE),
810 FLAG(cmd, PCI_COMMAND_PARITY),
811 FLAG(cmd, PCI_COMMAND_WAIT),
812 FLAG(cmd, PCI_COMMAND_SERR),
813 FLAG(cmd, PCI_COMMAND_FAST_BACK),
814 FLAG(cmd, PCI_COMMAND_DISABLE_INTx));
815 printf("\tStatus: Cap%c 66MHz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c >SERR%c <PERR%c INTx%c\n",
816 FLAG(status, PCI_STATUS_CAP_LIST),
817 FLAG(status, PCI_STATUS_66MHZ),
818 FLAG(status, PCI_STATUS_UDF),
819 FLAG(status, PCI_STATUS_FAST_BACK),
820 FLAG(status, PCI_STATUS_PARITY),
821 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
822 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
823 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
824 FLAG(status, PCI_STATUS_SIG_TARGET_ABORT),
825 FLAG(status, PCI_STATUS_REC_TARGET_ABORT),
826 FLAG(status, PCI_STATUS_REC_MASTER_ABORT),
827 FLAG(status, PCI_STATUS_SIG_SYSTEM_ERROR),
828 FLAG(status, PCI_STATUS_DETECTED_PARITY),
829 FLAG(status, PCI_STATUS_INTx));
830 if (cmd & PCI_COMMAND_MASTER)
832 printf("\tLatency: %d", latency);
833 if (min_gnt || max_lat)
837 printf("%dns min", min_gnt*250);
838 if (min_gnt && max_lat)
841 printf("%dns max", max_lat*250);
845 printf(", Cache Line Size: %d bytes", cache_line * 4);
849 printf("\tInterrupt: pin %c routed to IRQ " PCIIRQ_FMT "\n",
850 (int_pin ? 'A' + int_pin - 1 : '?'), irq);
851 if (p->numa_node != -1)
852 printf("\tNUMA node: %d\n", p->numa_node);
853 if (iommu_group = pci_get_string_property(p, PCI_FILL_IOMMU_GROUP))
854 printf("\tIOMMU group: %s\n", iommu_group);
859 if (cmd & PCI_COMMAND_MASTER)
860 printf("bus master, ");
861 if (cmd & PCI_COMMAND_VGA_PALETTE)
862 printf("VGA palette snoop, ");
863 if (cmd & PCI_COMMAND_WAIT)
864 printf("stepping, ");
865 if (cmd & PCI_COMMAND_FAST_BACK)
866 printf("fast Back2Back, ");
867 if (status & PCI_STATUS_66MHZ)
869 if (status & PCI_STATUS_UDF)
870 printf("user-definable features, ");
872 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
873 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
874 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??");
875 if (cmd & PCI_COMMAND_MASTER)
876 printf(", latency %d", latency);
878 printf(", IRQ " PCIIRQ_FMT, irq);
879 if (p->numa_node != -1)
880 printf(", NUMA node %d", p->numa_node);
881 if (iommu_group = pci_get_string_property(p, PCI_FILL_IOMMU_GROUP))
882 printf(", IOMMU group %s", iommu_group);
886 if (bist & PCI_BIST_CAPABLE)
888 if (bist & PCI_BIST_START)
889 printf("\tBIST is running\n");
891 printf("\tBIST result: %02x\n", bist & PCI_BIST_CODE_MASK);
896 case PCI_HEADER_TYPE_NORMAL:
899 case PCI_HEADER_TYPE_BRIDGE:
902 case PCI_HEADER_TYPE_CARDBUS:
908 /*** Machine-readable dumps ***/
911 show_hex_dump(struct device *d)
915 cnt = d->config_cached;
916 if (opt_hex >= 3 && config_fetch(d, cnt, 256-cnt))
919 if (opt_hex >= 4 && config_fetch(d, 256, 4096-256))
923 for (i=0; i<cnt; i++)
927 printf(" %02x", get_conf_byte(d, i));
934 print_shell_escaped(char *c)
939 if (*c == '"' || *c == '\\')
947 show_machine(struct device *d)
949 struct pci_dev *p = d->dev;
952 char classbuf[128], vendbuf[128], devbuf[128], svbuf[128], sdbuf[128];
953 char *dt_node, *iommu_group;
955 get_subid(d, &sv_id, &sd_id);
959 pci_fill_info(p, PCI_FILL_PHYS_SLOT | PCI_FILL_NUMA_NODE | PCI_FILL_DT_NODE | PCI_FILL_IOMMU_GROUP);
960 printf((opt_machine >= 2) ? "Slot:\t" : "Device:\t");
963 printf("Class:\t%s\n",
964 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, p->device_class));
965 printf("Vendor:\t%s\n",
966 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id));
967 printf("Device:\t%s\n",
968 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id));
969 if (sv_id && sv_id != 0xffff)
971 printf("SVendor:\t%s\n",
972 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, sv_id));
973 printf("SDevice:\t%s\n",
974 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
977 printf("PhySlot:\t%s\n", p->phy_slot);
978 if (c = get_conf_byte(d, PCI_REVISION_ID))
979 printf("Rev:\t%02x\n", c);
980 if (c = get_conf_byte(d, PCI_CLASS_PROG))
981 printf("ProgIf:\t%02x\n", c);
983 show_kernel_machine(d);
984 if (p->numa_node != -1)
985 printf("NUMANode:\t%d\n", p->numa_node);
986 if (dt_node = pci_get_string_property(p, PCI_FILL_DT_NODE))
987 printf("DTNode:\t%s\n", dt_node);
988 if (iommu_group = pci_get_string_property(p, PCI_FILL_IOMMU_GROUP))
989 printf("IOMMUGroup:\t%s\n", iommu_group);
994 print_shell_escaped(pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, p->device_class));
995 print_shell_escaped(pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id));
996 print_shell_escaped(pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id));
997 if (c = get_conf_byte(d, PCI_REVISION_ID))
998 printf(" -r%02x", c);
999 if (c = get_conf_byte(d, PCI_CLASS_PROG))
1000 printf(" -p%02x", c);
1001 if (sv_id && sv_id != 0xffff)
1003 print_shell_escaped(pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, sv_id));
1004 print_shell_escaped(pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
1007 printf(" \"\" \"\"");
1012 /*** Main show function ***/
1015 show_device(struct device *d)
1025 if (opt_kernel || verbose)
1030 if (verbose || opt_hex)
1039 for (d=first_dev; d; d=d->next)
1040 if (pci_filter_match(&filter, d->dev))
1047 main(int argc, char **argv)
1052 if (argc == 2 && !strcmp(argv[1], "--version"))
1054 puts("lspci version " PCIUTILS_VERSION);
1060 pci_filter_init(pacc, &filter);
1062 while ((i = getopt(argc, argv, options)) != -1)
1066 pacc->numeric_ids++;
1072 pacc->buscentric = 1;
1075 if (msg = pci_filter_parse_slot(&filter, optarg))
1080 if (msg = pci_filter_parse_id(&filter, optarg))
1096 pci_set_name_list_path(pacc, optarg, 0);
1102 opt_pcimap = optarg;
1125 die("DNS queries are not available in this version");
1128 if (parse_generic_option(i, pacc, optarg))
1131 fprintf(stderr, help_msg, pacc->id_file_name);
1139 pacc->id_lookup_mode |= PCI_LOOKUP_NETWORK;
1140 if (opt_query_dns > 1)
1141 pacc->id_lookup_mode |= PCI_LOOKUP_REFRESH_CACHE;
1144 pacc->id_lookup_mode |= PCI_LOOKUP_NETWORK | PCI_LOOKUP_SKIP_LOCAL;
1150 die("Bus mapping mode does not recognize bus topology");
1160 show_forest(opt_filter ? &filter : NULL);
1164 show_kernel_cleanup();
1167 return (seen_errors ? 2 : 0);