2 * $Id: lspci.c,v 1.26 1999/06/17 17:51:45 mj Exp $
4 * Linux PCI Utilities -- List All PCI Devices
6 * Copyright (c) 1997--1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
8 * Can be freely distributed and used under the terms of the GNU GPL.
21 static int verbose; /* Show detailed information */
22 static int buscentric_view; /* Show bus addresses/IRQ's instead of CPU-visible ones */
23 static int show_hex; /* Show contents of config space as hexadecimal numbers */
24 static struct pci_filter filter; /* Device filter */
25 static int show_tree; /* Show bus tree */
26 static int machine_readable; /* Generate machine-readable output */
27 static int map_mode; /* Bus mapping mode enabled */
29 static char options[] = "nvbxs:d:ti:mgM" GENERIC_OPTIONS ;
31 static char help_msg[] = "\
32 Usage: lspci [<switches>]\n\
35 -n\t\tShow numeric ID's\n\
36 -b\t\tBus-centric view (PCI addresses and IRQ's instead of those seen by the CPU)\n\
37 -x\t\tShow hex-dump of config space\n\
38 -s [[<bus>]:][<slot>][.[<func>]]\tShow only devices in selected slots\n\
39 -d [<vendor>]:[<device>]\tShow only selected devices\n\
40 -t\t\tShow bus tree\n\
41 -m\t\tProduce machine-readable output\n\
42 -i <file>\tUse specified ID database instead of %s\n\
43 -M\t\tEnable `bus mapping' mode (dangerous; root only)\n"
47 /* Communication with libpci */
49 static struct pci_access *pacc;
51 /* Format strings used for IRQ numbers and memory addresses */
54 #define IRQ_FORMAT "%08x"
56 #define IRQ_FORMAT "%d"
59 #ifdef HAVE_64BIT_ADDRESS
60 #define ADDR_FORMAT "%016Lx"
62 #define ADDR_FORMAT "%08lx"
66 #define IO_FORMAT "%016Lx"
67 #elif defined(HAVE_64BIT_ADDRESS)
68 #define IO_FORMAT "%04Lx"
70 #define IO_FORMAT "%04lx"
73 /* Our view of the PCI bus */
78 unsigned int config_cnt;
82 static struct device *first_dev;
84 static struct device *
85 scan_device(struct pci_dev *p)
87 int how_much = (show_hex > 2) ? 256 : 64;
90 if (!pci_filter_match(&filter, p))
92 d = xmalloc(sizeof(struct device));
95 if (!pci_read_block(p, 0, d->config, how_much))
96 die("Unable to read %d bytes of configuration space.", how_much);
97 if (how_much < 128 && (d->config[PCI_HEADER_TYPE] & 0x7f) == PCI_HEADER_TYPE_CARDBUS)
99 /* For cardbus bridges, we need to fetch 64 bytes more to get the full standard header... */
100 if (!pci_read_block(p, 0, d->config+64, 64))
101 die("Unable to read cardbus bridge extension data.");
104 d->config_cnt = how_much;
105 pci_setup_cache(p, d->config, d->config_cnt);
106 pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_IRQ | PCI_FILL_BASES | PCI_FILL_ROM_BASE);
117 for(p=pacc->devices; p; p=p->next)
118 if (d = scan_device(p))
128 static int is_root = -1;
131 is_root = !geteuid();
136 config_fetch(struct device *d, unsigned int pos, unsigned int len)
138 if (pos + len < d->config_cnt)
140 if (pacc->method != PCI_ACCESS_DUMP && !check_root())
142 return pci_read_block(d->dev, pos, d->config + pos, len);
145 /* Config space accesses */
148 get_conf_byte(struct device *d, unsigned int pos)
150 return d->config[pos];
154 get_conf_word(struct device *d, unsigned int pos)
156 return d->config[pos] | (d->config[pos+1] << 8);
160 get_conf_long(struct device *d, unsigned int pos)
162 return d->config[pos] |
163 (d->config[pos+1] << 8) |
164 (d->config[pos+2] << 16) |
165 (d->config[pos+3] << 24);
171 compare_them(const void *A, const void *B)
173 const struct pci_dev *a = (*(const struct device **)A)->dev;
174 const struct pci_dev *b = (*(const struct device **)B)->dev;
184 if (a->func < b->func)
186 if (a->func > b->func)
194 struct device **index, **h, **last_dev;
199 for(d=first_dev; d; d=d->next)
201 h = index = alloca(sizeof(struct device *) * cnt);
202 for(d=first_dev; d; d=d->next)
204 qsort(index, cnt, sizeof(struct device *), compare_them);
205 last_dev = &first_dev;
210 last_dev = &(*h)->next;
218 #define FLAG(x,y) ((x & y) ? '+' : '-')
221 show_terse(struct device *d)
224 struct pci_dev *p = d->dev;
225 byte classbuf[128], devbuf[128];
227 printf("%02x:%02x.%x %s: %s",
231 pci_lookup_name(pacc, classbuf, sizeof(classbuf),
233 get_conf_word(d, PCI_CLASS_DEVICE), 0),
234 pci_lookup_name(pacc, devbuf, sizeof(devbuf),
235 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
236 p->vendor_id, p->device_id));
237 if (c = get_conf_byte(d, PCI_REVISION_ID))
238 printf(" (rev %02x)", c);
239 if (verbose && (c = get_conf_byte(d, PCI_CLASS_PROG)))
240 printf(" (prog-if %02x)", c);
245 show_bases(struct device *d, int cnt)
247 struct pci_dev *p = d->dev;
248 word cmd = get_conf_word(d, PCI_COMMAND);
253 pciaddr_t pos = p->base_addr[i];
254 u32 flg = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
255 if (flg == 0xffffffff)
260 printf("\tRegion %d: ", i);
263 if (pos && !flg) /* Reported by the OS, but not by the device */
265 printf("[virtual] ");
268 if (flg & PCI_BASE_ADDRESS_SPACE_IO)
270 pciaddr_t a = pos & PCI_BASE_ADDRESS_IO_MASK;
271 printf("I/O ports at ");
273 printf(IO_FORMAT, a);
274 else if (flg & PCI_BASE_ADDRESS_IO_MASK)
277 printf("<unassigned>");
278 if (!(cmd & PCI_COMMAND_IO))
279 printf(" [disabled]");
283 int t = flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
284 pciaddr_t a = pos & PCI_ADDR_MEM_MASK;
288 printf("Memory at ");
289 if (t == PCI_BASE_ADDRESS_MEM_TYPE_64)
293 printf("<invalid-64bit-slot>\n");
299 z = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
303 printf("%08x" ADDR_FORMAT, z, a);
305 printf("<unassigned>");
313 printf(ADDR_FORMAT, a);
315 printf(((flg & PCI_BASE_ADDRESS_MEM_MASK) || z) ? "<ignored>" : "<unassigned>");
317 printf(" (%s, %sprefetchable)",
318 (t == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32-bit" :
319 (t == PCI_BASE_ADDRESS_MEM_TYPE_64) ? "64-bit" :
320 (t == PCI_BASE_ADDRESS_MEM_TYPE_1M) ? "low-1M" : "type 3",
321 (flg & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-");
322 if (!(cmd & PCI_COMMAND_MEMORY))
323 printf(" [disabled]");
330 show_pm(struct device *d, int where, int cap)
334 printf("Power Management version %d\n", cap & PCI_PM_CAP_VER_MASK);
337 printf("\t\tFlags: PMEClk%c AuxPwr%c DSI%c D1%c D2%c PME%c\n",
338 FLAG(cap, PCI_PM_CAP_PME_CLOCK),
339 FLAG(cap, PCI_PM_CAP_AUX_POWER),
340 FLAG(cap, PCI_PM_CAP_DSI),
341 FLAG(cap, PCI_PM_CAP_D1),
342 FLAG(cap, PCI_PM_CAP_D2),
343 FLAG(cap, PCI_PM_CAP_PME));
344 config_fetch(d, where + PCI_PM_CTRL, PCI_PM_SIZEOF - PCI_PM_CTRL);
345 t = get_conf_word(d, where + PCI_PM_CTRL);
346 printf("\t\tStatus: D%d PME-Enable%c DSel=%x DScale=%x PME%c\n",
347 t & PCI_PM_CTRL_STATE_MASK,
348 FLAG(t, PCI_PM_CTRL_PME_ENABLE),
349 (t & PCI_PM_CTRL_DATA_SEL_MASK) >> 9,
350 (t & PCI_PM_CTRL_DATA_SCALE_MASK) >> 13,
351 FLAG(t, PCI_PM_CTRL_PME_STATUS));
355 show_agp(struct device *d, int where, int cap)
360 printf("AGP version %x.%x\n", cap/16, cap%16);
363 config_fetch(d, where + PCI_AGP_STATUS, PCI_AGP_SIZEOF - PCI_AGP_STATUS);
364 t = get_conf_long(d, where + PCI_AGP_STATUS);
365 printf("\t\tStatus: RQ=%d SBA%c 64bit%c FW%c Rate=%s%s%s\n",
366 (t & PCI_AGP_STATUS_RQ_MASK) >> 24U,
367 FLAG(t, PCI_AGP_STATUS_SBA),
368 FLAG(t, PCI_AGP_STATUS_64BIT),
369 FLAG(t, PCI_AGP_STATUS_FW),
370 (t & PCI_AGP_STATUS_RATE4) ? "4" : "",
371 (t & PCI_AGP_STATUS_RATE2) ? "2" : "",
372 (t & PCI_AGP_STATUS_RATE1) ? "1" : "");
373 t = get_conf_long(d, where + PCI_AGP_COMMAND);
374 printf("\t\tCommand: RQ=%d SBA%c AGP%c 64bit%c FW%c Rate=%s%s%s\n",
375 (t & PCI_AGP_COMMAND_RQ_MASK) >> 24U,
376 FLAG(t, PCI_AGP_COMMAND_SBA),
377 FLAG(t, PCI_AGP_COMMAND_AGP),
378 FLAG(t, PCI_AGP_COMMAND_64BIT),
379 FLAG(t, PCI_AGP_COMMAND_FW),
380 (t & PCI_AGP_COMMAND_RATE4) ? "4" : "",
381 (t & PCI_AGP_COMMAND_RATE2) ? "2" : "",
382 (t & PCI_AGP_COMMAND_RATE1) ? "1" : "");
386 show_htype0(struct device *d)
388 unsigned long rom = d->dev->rom_base_addr;
392 printf("\tExpansion ROM at %08lx%s\n", rom & PCI_ROM_ADDRESS_MASK,
393 (rom & PCI_ROM_ADDRESS_ENABLE) ? "" : " [disabled]");
394 if (get_conf_word(d, PCI_STATUS) & PCI_STATUS_CAP_LIST)
396 int where = get_conf_byte(d, PCI_CAPABILITY_LIST);
400 printf("\tCapabilities: ");
401 if (!config_fetch(d, where, 4))
403 puts("<available only to root>");
406 id = get_conf_byte(d, where + PCI_CAP_LIST_ID);
407 next = get_conf_byte(d, where + PCI_CAP_LIST_NEXT);
408 cap = get_conf_word(d, where + PCI_CAP_FLAGS);
409 printf("[%02x] ", where);
412 printf("<chain broken>\n");
418 show_pm(d, where, cap);
421 show_agp(d, where, cap);
424 printf("#%02x [%04x]", id, cap);
432 show_htype1(struct device *d)
434 struct pci_dev *p = d->dev;
435 u32 io_base = get_conf_byte(d, PCI_IO_BASE);
436 u32 io_limit = get_conf_byte(d, PCI_IO_LIMIT);
437 u32 io_type = io_base & PCI_IO_RANGE_TYPE_MASK;
438 u32 mem_base = get_conf_word(d, PCI_MEMORY_BASE);
439 u32 mem_limit = get_conf_word(d, PCI_MEMORY_LIMIT);
440 u32 mem_type = mem_base & PCI_MEMORY_RANGE_TYPE_MASK;
441 u32 pref_base = get_conf_word(d, PCI_PREF_MEMORY_BASE);
442 u32 pref_limit = get_conf_word(d, PCI_PREF_MEMORY_LIMIT);
443 u32 pref_type = pref_base & PCI_PREF_RANGE_TYPE_MASK;
444 unsigned long rom = p->rom_base_addr;
445 word brc = get_conf_word(d, PCI_BRIDGE_CONTROL);
448 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
449 get_conf_byte(d, PCI_PRIMARY_BUS),
450 get_conf_byte(d, PCI_SECONDARY_BUS),
451 get_conf_byte(d, PCI_SUBORDINATE_BUS),
452 get_conf_byte(d, PCI_SEC_LATENCY_TIMER));
454 if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) ||
455 (io_type != PCI_IO_RANGE_TYPE_16 && io_type != PCI_IO_RANGE_TYPE_32))
456 printf("\t!!! Unknown I/O range types %x/%x\n", io_base, io_limit);
459 io_base = (io_base & PCI_IO_RANGE_MASK) << 8;
460 io_limit = (io_limit & PCI_IO_RANGE_MASK) << 8;
461 if (io_type == PCI_IO_RANGE_TYPE_32)
463 io_base |= (get_conf_word(d, PCI_IO_BASE_UPPER16) << 16);
464 io_limit |= (get_conf_word(d, PCI_IO_LIMIT_UPPER16) << 16);
467 printf("\tI/O behind bridge: %08x-%08x\n", io_base, io_limit+0xfff);
470 if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) ||
472 printf("\t!!! Unknown memory range types %x/%x\n", mem_base, mem_limit);
475 mem_base = (mem_base & PCI_MEMORY_RANGE_MASK) << 16;
476 mem_limit = (mem_limit & PCI_MEMORY_RANGE_MASK) << 16;
477 printf("\tMemory behind bridge: %08x-%08x\n", mem_base, mem_limit + 0xfffff);
480 if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) ||
481 (pref_type != PCI_PREF_RANGE_TYPE_32 && pref_type != PCI_PREF_RANGE_TYPE_64))
482 printf("\t!!! Unknown prefetchable memory range types %x/%x\n", pref_base, pref_limit);
485 pref_base = (pref_base & PCI_PREF_RANGE_MASK) << 16;
486 pref_limit = (pref_limit & PCI_PREF_RANGE_MASK) << 16;
487 if (pref_type == PCI_PREF_RANGE_TYPE_32)
488 printf("\tPrefetchable memory behind bridge: %08x-%08x\n", pref_base, pref_limit + 0xfffff);
490 printf("\tPrefetchable memory behind bridge: %08x%08x-%08x%08x\n",
491 get_conf_long(d, PCI_PREF_BASE_UPPER32),
493 get_conf_long(d, PCI_PREF_LIMIT_UPPER32),
497 if (get_conf_word(d, PCI_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
498 printf("\tSecondary status: SERR\n");
501 printf("\tExpansion ROM at %08lx%s\n", rom & PCI_ROM_ADDRESS_MASK,
502 (rom & PCI_ROM_ADDRESS_ENABLE) ? "" : " [disabled]");
505 printf("\tBridgeCtl: Parity%c SERR%c NoISA%c VGA%c MAbort%c >Reset%c FastB2B%c\n",
506 FLAG(brc, PCI_BRIDGE_CTL_PARITY),
507 FLAG(brc, PCI_BRIDGE_CTL_SERR),
508 FLAG(brc, PCI_BRIDGE_CTL_NO_ISA),
509 FLAG(brc, PCI_BRIDGE_CTL_VGA),
510 FLAG(brc, PCI_BRIDGE_CTL_MASTER_ABORT),
511 FLAG(brc, PCI_BRIDGE_CTL_BUS_RESET),
512 FLAG(brc, PCI_BRIDGE_CTL_FAST_BACK));
516 show_htype2(struct device *d)
519 word cmd = get_conf_word(d, PCI_COMMAND);
520 word brc = get_conf_word(d, PCI_CB_BRIDGE_CONTROL);
521 word exca = get_conf_word(d, PCI_CB_LEGACY_MODE_BASE);
524 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
525 get_conf_byte(d, PCI_CB_PRIMARY_BUS),
526 get_conf_byte(d, PCI_CB_CARD_BUS),
527 get_conf_byte(d, PCI_CB_SUBORDINATE_BUS),
528 get_conf_byte(d, PCI_CB_LATENCY_TIMER));
532 u32 base = get_conf_long(d, PCI_CB_MEMORY_BASE_0 + p);
533 u32 limit = get_conf_long(d, PCI_CB_MEMORY_LIMIT_0 + p);
535 printf("Memory window %d: %08x-%08x%s%s\n", i, base, limit,
536 (cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]",
537 (brc & (PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 << i)) ? " (prefetchable)" : "");
542 u32 base = get_conf_long(d, PCI_CB_IO_BASE_0 + p);
543 u32 limit = get_conf_long(d, PCI_CB_IO_LIMIT_0 + p);
544 if (!(base & PCI_IO_RANGE_TYPE_32))
549 base &= PCI_CB_IO_RANGE_MASK;
552 limit = (limit & PCI_CB_IO_RANGE_MASK) + 3;
553 printf("I/O window %d: %08x-%08x%s\n", i, base, limit,
554 (cmd & PCI_COMMAND_IO) ? "" : " [disabled]");
557 if (get_conf_word(d, PCI_CB_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
558 printf("\tSecondary status: SERR\n");
560 printf("\tBridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c\n",
561 FLAG(brc, PCI_CB_BRIDGE_CTL_PARITY),
562 FLAG(brc, PCI_CB_BRIDGE_CTL_SERR),
563 FLAG(brc, PCI_CB_BRIDGE_CTL_ISA),
564 FLAG(brc, PCI_CB_BRIDGE_CTL_VGA),
565 FLAG(brc, PCI_CB_BRIDGE_CTL_MASTER_ABORT),
566 FLAG(brc, PCI_CB_BRIDGE_CTL_CB_RESET),
567 FLAG(brc, PCI_CB_BRIDGE_CTL_16BIT_INT),
568 FLAG(brc, PCI_CB_BRIDGE_CTL_POST_WRITES));
570 printf("\t16-bit legacy interface ports at %04x\n", exca);
574 show_verbose(struct device *d)
576 struct pci_dev *p = d->dev;
577 word status = get_conf_word(d, PCI_STATUS);
578 word cmd = get_conf_word(d, PCI_COMMAND);
579 word class = get_conf_word(d, PCI_CLASS_DEVICE);
580 byte bist = get_conf_byte(d, PCI_BIST);
581 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
582 byte latency = get_conf_byte(d, PCI_LATENCY_TIMER);
583 byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE);
584 byte max_lat, min_gnt;
585 byte int_pin = get_conf_byte(d, PCI_INTERRUPT_PIN);
586 unsigned int irq = p->irq;
587 word subsys_v, subsys_d;
594 case PCI_HEADER_TYPE_NORMAL:
595 if (class == PCI_CLASS_BRIDGE_PCI)
598 printf("\t!!! Header type %02x doesn't match class code %04x\n", htype, class);
601 max_lat = get_conf_byte(d, PCI_MAX_LAT);
602 min_gnt = get_conf_byte(d, PCI_MIN_GNT);
603 subsys_v = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
604 subsys_d = get_conf_word(d, PCI_SUBSYSTEM_ID);
606 case PCI_HEADER_TYPE_BRIDGE:
607 if (class != PCI_CLASS_BRIDGE_PCI)
609 irq = int_pin = min_gnt = max_lat = 0;
610 subsys_v = subsys_d = 0;
612 case PCI_HEADER_TYPE_CARDBUS:
613 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
615 min_gnt = max_lat = 0;
616 subsys_v = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
617 subsys_d = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
620 printf("\t!!! Unknown header type %02x\n", htype);
624 if (verbose && subsys_v && subsys_v != 0xffff)
625 printf("\tSubsystem: %s\n",
626 pci_lookup_name(pacc, ssnamebuf, sizeof(ssnamebuf),
627 PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
628 subsys_v, subsys_d));
632 printf("\tControl: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c\n",
633 FLAG(cmd, PCI_COMMAND_IO),
634 FLAG(cmd, PCI_COMMAND_MEMORY),
635 FLAG(cmd, PCI_COMMAND_MASTER),
636 FLAG(cmd, PCI_COMMAND_SPECIAL),
637 FLAG(cmd, PCI_COMMAND_INVALIDATE),
638 FLAG(cmd, PCI_COMMAND_VGA_PALETTE),
639 FLAG(cmd, PCI_COMMAND_PARITY),
640 FLAG(cmd, PCI_COMMAND_WAIT),
641 FLAG(cmd, PCI_COMMAND_SERR),
642 FLAG(cmd, PCI_COMMAND_FAST_BACK));
643 printf("\tStatus: Cap%c 66Mhz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c >SERR%c <PERR%c\n",
644 FLAG(status, PCI_STATUS_CAP_LIST),
645 FLAG(status, PCI_STATUS_66MHZ),
646 FLAG(status, PCI_STATUS_UDF),
647 FLAG(status, PCI_STATUS_FAST_BACK),
648 FLAG(status, PCI_STATUS_PARITY),
649 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
650 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
651 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
652 FLAG(status, PCI_STATUS_SIG_TARGET_ABORT),
653 FLAG(status, PCI_STATUS_REC_TARGET_ABORT),
654 FLAG(status, PCI_STATUS_REC_MASTER_ABORT),
655 FLAG(status, PCI_STATUS_SIG_SYSTEM_ERROR),
656 FLAG(status, PCI_STATUS_DETECTED_PARITY));
657 if (cmd & PCI_COMMAND_MASTER)
659 printf("\tLatency: ");
661 printf("%d min, ", min_gnt);
663 printf("%d max, ", max_lat);
664 printf("%d set", latency);
666 printf(", cache line size %02x", cache_line);
670 printf("\tInterrupt: pin %c routed to IRQ " IRQ_FORMAT "\n",
671 (int_pin ? 'A' + int_pin - 1 : '?'), irq);
676 if (cmd & PCI_COMMAND_MASTER)
677 printf("bus master, ");
678 if (cmd & PCI_COMMAND_VGA_PALETTE)
679 printf("VGA palette snoop, ");
680 if (cmd & PCI_COMMAND_WAIT)
681 printf("stepping, ");
682 if (cmd & PCI_COMMAND_FAST_BACK)
683 printf("fast Back2Back, ");
684 if (status & PCI_STATUS_66MHZ)
686 if (status & PCI_STATUS_UDF)
687 printf("user-definable features, ");
689 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
690 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
691 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??");
692 if (cmd & PCI_COMMAND_MASTER)
693 printf(", latency %d", latency);
695 printf(", IRQ " IRQ_FORMAT, irq);
699 if (bist & PCI_BIST_CAPABLE)
701 if (bist & PCI_BIST_START)
702 printf("\tBIST is running\n");
704 printf("\tBIST result: %02x\n", bist & PCI_BIST_CODE_MASK);
709 case PCI_HEADER_TYPE_NORMAL:
712 case PCI_HEADER_TYPE_BRIDGE:
715 case PCI_HEADER_TYPE_CARDBUS:
722 show_hex_dump(struct device *d)
726 for(i=0; i<d->config_cnt; i++)
730 printf(" %02x", get_conf_byte(d, i));
737 show_machine(struct device *d)
739 struct pci_dev *p = d->dev;
741 word sv_id=0, sd_id=0;
742 char classbuf[128], vendbuf[128], devbuf[128], svbuf[128], sdbuf[128];
744 switch (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f)
746 case PCI_HEADER_TYPE_NORMAL:
747 sv_id = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
748 sd_id = get_conf_word(d, PCI_SUBSYSTEM_ID);
750 case PCI_HEADER_TYPE_CARDBUS:
751 sv_id = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
752 sd_id = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
758 printf("Device:\t%02x:%02x.%x\n", p->bus, p->dev, p->func);
759 printf("Class:\t%s\n",
760 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, get_conf_word(d, PCI_CLASS_DEVICE), 0));
761 printf("Vendor:\t%s\n",
762 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id));
763 printf("Device:\t%s\n",
764 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id));
765 if (sv_id && sv_id != 0xffff)
767 printf("SVendor:\t%s\n",
768 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, sv_id, sd_id));
769 printf("SDevice:\t%s\n",
770 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, sv_id, sd_id));
772 if (c = get_conf_byte(d, PCI_REVISION_ID))
773 printf("Rev:\t%02x\n", c);
774 if (c = get_conf_byte(d, PCI_CLASS_PROG))
775 printf("ProgIf:\t%02x\n", c);
779 printf("%02x:%02x.%x ", p->bus, p->dev, p->func);
780 printf("\"%s\" \"%s\" \"%s\"",
781 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS,
782 get_conf_word(d, PCI_CLASS_DEVICE), 0),
783 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR,
784 p->vendor_id, p->device_id),
785 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE,
786 p->vendor_id, p->device_id));
787 if (c = get_conf_byte(d, PCI_REVISION_ID))
788 printf(" -r%02x", c);
789 if (c = get_conf_byte(d, PCI_CLASS_PROG))
790 printf(" -p%02x", c);
791 if (sv_id && sv_id != 0xffff)
792 printf(" \"%s\" \"%s\"",
793 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, sv_id, sd_id),
794 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, sv_id, sd_id));
796 printf(" \"\" \"\"");
802 show_device(struct device *d)
804 if (machine_readable)
812 if (verbose || show_hex)
821 for(d=first_dev; d; d=d->next)
828 struct bridge *chain; /* Single-linked list of bridges */
829 struct bridge *next, *child; /* Tree of bridges */
830 struct bus *first_bus; /* List of busses connected to this bridge */
831 unsigned int primary, secondary, subordinate; /* Bus numbers */
832 struct device *br_dev;
838 struct device *first_dev, **last_dev;
841 static struct bridge host_bridge = { NULL, NULL, NULL, NULL, ~0, 0, ~0, NULL };
844 find_bus(struct bridge *b, unsigned int n)
848 for(bus=b->first_bus; bus; bus=bus->sibling)
849 if (bus->number == n)
855 new_bus(struct bridge *b, unsigned int n)
857 struct bus *bus = xmalloc(sizeof(struct bus));
859 bus = xmalloc(sizeof(struct bus));
861 bus->sibling = b->first_bus;
862 bus->first_dev = NULL;
863 bus->last_dev = &bus->first_dev;
869 insert_dev(struct device *d, struct bridge *b)
871 struct pci_dev *p = d->dev;
874 if (! (bus = find_bus(b, p->bus)))
877 for(c=b->child; c; c=c->next)
878 if (c->secondary <= p->bus && p->bus <= c->subordinate)
879 return insert_dev(d, c);
880 bus = new_bus(b, p->bus);
882 /* Simple insertion at the end _does_ guarantee the correct order as the
883 * original device list was sorted by (bus, devfn) lexicographically
884 * and all devices on the new list have the same bus number.
887 bus->last_dev = &d->next;
894 struct device *d, *d2;
895 struct bridge **last_br, *b;
897 /* Build list of bridges */
899 last_br = &host_bridge.chain;
900 for(d=first_dev; d; d=d->next)
902 word class = get_conf_word(d, PCI_CLASS_DEVICE);
903 byte ht = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
904 if (class == PCI_CLASS_BRIDGE_PCI &&
905 (ht == PCI_HEADER_TYPE_BRIDGE || ht == PCI_HEADER_TYPE_CARDBUS))
907 b = xmalloc(sizeof(struct bridge));
908 if (ht == PCI_HEADER_TYPE_BRIDGE)
910 b->primary = get_conf_byte(d, PCI_CB_PRIMARY_BUS);
911 b->secondary = get_conf_byte(d, PCI_CB_CARD_BUS);
912 b->subordinate = get_conf_byte(d, PCI_CB_SUBORDINATE_BUS);
916 b->primary = get_conf_byte(d, PCI_PRIMARY_BUS);
917 b->secondary = get_conf_byte(d, PCI_SECONDARY_BUS);
918 b->subordinate = get_conf_byte(d, PCI_SUBORDINATE_BUS);
922 b->next = b->child = NULL;
929 /* Create a bridge tree */
931 for(b=&host_bridge; b; b=b->chain)
933 struct bridge *c, *best;
935 for(c=&host_bridge; c; c=c->chain)
936 if (c != b && b->primary >= c->secondary && b->primary <= c->subordinate &&
937 (!best || best->subordinate - best->primary > c->subordinate - c->primary))
941 b->next = best->child;
946 /* Insert secondary bus for each bridge */
948 for(b=&host_bridge; b; b=b->chain)
949 if (!find_bus(b, b->secondary))
950 new_bus(b, b->secondary);
952 /* Create bus structs and link devices */
957 insert_dev(d, &host_bridge);
963 print_it(byte *line, byte *p)
969 if (*p == '+' || *p == '|')
975 static void show_tree_bridge(struct bridge *, byte *, byte *);
978 show_tree_dev(struct device *d, byte *line, byte *p)
980 struct pci_dev *q = d->dev;
984 p += sprintf(p, "%02x.%x", q->dev, q->func);
985 for(b=&host_bridge; b; b=b->chain)
988 if (b->secondary == b->subordinate)
989 p += sprintf(p, "-[%02x]-", b->secondary);
991 p += sprintf(p, "-[%02x-%02x]-", b->secondary, b->subordinate);
992 show_tree_bridge(b, line, p);
996 p += sprintf(p, " %s",
997 pci_lookup_name(pacc, namebuf, sizeof(namebuf),
998 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
999 q->vendor_id, q->device_id));
1004 show_tree_bus(struct bus *b, byte *line, byte *p)
1008 else if (!b->first_dev->next)
1012 show_tree_dev(b->first_dev, line, p);
1016 struct device *d = b->first_dev;
1021 show_tree_dev(d, line, p+2);
1026 show_tree_dev(d, line, p+2);
1031 show_tree_bridge(struct bridge *b, byte *line, byte *p)
1034 if (!b->first_bus->sibling)
1036 if (b == &host_bridge)
1037 p += sprintf(p, "[%02x]-", b->first_bus->number);
1038 show_tree_bus(b->first_bus, line, p);
1042 struct bus *u = b->first_bus;
1047 k = p + sprintf(p, "+-[%02x]-", u->number);
1048 show_tree_bus(u, line, k);
1051 k = p + sprintf(p, "\\-[%02x]-", u->number);
1052 show_tree_bus(u, line, k);
1062 show_tree_bridge(&host_bridge, line, line);
1065 /* Bus mapping mode */
1068 struct bus_bridge *next;
1069 byte this, dev, func, first, last, bug;
1075 struct bus_bridge *bridges, *via;
1078 static struct bus_info *bus_info;
1081 map_bridge(struct bus_info *bi, struct device *d, int np, int ns, int nl)
1083 struct bus_bridge *b = xmalloc(sizeof(struct bus_bridge));
1084 struct pci_dev *p = d->dev;
1086 b->next = bi->bridges;
1088 b->this = get_conf_byte(d, np);
1091 b->first = get_conf_byte(d, ns);
1092 b->last = get_conf_byte(d, nl);
1093 printf("## %02x.%02x:%d is a bridge from %02x to %02x-%02x\n",
1094 p->bus, p->dev, p->func, b->this, b->first, b->last);
1095 if (b->this != p->bus)
1096 printf("!!! Bridge points to invalid primary bus.\n");
1097 if (b->first > b->last)
1099 printf("!!! Bridge points to invalid bus range.\n");
1108 int verbose = pacc->debugging;
1109 struct bus_info *bi = bus_info + bus;
1113 printf("Mapping bus %02x\n", bus);
1114 for(dev = 0; dev < 32; dev++)
1115 if (filter.slot < 0 || filter.slot == dev)
1118 for(func = 0; func < func_limit; func++)
1119 if (filter.func < 0 || filter.func == func)
1121 struct pci_dev *p = pci_get_dev(pacc, bus, dev, func);
1122 u16 vendor = pci_read_word(p, PCI_VENDOR_ID);
1123 if (vendor && vendor != 0xffff)
1125 if (!func && (pci_read_byte(p, PCI_HEADER_TYPE) & 0x80))
1128 printf("Discovered device %02x:%02x.%d\n", bus, dev, func);
1130 if (d = scan_device(p))
1133 switch (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f)
1135 case PCI_HEADER_TYPE_BRIDGE:
1136 map_bridge(bi, d, PCI_PRIMARY_BUS, PCI_SECONDARY_BUS, PCI_SUBORDINATE_BUS);
1138 case PCI_HEADER_TYPE_CARDBUS:
1139 map_bridge(bi, d, PCI_CB_PRIMARY_BUS, PCI_CB_CARD_BUS, PCI_CB_SUBORDINATE_BUS);
1145 printf("But it was filtered out.\n");
1153 do_map_bridges(int bus, int min, int max)
1155 struct bus_info *bi = bus_info + bus;
1156 struct bus_bridge *b;
1159 for(b=bi->bridges; b; b=b->next)
1161 if (bus_info[b->first].guestbook)
1163 else if (b->first < min || b->last > max)
1167 bus_info[b->first].via = b;
1168 do_map_bridges(b->first, b->first, b->last);
1178 printf("\nSummary of buses:\n\n");
1179 for(i=0; i<256; i++)
1180 if (bus_info[i].exists && !bus_info[i].guestbook)
1181 do_map_bridges(i, 0, 255);
1182 for(i=0; i<256; i++)
1184 struct bus_info *bi = bus_info + i;
1185 struct bus_bridge *b = bi->via;
1189 printf("%02x: ", i);
1191 printf("Entered via %02x:%02x.%d\n", b->this, b->dev, b->func);
1193 printf("Primary host bus\n");
1195 printf("Secondary host bus (?)\n");
1197 for(b=bi->bridges; b; b=b->next)
1199 printf("\t%02x.%d Bridge to %02x-%02x", b->dev, b->func, b->first, b->last);
1203 printf(" <overlap bug>");
1206 printf(" <crossing bug>");
1217 if (pacc->method == PCI_ACCESS_PROC_BUS_PCI ||
1218 pacc->method == PCI_ACCESS_DUMP)
1219 printf("WARNING: Bus mapping can be reliable only with direct hardware access enabled.\n\n");
1220 else if (!check_root())
1221 die("Only root can map the bus.");
1222 bus_info = xmalloc(sizeof(struct bus_info) * 256);
1223 bzero(bus_info, sizeof(struct bus_info) * 256);
1224 if (filter.bus >= 0)
1225 do_map_bus(filter.bus);
1229 for(bus=0; bus<256; bus++)
1238 main(int argc, char **argv)
1243 if (argc == 2 && !strcmp(argv[1], "--version"))
1245 puts("lspci version " PCIUTILS_VERSION);
1251 pci_filter_init(pacc, &filter);
1253 while ((i = getopt(argc, argv, options)) != -1)
1257 pacc->numeric_ids = 1;
1263 pacc->buscentric = 1;
1264 buscentric_view = 1;
1267 if (msg = pci_filter_parse_slot(&filter, optarg))
1271 if (msg = pci_filter_parse_id(&filter, optarg))
1281 pacc->id_file_name = optarg;
1290 if (parse_generic_option(i, pacc, optarg))
1293 fprintf(stderr, help_msg, pacc->id_file_name);