2 * $Id: lspci.c,v 1.2 1997/12/23 17:12:02 mj Exp $
4 * Linux PCI Utilities -- List All PCI Devices
6 * Copyright (c) 1997 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
8 * Can be freely distributed and used under the terms of the GNU GPL.
16 #include <linux/pci.h>
22 static int verbose; /* Show detailed information */
23 static int buscentric_view; /* Show bus addresses/IRQ's instead of CPU-visible ones */
24 static int show_hex; /* Show contents of config space as hexadecimal numbers */
25 static int bus_filter = -1; /* Bus, slot, function, vendor and device ID filtering */
26 static int slot_filter = -1;
27 static int func_filter = -1;
28 static int vend_filter = -1;
29 static int dev_filter = -1;
30 static int show_tree; /* Show bus tree */
32 static char options[] = "nvbxB:S:F:V:D:t";
34 static char help_msg[] = "\
35 Usage: lspci [<switches>]\n\
38 -n\tShow numeric ID's\n\
39 -b\tBus-centric view (PCI addresses and IRQ's instead of those seen by the CPU)\n\
40 -x\tShow hex-dump of config space (-xx shows full 256 bytes)\n\
41 -B <bus>, -S <slot>, -F <func>, -V <vendor>, -D <device> Show only selected devices\n\
45 /* Our view of the PCI bus */
51 unsigned int kernel_irq;
52 unsigned long kernel_base_addr[6];
56 static struct device *first_dev, **last_dev = &first_dev;
58 /* Miscellaneous routines */
61 xmalloc(unsigned int howmuch)
63 void *p = malloc(howmuch);
66 fprintf(stderr, "lspci: Unable to allocate %d bytes of memory\n", howmuch);
75 filter_out(struct device *d)
77 return (bus_filter >= 0 && d->bus != bus_filter ||
78 slot_filter >= 0 && PCI_SLOT(d->devfn) != slot_filter ||
79 func_filter >= 0 && PCI_FUNC(d->devfn) != func_filter ||
80 vend_filter >= 0 && d->vendid != vend_filter ||
81 dev_filter >= 0 && d->devid != dev_filter);
84 /* Interface for /proc/bus/pci */
92 if (! (f = fopen(PROC_BUS_PCI "/devices", "r")))
94 perror("Unable to open " PROC_BUS_PCI "/devices");
97 while (fgets(line, sizeof(line), f))
99 struct device *d = xmalloc(sizeof(struct device));
100 unsigned int dfn, vend;
102 sscanf(line, "%x %x %x %lx %lx %lx %lx %lx %lx",
106 &d->kernel_base_addr[0],
107 &d->kernel_base_addr[1],
108 &d->kernel_base_addr[2],
109 &d->kernel_base_addr[3],
110 &d->kernel_base_addr[4],
111 &d->kernel_base_addr[5]);
113 d->devfn = dfn & 0xff;
114 d->vendid = vend >> 16U;
115 d->devid = vend & 0xffff;
127 make_proc_pci_name(struct device *d, char *p)
129 sprintf(p, PROC_BUS_PCI "/%02x/%02x.%x",
130 d->bus, PCI_SLOT(d->devfn), PCI_FUNC(d->devfn));
139 int how_much = (show_hex > 1) ? 256 : 64;
141 for(d=first_dev; d; d=d->next)
143 make_proc_pci_name(d, name);
144 if ((fd = open(name, O_RDONLY)) < 0)
146 fprintf(stderr, "lspci: Unable to open %s: %m\n", name);
149 if (read(fd, d->config, how_much) != how_much)
151 fprintf(stderr, "lspci: Error reading %s: %m\n", name);
165 /* Config space accesses */
168 get_conf_byte(struct device *d, unsigned int pos)
170 return d->config[pos];
174 get_conf_word(struct device *d, unsigned int pos)
176 return d->config[pos] | (d->config[pos+1] << 8);
180 get_conf_long(struct device *d, unsigned int pos)
182 return d->config[pos] |
183 (d->config[pos+1] << 8) |
184 (d->config[pos+2] << 16) |
185 (d->config[pos+3] << 24);
191 compare_them(const void *A, const void *B)
193 const struct device *a = *(const struct device **)A;
194 const struct device *b = *(const struct device **)B;
200 if (a->devfn < b->devfn)
202 if (a->devfn > b->devfn)
210 struct device **index, **h;
215 for(d=first_dev; d; d=d->next)
217 h = index = alloca(sizeof(struct device *) * cnt);
218 for(d=first_dev; d; d=d->next)
220 qsort(index, cnt, sizeof(struct device *), compare_them);
221 last_dev = &first_dev;
226 last_dev = &(*h)->next;
235 show_terse(struct device *d)
239 printf("%02x:%02x.%x %s: %s",
243 lookup_class(get_conf_word(d, PCI_CLASS_DEVICE)),
244 lookup_device_full(d->vendid, d->devid));
245 if (c = get_conf_byte(d, PCI_REVISION_ID))
246 printf(" (rev %02x)", c);
247 if (verbose && (c = get_conf_byte(d, PCI_CLASS_PROG)))
248 printf(" (prog-if %02x)", c);
253 show_bases(struct device *d, int cnt)
255 word cmd = get_conf_word(d, PCI_COMMAND);
261 unsigned int flg = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
265 pos = d->kernel_base_addr[i];
266 if (!pos || pos == 0xffffffff)
269 printf("\tRegion %d: ", i);
272 if (flg & PCI_BASE_ADDRESS_SPACE_IO)
273 printf("I/O ports at %04lx%s\n",
274 pos & PCI_BASE_ADDRESS_IO_MASK,
275 (cmd & PCI_COMMAND_IO) ? "" : " [disabled]");
278 int t = flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
279 printf("Memory at ");
280 if (t == PCI_BASE_ADDRESS_MEM_TYPE_64)
285 if (!buscentric_view)
286 printf("%08x", get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i));
291 printf("%08lx (%s, %sprefetchable)%s\n",
292 pos & PCI_BASE_ADDRESS_MEM_MASK,
293 (t == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32-bit" :
294 (t == PCI_BASE_ADDRESS_MEM_TYPE_64) ? "64-bit" :
295 (t == PCI_BASE_ADDRESS_MEM_TYPE_1M) ? "low-1M 32-bit" : "???",
296 (flg & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-",
297 (cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]");
303 show_htype0(struct device *d)
305 u32 rom = get_conf_long(d, PCI_ROM_ADDRESS);
311 word cmd = get_conf_word(d, PCI_COMMAND);
312 printf("\tExpansion ROM at %08x%s\n", rom & ~0xfff,
313 (cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]");
318 show_htype1(struct device *d)
320 u32 io_base = get_conf_byte(d, PCI_IO_BASE);
321 u32 io_limit = get_conf_byte(d, PCI_IO_LIMIT);
322 u32 io_type = io_base & PCI_IO_RANGE_TYPE_MASK;
323 u32 mem_base = get_conf_word(d, PCI_MEMORY_BASE);
324 u32 mem_limit = get_conf_word(d, PCI_MEMORY_LIMIT);
325 u32 mem_type = mem_base & PCI_MEMORY_RANGE_TYPE_MASK;
326 u32 pref_base = get_conf_word(d, PCI_PREF_MEMORY_BASE);
327 u32 pref_limit = get_conf_word(d, PCI_PREF_MEMORY_LIMIT);
328 u32 pref_type = pref_base & PCI_PREF_RANGE_TYPE_MASK;
329 u32 rom = get_conf_long(d, PCI_ROM_ADDRESS1);
330 word brc = get_conf_word(d, PCI_BRIDGE_CONTROL);
333 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
334 get_conf_byte(d, PCI_PRIMARY_BUS),
335 get_conf_byte(d, PCI_SECONDARY_BUS),
336 get_conf_byte(d, PCI_SUBORDINATE_BUS),
337 get_conf_byte(d, PCI_SEC_LATENCY_TIMER));
339 if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) ||
340 (io_type != PCI_IO_RANGE_TYPE_16 && io_type != PCI_IO_RANGE_TYPE_32))
341 printf("\t!!! Unknown I/O range types %x/%x\n", io_base, io_limit);
344 io_base = (io_base & PCI_IO_RANGE_MASK) << 8;
345 io_limit = (io_limit & PCI_IO_RANGE_MASK) << 8;
346 if (io_type == PCI_IO_RANGE_TYPE_32)
348 io_base |= (get_conf_word(d, PCI_IO_BASE_UPPER16) << 16);
349 io_limit |= (get_conf_word(d, PCI_IO_LIMIT_UPPER16) << 16);
352 printf("\tI/O behind bridge: %08x-%08x\n", io_base, io_limit+0xfff);
355 if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) ||
357 printf("\t!!! Unknown memory range types %x/%x\n", mem_base, mem_limit);
360 mem_base = (mem_base & PCI_MEMORY_RANGE_MASK) << 16;
361 mem_limit = (mem_limit & PCI_MEMORY_RANGE_MASK) << 16;
362 printf("\tMemory behind bridge: %08x-%08x\n", mem_base, mem_limit + 0xfffff);
365 if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) ||
366 (pref_type != PCI_PREF_RANGE_TYPE_32 && pref_type != PCI_PREF_RANGE_TYPE_64))
367 printf("\t!!! Unknown prefetchable memory range types %x/%x\n", pref_base, pref_limit);
370 pref_base = (pref_base & PCI_PREF_RANGE_MASK) << 16;
371 pref_limit = (pref_limit & PCI_PREF_RANGE_MASK) << 16;
372 if (pref_type == PCI_PREF_RANGE_TYPE_32)
373 printf("\tPrefetchable memory behind bridge: %08x-%08x\n", pref_base, pref_limit);
375 printf("\tPrefetchable memory behind bridge: %08x%08x-%08x%08x\n",
376 get_conf_long(d, PCI_PREF_BASE_UPPER32),
378 get_conf_long(d, PCI_PREF_LIMIT_UPPER32),
382 if (get_conf_word(d, PCI_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
383 printf("\tSecondary status: SERR\n");
387 word cmd = get_conf_word(d, PCI_COMMAND);
388 printf("\tExpansion ROM at %08x%s\n", rom & ~0xfff,
389 (cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]");
393 printf("\tBridgeCtl: Parity%c SERR%c NoISA%c VGA%c MAbort%c >Reset%c FastB2B%c\n",
394 (brc & PCI_BRIDGE_CTL_PARITY) ? '+' : '-',
395 (brc & PCI_BRIDGE_CTL_SERR) ? '+' : '-',
396 (brc & PCI_BRIDGE_CTL_NO_ISA) ? '+' : '-',
397 (brc & PCI_BRIDGE_CTL_VGA) ? '+' : '-',
398 (brc & PCI_BRIDGE_CTL_MASTER_ABORT) ? '+' : '-',
399 (brc & PCI_BRIDGE_CTL_BUS_RESET) ? '+' : '-',
400 (brc & PCI_BRIDGE_CTL_FAST_BACK) ? '+' : '-');
404 show_verbose(struct device *d)
406 word status = get_conf_word(d, PCI_STATUS);
407 word cmd = get_conf_word(d, PCI_COMMAND);
408 word class = get_conf_word(d, PCI_CLASS_DEVICE);
409 byte bist = get_conf_byte(d, PCI_BIST);
410 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
411 byte latency = get_conf_byte(d, PCI_LATENCY_TIMER);
412 byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE);
413 byte max_lat, min_gnt;
414 byte int_pin = get_conf_byte(d, PCI_INTERRUPT_PIN);
415 byte int_line = get_conf_byte(d, PCI_INTERRUPT_LINE);
416 unsigned int irq, ex_htype;
417 word subsys_v, subsys_d;
423 case PCI_CLASS_BRIDGE_PCI:
429 if (ex_htype != htype)
431 printf("\t!!! Header type %02x doesn't match class code %04x\n", htype, class);
438 max_lat = get_conf_byte(d, PCI_MAX_LAT);
439 min_gnt = get_conf_byte(d, PCI_MIN_GNT);
440 subsys_v = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
441 subsys_d = get_conf_word(d, PCI_SUBSYSTEM_ID);
444 irq = int_line = int_pin = min_gnt = max_lat = 0;
445 subsys_v = subsys_d = 0;
448 printf("\t!!! Unknown header type %02x\n", htype);
460 printf("\tSubsystem ID: %04x:%04x\n", subsys_v, subsys_d);
461 printf("\tControl: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c\n",
462 (cmd & PCI_COMMAND_IO) ? '+' : '-',
463 (cmd & PCI_COMMAND_MEMORY) ? '+' : '-',
464 (cmd & PCI_COMMAND_MASTER) ? '+' : '-',
465 (cmd & PCI_COMMAND_SPECIAL) ? '+' : '-',
466 (cmd & PCI_COMMAND_INVALIDATE) ? '+' : '-',
467 (cmd & PCI_COMMAND_VGA_PALETTE) ? '+' : '-',
468 (cmd & PCI_COMMAND_PARITY) ? '+' : '-',
469 (cmd & PCI_COMMAND_WAIT) ? '+' : '-',
470 (cmd & PCI_COMMAND_SERR) ? '+' : '-',
471 (cmd & PCI_COMMAND_FAST_BACK) ? '+' : '-');
472 printf("\tStatus: 66Mhz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c >SERR%c <PERR%c\n",
473 (status & PCI_STATUS_66MHZ) ? '+' : '-',
474 (status & PCI_STATUS_UDF) ? '+' : '-',
475 (status & PCI_STATUS_FAST_BACK) ? '+' : '-',
476 (status & PCI_STATUS_PARITY) ? '+' : '-',
477 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
478 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
479 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
480 (status & PCI_STATUS_SIG_TARGET_ABORT) ? '+' : '-',
481 (status & PCI_STATUS_REC_TARGET_ABORT) ? '+' : '-',
482 (status & PCI_STATUS_REC_MASTER_ABORT) ? '+' : '-',
483 (status & PCI_STATUS_SIG_SYSTEM_ERROR) ? '+' : '-',
484 (status & PCI_STATUS_DETECTED_PARITY) ? '+' : '-');
485 if (cmd & PCI_COMMAND_MASTER)
487 printf("\tLatency: ");
489 printf("%d min, ", min_gnt);
491 printf("%d max, ", max_lat);
492 printf("%d set", latency);
494 printf(", cache line size %02x", cache_line);
498 printf("\tInterrupt: pin %c routed to IRQ %d\n", 'A' + int_pin - 1, irq);
503 if (cmd & PCI_COMMAND_MASTER)
504 printf("bus master, ");
505 if (cmd & PCI_COMMAND_VGA_PALETTE)
506 printf("VGA palette snoop, ");
507 if (cmd & PCI_COMMAND_WAIT)
508 printf("stepping, ");
509 if (cmd & PCI_COMMAND_FAST_BACK)
510 printf("fast Back2Back, ");
511 if (status & PCI_STATUS_66MHZ)
513 if (status & PCI_STATUS_UDF)
514 printf("user-definable features, ");
516 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
517 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
518 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??");
519 if (cmd & PCI_COMMAND_MASTER)
520 printf(", latency %d", latency);
523 printf(", IRQ %d", irq);
529 if (bist & PCI_BIST_CAPABLE)
531 if (bist & PCI_BIST_START)
532 printf("\tBIST is running\n");
534 printf("\tBIST result: %02x\n", bist & PCI_BIST_CODE_MASK);
549 show_hex_dump(struct device *d)
552 int limit = (show_hex > 1) ? 256 : 64;
554 for(i=0; i<limit; i++)
558 printf(" %02x", get_conf_byte(d, i));
569 for(d=first_dev; d; d=d->next)
577 if (verbose || show_hex)
585 struct bridge *chain; /* Single-linked list of bridges */
586 struct bridge *next, *child; /* Tree of bridges */
587 struct bus *first_bus; /* List of busses connected to this bridge */
588 unsigned int primary, secondary, subordinate; /* Bus numbers */
589 struct device *br_dev;
595 struct device *first_dev, **last_dev;
598 static struct bridge host_bridge = { NULL, NULL, NULL, NULL, ~0, 0, ~0, NULL };
601 find_bus(struct bridge *b, unsigned int n)
605 for(bus=b->first_bus; bus; bus=bus->sibling)
606 if (bus->number == n)
612 new_bus(struct bridge *b, unsigned int n)
614 struct bus *bus = xmalloc(sizeof(struct bus));
616 bus = xmalloc(sizeof(struct bus));
618 bus->sibling = b->first_bus;
619 bus->first_dev = NULL;
620 bus->last_dev = &bus->first_dev;
626 insert_dev(struct device *d, struct bridge *b)
630 if (! (bus = find_bus(b, d->bus)))
633 for(c=b->child; c; c=c->next)
634 if (c->secondary <= d->bus && d->bus <= c->subordinate)
635 return insert_dev(d, c);
636 bus = new_bus(b, d->bus);
638 /* Simple insertion at the end _does_ guarantee the correct order as the
639 * original device list was sorted by (bus, devfn) lexicographically
640 * and all devices on the new list have the same bus number.
643 bus->last_dev = &d->next;
650 struct device *d, *d2;
651 struct bridge *first_br, *b;
653 /* Build list of bridges */
655 first_br = &host_bridge;
656 for(d=first_dev; d; d=d->next)
658 word class = get_conf_word(d, PCI_CLASS_DEVICE);
659 if (class == PCI_CLASS_BRIDGE_PCI && (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f) == 1)
661 b = xmalloc(sizeof(struct bridge));
662 b->primary = get_conf_byte(d, PCI_PRIMARY_BUS);
663 b->secondary = get_conf_byte(d, PCI_SECONDARY_BUS);
664 b->subordinate = get_conf_byte(d, PCI_SUBORDINATE_BUS);
667 b->next = b->child = NULL;
673 /* Create a bridge tree */
675 for(b=first_br; b; b=b->chain)
677 struct bridge *c, *best;
679 for(c=first_br; c; c=c->chain)
680 if (c != b && b->primary >= c->secondary && b->primary <= c->subordinate &&
681 (!best || best->subordinate - best->primary > c->subordinate - c->primary))
685 b->next = best->child;
690 /* Insert secondary bus for each bridge */
692 for(b=first_br; b; b=b->chain)
693 if (!find_bus(b, b->secondary))
694 new_bus(b, b->secondary);
696 /* Create bus structs and link devices */
701 insert_dev(d, &host_bridge);
707 print_it(byte *line, byte *p)
719 static void show_tree_bridge(struct bridge *, byte *, byte *);
722 show_tree_dev(struct device *d, byte *line, byte *p)
726 p += sprintf(p, "%02x.%x", PCI_SLOT(d->devfn), PCI_FUNC(d->devfn));
727 for(b=&host_bridge; b; b=b->chain)
730 p += sprintf(p, "-[%02x-%02x]-", b->secondary, b->subordinate);
731 show_tree_bridge(b, line, p);
738 show_tree_bus(struct bus *b, byte *line, byte *p)
742 else if (!b->first_dev->next)
746 show_tree_dev(b->first_dev, line, p);
750 struct device *d = b->first_dev;
755 show_tree_dev(d, line, p+2);
760 show_tree_dev(d, line, p+2);
765 show_tree_bridge(struct bridge *b, byte *line, byte *p)
768 if (!b->first_bus->sibling)
770 if (b == &host_bridge)
771 p += sprintf(p, "[%02x]-", b->first_bus->number);
772 show_tree_bus(b->first_bus, line, p);
776 struct bus *u = b->first_bus;
781 k = p + sprintf(p, "+-[%02x]-", u->number);
782 show_tree_bus(u, line, k);
785 k = p + sprintf(p, "\\-[%02x]-", u->number);
786 show_tree_bus(u, line, k);
796 show_tree_bridge(&host_bridge, line, line);
802 main(int argc, char **argv)
806 while ((i = getopt(argc, argv, options)) != -1)
810 show_numeric_ids = 1;
819 bus_filter = strtol(optarg, NULL, 16);
822 slot_filter = strtol(optarg, NULL, 16);
825 func_filter = strtol(optarg, NULL, 16);
828 vend_filter = strtol(optarg, NULL, 16);
831 dev_filter = strtol(optarg, NULL, 16);
841 fprintf(stderr, help_msg);