2 * $Id: lspci.c,v 1.40 2002/03/24 12:58:05 mj Exp $
4 * Linux PCI Utilities -- List All PCI Devices
6 * Copyright (c) 1997--1999 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
8 * Can be freely distributed and used under the terms of the GNU GPL.
21 static int verbose; /* Show detailed information */
22 static int buscentric_view; /* Show bus addresses/IRQ's instead of CPU-visible ones */
23 static int show_hex; /* Show contents of config space as hexadecimal numbers */
24 static struct pci_filter filter; /* Device filter */
25 static int show_tree; /* Show bus tree */
26 static int machine_readable; /* Generate machine-readable output */
27 static int map_mode; /* Bus mapping mode enabled */
29 static char options[] = "nvbxs:d:ti:mgM" GENERIC_OPTIONS ;
31 static char help_msg[] = "\
32 Usage: lspci [<switches>]\n\
35 -n\t\tShow numeric ID's\n\
36 -b\t\tBus-centric view (PCI addresses and IRQ's instead of those seen by the CPU)\n\
37 -x\t\tShow hex-dump of config space\n\
38 -s [[<bus>]:][<slot>][.[<func>]]\tShow only devices in selected slots\n\
39 -d [<vendor>]:[<device>]\tShow only selected devices\n\
40 -t\t\tShow bus tree\n\
41 -m\t\tProduce machine-readable output\n\
42 -i <file>\tUse specified ID database instead of %s\n\
43 -M\t\tEnable `bus mapping' mode (dangerous; root only)\n"
47 /* Communication with libpci */
49 static struct pci_access *pacc;
51 /* Format strings used for IRQ numbers and memory addresses */
54 #define IRQ_FORMAT "%08x"
56 #define IRQ_FORMAT "%d"
59 #ifdef HAVE_64BIT_ADDRESS
60 #ifdef HAVE_LONG_ADDRESS
61 #define ADDR_FORMAT "%016Lx"
63 #define ADDR_FORMAT "%016lx"
66 #define ADDR_FORMAT "%08lx"
70 #define IO_FORMAT "%016Lx"
71 #elif defined(HAVE_LONG_ADDRESS)
72 #define IO_FORMAT "%04Lx"
74 #define IO_FORMAT "%04lx"
78 * If we aren't being compiled by GCC, use malloc() instead of alloca().
79 * This increases our memory footprint, but only slightly since we don't
87 /* Our view of the PCI bus */
92 unsigned int config_cnt;
96 static struct device *first_dev;
98 static struct device *
99 scan_device(struct pci_dev *p)
101 int how_much = (show_hex > 2) ? 256 : 64;
104 if (!pci_filter_match(&filter, p))
106 d = xmalloc(sizeof(struct device));
107 bzero(d, sizeof(*d));
109 if (!pci_read_block(p, 0, d->config, how_much))
110 die("Unable to read %d bytes of configuration space.", how_much);
111 if (how_much < 128 && (d->config[PCI_HEADER_TYPE] & 0x7f) == PCI_HEADER_TYPE_CARDBUS)
113 /* For cardbus bridges, we need to fetch 64 bytes more to get the full standard header... */
114 if (!pci_read_block(p, 64, d->config+64, 64))
115 die("Unable to read cardbus bridge extension data.");
118 d->config_cnt = how_much;
119 pci_setup_cache(p, d->config, d->config_cnt);
120 pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_IRQ | PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES);
131 for(p=pacc->devices; p; p=p->next)
132 if (d = scan_device(p))
142 static int is_root = -1;
145 is_root = !geteuid();
150 config_fetch(struct device *d, unsigned int pos, unsigned int len)
152 if (pos + len < d->config_cnt)
154 if (pacc->method != PCI_ACCESS_DUMP && !check_root())
156 return pci_read_block(d->dev, pos, d->config + pos, len);
159 /* Config space accesses */
162 get_conf_byte(struct device *d, unsigned int pos)
164 return d->config[pos];
168 get_conf_word(struct device *d, unsigned int pos)
170 return d->config[pos] | (d->config[pos+1] << 8);
174 get_conf_long(struct device *d, unsigned int pos)
176 return d->config[pos] |
177 (d->config[pos+1] << 8) |
178 (d->config[pos+2] << 16) |
179 (d->config[pos+3] << 24);
185 compare_them(const void *A, const void *B)
187 const struct pci_dev *a = (*(const struct device **)A)->dev;
188 const struct pci_dev *b = (*(const struct device **)B)->dev;
198 if (a->func < b->func)
200 if (a->func > b->func)
208 struct device **index, **h, **last_dev;
213 for(d=first_dev; d; d=d->next)
215 h = index = alloca(sizeof(struct device *) * cnt);
216 for(d=first_dev; d; d=d->next)
218 qsort(index, cnt, sizeof(struct device *), compare_them);
219 last_dev = &first_dev;
224 last_dev = &(*h)->next;
232 #define FLAG(x,y) ((x & y) ? '+' : '-')
235 show_terse(struct device *d)
238 struct pci_dev *p = d->dev;
239 byte classbuf[128], devbuf[128];
241 printf("%02x:%02x.%x %s: %s",
245 pci_lookup_name(pacc, classbuf, sizeof(classbuf),
247 get_conf_word(d, PCI_CLASS_DEVICE), 0, 0, 0),
248 pci_lookup_name(pacc, devbuf, sizeof(devbuf),
249 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
250 p->vendor_id, p->device_id, 0, 0));
251 if (c = get_conf_byte(d, PCI_REVISION_ID))
252 printf(" (rev %02x)", c);
256 c = get_conf_byte(d, PCI_CLASS_PROG);
257 x = pci_lookup_name(pacc, devbuf, sizeof(devbuf),
259 get_conf_word(d, PCI_CLASS_DEVICE), c, 0, 0);
262 printf(" (prog-if %02x", c);
272 show_size(pciaddr_t x)
278 printf("%d", (int) x);
279 else if (x < 1048576)
280 printf("%dK", (int)(x / 1024));
281 else if (x < 0x80000000)
282 printf("%dM", (int)(x / 1048576));
284 printf(ADDR_FORMAT, x);
289 show_bases(struct device *d, int cnt)
291 struct pci_dev *p = d->dev;
292 word cmd = get_conf_word(d, PCI_COMMAND);
297 pciaddr_t pos = p->base_addr[i];
298 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->size[i] : 0;
299 u32 flg = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
300 if (flg == 0xffffffff)
302 if (!pos && !flg && !len)
305 printf("\tRegion %d: ", i);
308 if (pos && !flg) /* Reported by the OS, but not by the device */
310 printf("[virtual] ");
313 if (flg & PCI_BASE_ADDRESS_SPACE_IO)
315 pciaddr_t a = pos & PCI_BASE_ADDRESS_IO_MASK;
316 printf("I/O ports at ");
318 printf(IO_FORMAT, a);
319 else if (flg & PCI_BASE_ADDRESS_IO_MASK)
322 printf("<unassigned>");
323 if (!(cmd & PCI_COMMAND_IO))
324 printf(" [disabled]");
328 int t = flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
329 pciaddr_t a = pos & PCI_ADDR_MEM_MASK;
333 printf("Memory at ");
334 if (t == PCI_BASE_ADDRESS_MEM_TYPE_64)
338 printf("<invalid-64bit-slot>");
344 z = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
348 printf("%08x" ADDR_FORMAT, z, a);
350 printf("<unassigned>");
358 printf(ADDR_FORMAT, a);
360 printf(((flg & PCI_BASE_ADDRESS_MEM_MASK) || z) ? "<ignored>" : "<unassigned>");
362 printf(" (%s, %sprefetchable)",
363 (t == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32-bit" :
364 (t == PCI_BASE_ADDRESS_MEM_TYPE_64) ? "64-bit" :
365 (t == PCI_BASE_ADDRESS_MEM_TYPE_1M) ? "low-1M" : "type 3",
366 (flg & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-");
367 if (!(cmd & PCI_COMMAND_MEMORY))
368 printf(" [disabled]");
376 show_pm(struct device *d, int where, int cap)
379 static int pm_aux_current[8] = { 0, 55, 100, 160, 220, 270, 320, 375 };
381 printf("Power Management version %d\n", cap & PCI_PM_CAP_VER_MASK);
384 printf("\t\tFlags: PMEClk%c DSI%c D1%c D2%c AuxCurrent=%dmA PME(D0%c,D1%c,D2%c,D3hot%c,D3cold%c)\n",
385 FLAG(cap, PCI_PM_CAP_PME_CLOCK),
386 FLAG(cap, PCI_PM_CAP_DSI),
387 FLAG(cap, PCI_PM_CAP_D1),
388 FLAG(cap, PCI_PM_CAP_D2),
389 pm_aux_current[(cap >> 6) & 7],
390 FLAG(cap, PCI_PM_CAP_PME_D0),
391 FLAG(cap, PCI_PM_CAP_PME_D1),
392 FLAG(cap, PCI_PM_CAP_PME_D2),
393 FLAG(cap, PCI_PM_CAP_PME_D3_HOT),
394 FLAG(cap, PCI_PM_CAP_PME_D3_COLD));
395 config_fetch(d, where + PCI_PM_CTRL, PCI_PM_SIZEOF - PCI_PM_CTRL);
396 t = get_conf_word(d, where + PCI_PM_CTRL);
397 printf("\t\tStatus: D%d PME-Enable%c DSel=%d DScale=%d PME%c\n",
398 t & PCI_PM_CTRL_STATE_MASK,
399 FLAG(t, PCI_PM_CTRL_PME_ENABLE),
400 (t & PCI_PM_CTRL_DATA_SEL_MASK) >> 9,
401 (t & PCI_PM_CTRL_DATA_SCALE_MASK) >> 13,
402 FLAG(t, PCI_PM_CTRL_PME_STATUS));
403 b = get_conf_byte(d, where + PCI_PM_PPB_EXTENSIONS);
405 printf("\t\tBridge: PM%c B3%c\n",
406 FLAG(t, PCI_PM_BPCC_ENABLE),
407 FLAG(~t, PCI_PM_PPB_B2_B3));
411 format_agp_rate(int rate, char *buf)
422 *c++ = '0' + (1 << i);
427 strcpy(buf, "<none>");
431 show_agp(struct device *d, int where, int cap)
437 printf("AGP version %x.%x\n", cap/16, cap%16);
440 config_fetch(d, where + PCI_AGP_STATUS, PCI_AGP_SIZEOF - PCI_AGP_STATUS);
441 t = get_conf_long(d, where + PCI_AGP_STATUS);
442 format_agp_rate(t & 7, rate);
443 printf("\t\tStatus: RQ=%d SBA%c 64bit%c FW%c Rate=%s\n",
444 (t & PCI_AGP_STATUS_RQ_MASK) >> 24U,
445 FLAG(t, PCI_AGP_STATUS_SBA),
446 FLAG(t, PCI_AGP_STATUS_64BIT),
447 FLAG(t, PCI_AGP_STATUS_FW),
449 t = get_conf_long(d, where + PCI_AGP_COMMAND);
450 format_agp_rate(t & 7, rate);
451 printf("\t\tCommand: RQ=%d SBA%c AGP%c 64bit%c FW%c Rate=%s\n",
452 (t & PCI_AGP_COMMAND_RQ_MASK) >> 24U,
453 FLAG(t, PCI_AGP_COMMAND_SBA),
454 FLAG(t, PCI_AGP_COMMAND_AGP),
455 FLAG(t, PCI_AGP_COMMAND_64BIT),
456 FLAG(t, PCI_AGP_COMMAND_FW),
461 show_pcix_nobridge(struct device *d, int where)
463 u16 command = get_conf_word(d, where + PCI_PCIX_COMMAND);
464 u32 status = get_conf_long(d, where + PCI_PCIX_STATUS);
465 printf("PCI-X non-bridge device.\n");
468 printf("\t\tCommand: DPERE%c ERO%c RBC=%d OST=%d\n",
469 FLAG(command, PCI_PCIX_COMMAND_DPERE),
470 FLAG(command, PCI_PCIX_COMMAND_ERO),
471 ((command & PCI_PCIX_COMMAND_MAX_MEM_READ_BYTE_COUNT) >> 2U),
472 ((command & PCI_PCIX_COMMAND_MAX_OUTSTANDING_SPLIT_TRANS) >> 4U));
473 printf("\t\tStatus: Bus=%u Dev=%u Func=%u 64bit%c 133MHz%c SCD%c USC%c, DC=%s, DMMRBC=%u, DMOST=%u, DMCRS=%u, RSCEM%c",
474 ((status >> 8) & 0xffU), // bus
475 ((status >> 3) & 0x1fU), // dev
476 (status & PCI_PCIX_BRIDGE_STATUS_FUNCTION), // function
477 FLAG(status, PCI_PCIX_STATUS_64BIT),
478 FLAG(status, PCI_PCIX_STATUS_133MHZ),
479 FLAG(status, PCI_PCIX_STATUS_SC_DISCARDED),
480 FLAG(status, PCI_PCIX_STATUS_UNEXPECTED_SC),
481 ((status & PCI_PCIX_STATUS_DEVICE_COMPLEXITY) ? "bridge" : "simple"),
482 ((status >> 21) & 3U),
483 ((status >> 23) & 7U),
484 ((status >> 26) & 7U),
485 FLAG(status, PCI_PCIX_STATUS_RCVD_SC_ERR_MESS));
489 show_pcix_bridge(struct device *d, int where)
492 u32 status, upstcr, downstcr;
493 printf("PCI-X bridge device.\n");
496 secstatus = get_conf_word(d, where + PCI_PCIX_BRIDGE_SEC_STATUS);
497 printf("\t\tSecondary Status: 64bit%c, 133MHz%c, SCD%c, USC%c, SCO%c, SRD%c Freq=%d\n",
498 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_64BIT),
499 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_133MHZ),
500 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_SC_DISCARDED),
501 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_UNEXPECTED_SC),
502 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_SC_OVERRUN),
503 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_SPLIT_REQUEST_DELAYED),
504 ((secstatus >> 6) & 7));
505 status = get_conf_long(d, where + PCI_PCIX_BRIDGE_STATUS);
506 printf("\t\tStatus: Bus=%u Dev=%u Func=%u 64bit%c 133MHz%c SCD%c USC%c, SCO%c, SRD%c\n",
507 ((status >> 8) & 0xff), // bus
508 ((status >> 3) & 0x1f), // dev
509 (status & PCI_PCIX_BRIDGE_STATUS_FUNCTION), // function
510 FLAG(status, PCI_PCIX_BRIDGE_STATUS_64BIT),
511 FLAG(status, PCI_PCIX_BRIDGE_STATUS_133MHZ),
512 FLAG(status, PCI_PCIX_BRIDGE_STATUS_SC_DISCARDED),
513 FLAG(status, PCI_PCIX_BRIDGE_STATUS_UNEXPECTED_SC),
514 FLAG(status, PCI_PCIX_BRIDGE_STATUS_SC_OVERRUN),
515 FLAG(status, PCI_PCIX_BRIDGE_STATUS_SPLIT_REQUEST_DELAYED));
516 upstcr = get_conf_long(d, where + PCI_PCIX_BRIDGE_UPSTREAM_SPLIT_TRANS_CTRL);
517 printf("\t\t: Upstream: Capacity=%u, Commitment Limit=%u\n",
518 (upstcr & PCI_PCIX_BRIDGE_STR_CAPACITY),
519 (upstcr >> 16) & 0xffff);
520 downstcr = get_conf_long(d, where + PCI_PCIX_BRIDGE_DOWNSTREAM_SPLIT_TRANS_CTRL);
521 printf("\t\t: Downstream: Capacity=%u, Commitment Limit=%u\n",
522 (downstcr & PCI_PCIX_BRIDGE_STR_CAPACITY),
523 (downstcr >> 16) & 0xffff);
527 show_pcix(struct device *d, int where)
529 switch (d->dev->hdrtype)
531 case PCI_HEADER_TYPE_NORMAL:
532 show_pcix_nobridge(d, where);
534 case PCI_HEADER_TYPE_BRIDGE:
535 show_pcix_bridge(d, where);
541 show_rom(struct device *d)
543 struct pci_dev *p = d->dev;
544 pciaddr_t rom = p->rom_base_addr;
545 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->rom_size : 0;
549 printf("\tExpansion ROM at ");
550 if (rom & PCI_ROM_ADDRESS_MASK)
551 printf(ADDR_FORMAT, rom & PCI_ROM_ADDRESS_MASK);
553 printf("<unassigned>");
554 if (!(rom & PCI_ROM_ADDRESS_ENABLE))
555 printf(" [disabled]");
561 show_msi(struct device *d, int where, int cap)
567 printf("Message Signalled Interrupts: 64bit%c Queue=%d/%d Enable%c\n",
568 FLAG(cap, PCI_MSI_FLAGS_64BIT),
569 (cap & PCI_MSI_FLAGS_QSIZE) >> 4,
570 (cap & PCI_MSI_FLAGS_QMASK) >> 1,
571 FLAG(cap, PCI_MSI_FLAGS_ENABLE));
574 is64 = cap & PCI_MSI_FLAGS_64BIT;
575 config_fetch(d, where + PCI_MSI_ADDRESS_LO, (is64 ? PCI_MSI_DATA_64 : PCI_MSI_DATA_32) + 2 - PCI_MSI_ADDRESS_LO);
576 printf("\t\tAddress: ");
579 t = get_conf_long(d, where + PCI_MSI_ADDRESS_HI);
580 w = get_conf_word(d, where + PCI_MSI_DATA_64);
584 w = get_conf_word(d, where + PCI_MSI_DATA_32);
585 t = get_conf_long(d, where + PCI_MSI_ADDRESS_LO);
586 printf("%08x Data: %04x\n", t, w);
592 int esr = cap & 0xff;
595 printf("Slot ID: %d slots, First%c, chassis %02x\n",
596 esr & PCI_SID_ESR_NSLOTS,
597 FLAG(esr, PCI_SID_ESR_FIC),
602 show_caps(struct device *d)
604 if (get_conf_word(d, PCI_STATUS) & PCI_STATUS_CAP_LIST)
606 int where = get_conf_byte(d, PCI_CAPABILITY_LIST) & ~3;
610 printf("\tCapabilities: ");
611 if (!config_fetch(d, where, 4))
613 puts("<available only to root>");
616 id = get_conf_byte(d, where + PCI_CAP_LIST_ID);
617 next = get_conf_byte(d, where + PCI_CAP_LIST_NEXT) & ~3;
618 cap = get_conf_word(d, where + PCI_CAP_FLAGS);
619 printf("[%02x] ", where);
622 printf("<chain broken>\n");
628 show_pm(d, where, cap);
631 show_agp(d, where, cap);
634 printf("Vital Product Data\n");
636 case PCI_CAP_ID_SLOTID:
640 show_msi(d, where, cap);
642 case PCI_CAP_ID_PCIX:
646 printf("#%02x [%04x]\n", id, cap);
654 show_htype0(struct device *d)
662 show_htype1(struct device *d)
664 u32 io_base = get_conf_byte(d, PCI_IO_BASE);
665 u32 io_limit = get_conf_byte(d, PCI_IO_LIMIT);
666 u32 io_type = io_base & PCI_IO_RANGE_TYPE_MASK;
667 u32 mem_base = get_conf_word(d, PCI_MEMORY_BASE);
668 u32 mem_limit = get_conf_word(d, PCI_MEMORY_LIMIT);
669 u32 mem_type = mem_base & PCI_MEMORY_RANGE_TYPE_MASK;
670 u32 pref_base = get_conf_word(d, PCI_PREF_MEMORY_BASE);
671 u32 pref_limit = get_conf_word(d, PCI_PREF_MEMORY_LIMIT);
672 u32 pref_type = pref_base & PCI_PREF_RANGE_TYPE_MASK;
673 word brc = get_conf_word(d, PCI_BRIDGE_CONTROL);
674 int verb = verbose > 2;
677 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
678 get_conf_byte(d, PCI_PRIMARY_BUS),
679 get_conf_byte(d, PCI_SECONDARY_BUS),
680 get_conf_byte(d, PCI_SUBORDINATE_BUS),
681 get_conf_byte(d, PCI_SEC_LATENCY_TIMER));
683 if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) ||
684 (io_type != PCI_IO_RANGE_TYPE_16 && io_type != PCI_IO_RANGE_TYPE_32))
685 printf("\t!!! Unknown I/O range types %x/%x\n", io_base, io_limit);
688 io_base = (io_base & PCI_IO_RANGE_MASK) << 8;
689 io_limit = (io_limit & PCI_IO_RANGE_MASK) << 8;
690 if (io_type == PCI_IO_RANGE_TYPE_32)
692 io_base |= (get_conf_word(d, PCI_IO_BASE_UPPER16) << 16);
693 io_limit |= (get_conf_word(d, PCI_IO_LIMIT_UPPER16) << 16);
695 if (io_base <= io_limit || verb)
696 printf("\tI/O behind bridge: %08x-%08x\n", io_base, io_limit+0xfff);
699 if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) ||
701 printf("\t!!! Unknown memory range types %x/%x\n", mem_base, mem_limit);
704 mem_base = (mem_base & PCI_MEMORY_RANGE_MASK) << 16;
705 mem_limit = (mem_limit & PCI_MEMORY_RANGE_MASK) << 16;
706 if (mem_base <= mem_limit || verb)
707 printf("\tMemory behind bridge: %08x-%08x\n", mem_base, mem_limit + 0xfffff);
710 if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) ||
711 (pref_type != PCI_PREF_RANGE_TYPE_32 && pref_type != PCI_PREF_RANGE_TYPE_64))
712 printf("\t!!! Unknown prefetchable memory range types %x/%x\n", pref_base, pref_limit);
715 pref_base = (pref_base & PCI_PREF_RANGE_MASK) << 16;
716 pref_limit = (pref_limit & PCI_PREF_RANGE_MASK) << 16;
717 if (pref_base <= pref_limit || verb)
719 if (pref_type == PCI_PREF_RANGE_TYPE_32)
720 printf("\tPrefetchable memory behind bridge: %08x-%08x\n", pref_base, pref_limit + 0xfffff);
722 printf("\tPrefetchable memory behind bridge: %08x%08x-%08x%08x\n",
723 get_conf_long(d, PCI_PREF_BASE_UPPER32),
725 get_conf_long(d, PCI_PREF_LIMIT_UPPER32),
730 if (get_conf_word(d, PCI_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
731 printf("\tSecondary status: SERR\n");
736 printf("\tBridgeCtl: Parity%c SERR%c NoISA%c VGA%c MAbort%c >Reset%c FastB2B%c\n",
737 FLAG(brc, PCI_BRIDGE_CTL_PARITY),
738 FLAG(brc, PCI_BRIDGE_CTL_SERR),
739 FLAG(brc, PCI_BRIDGE_CTL_NO_ISA),
740 FLAG(brc, PCI_BRIDGE_CTL_VGA),
741 FLAG(brc, PCI_BRIDGE_CTL_MASTER_ABORT),
742 FLAG(brc, PCI_BRIDGE_CTL_BUS_RESET),
743 FLAG(brc, PCI_BRIDGE_CTL_FAST_BACK));
749 show_htype2(struct device *d)
752 word cmd = get_conf_word(d, PCI_COMMAND);
753 word brc = get_conf_word(d, PCI_CB_BRIDGE_CONTROL);
754 word exca = get_conf_word(d, PCI_CB_LEGACY_MODE_BASE);
755 int verb = verbose > 2;
758 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
759 get_conf_byte(d, PCI_CB_PRIMARY_BUS),
760 get_conf_byte(d, PCI_CB_CARD_BUS),
761 get_conf_byte(d, PCI_CB_SUBORDINATE_BUS),
762 get_conf_byte(d, PCI_CB_LATENCY_TIMER));
766 u32 base = get_conf_long(d, PCI_CB_MEMORY_BASE_0 + p);
767 u32 limit = get_conf_long(d, PCI_CB_MEMORY_LIMIT_0 + p);
768 if (limit > base || verb)
769 printf("\tMemory window %d: %08x-%08x%s%s\n", i, base, limit,
770 (cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]",
771 (brc & (PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 << i)) ? " (prefetchable)" : "");
776 u32 base = get_conf_long(d, PCI_CB_IO_BASE_0 + p);
777 u32 limit = get_conf_long(d, PCI_CB_IO_LIMIT_0 + p);
778 if (!(base & PCI_IO_RANGE_TYPE_32))
783 base &= PCI_CB_IO_RANGE_MASK;
784 limit = (limit & PCI_CB_IO_RANGE_MASK) + 3;
785 if (base <= limit || verb)
786 printf("\tI/O window %d: %08x-%08x%s\n", i, base, limit,
787 (cmd & PCI_COMMAND_IO) ? "" : " [disabled]");
790 if (get_conf_word(d, PCI_CB_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
791 printf("\tSecondary status: SERR\n");
793 printf("\tBridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c\n",
794 FLAG(brc, PCI_CB_BRIDGE_CTL_PARITY),
795 FLAG(brc, PCI_CB_BRIDGE_CTL_SERR),
796 FLAG(brc, PCI_CB_BRIDGE_CTL_ISA),
797 FLAG(brc, PCI_CB_BRIDGE_CTL_VGA),
798 FLAG(brc, PCI_CB_BRIDGE_CTL_MASTER_ABORT),
799 FLAG(brc, PCI_CB_BRIDGE_CTL_CB_RESET),
800 FLAG(brc, PCI_CB_BRIDGE_CTL_16BIT_INT),
801 FLAG(brc, PCI_CB_BRIDGE_CTL_POST_WRITES));
803 printf("\t16-bit legacy interface ports at %04x\n", exca);
807 show_verbose(struct device *d)
809 struct pci_dev *p = d->dev;
810 word status = get_conf_word(d, PCI_STATUS);
811 word cmd = get_conf_word(d, PCI_COMMAND);
812 word class = get_conf_word(d, PCI_CLASS_DEVICE);
813 byte bist = get_conf_byte(d, PCI_BIST);
814 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
815 byte latency = get_conf_byte(d, PCI_LATENCY_TIMER);
816 byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE);
817 byte max_lat, min_gnt;
818 byte int_pin = get_conf_byte(d, PCI_INTERRUPT_PIN);
819 unsigned int irq = p->irq;
820 word subsys_v, subsys_d;
827 case PCI_HEADER_TYPE_NORMAL:
828 if (class == PCI_CLASS_BRIDGE_PCI)
829 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
830 max_lat = get_conf_byte(d, PCI_MAX_LAT);
831 min_gnt = get_conf_byte(d, PCI_MIN_GNT);
832 subsys_v = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
833 subsys_d = get_conf_word(d, PCI_SUBSYSTEM_ID);
835 case PCI_HEADER_TYPE_BRIDGE:
836 if (class != PCI_CLASS_BRIDGE_PCI)
837 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
838 irq = int_pin = min_gnt = max_lat = 0;
839 subsys_v = subsys_d = 0;
841 case PCI_HEADER_TYPE_CARDBUS:
842 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
843 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
844 min_gnt = max_lat = 0;
845 subsys_v = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
846 subsys_d = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
849 printf("\t!!! Unknown header type %02x\n", htype);
853 if (subsys_v && subsys_v != 0xffff)
854 printf("\tSubsystem: %s\n",
855 pci_lookup_name(pacc, ssnamebuf, sizeof(ssnamebuf),
856 PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
857 p->vendor_id, p->device_id, subsys_v, subsys_d));
861 printf("\tControl: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c\n",
862 FLAG(cmd, PCI_COMMAND_IO),
863 FLAG(cmd, PCI_COMMAND_MEMORY),
864 FLAG(cmd, PCI_COMMAND_MASTER),
865 FLAG(cmd, PCI_COMMAND_SPECIAL),
866 FLAG(cmd, PCI_COMMAND_INVALIDATE),
867 FLAG(cmd, PCI_COMMAND_VGA_PALETTE),
868 FLAG(cmd, PCI_COMMAND_PARITY),
869 FLAG(cmd, PCI_COMMAND_WAIT),
870 FLAG(cmd, PCI_COMMAND_SERR),
871 FLAG(cmd, PCI_COMMAND_FAST_BACK));
872 printf("\tStatus: Cap%c 66Mhz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c >SERR%c <PERR%c\n",
873 FLAG(status, PCI_STATUS_CAP_LIST),
874 FLAG(status, PCI_STATUS_66MHZ),
875 FLAG(status, PCI_STATUS_UDF),
876 FLAG(status, PCI_STATUS_FAST_BACK),
877 FLAG(status, PCI_STATUS_PARITY),
878 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
879 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
880 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
881 FLAG(status, PCI_STATUS_SIG_TARGET_ABORT),
882 FLAG(status, PCI_STATUS_REC_TARGET_ABORT),
883 FLAG(status, PCI_STATUS_REC_MASTER_ABORT),
884 FLAG(status, PCI_STATUS_SIG_SYSTEM_ERROR),
885 FLAG(status, PCI_STATUS_DETECTED_PARITY));
886 if (cmd & PCI_COMMAND_MASTER)
888 printf("\tLatency: %d", latency);
889 if (min_gnt || max_lat)
893 printf("%dns min", min_gnt*250);
894 if (min_gnt && max_lat)
897 printf("%dns max", max_lat*250);
901 printf(", cache line size %02x", cache_line);
905 printf("\tInterrupt: pin %c routed to IRQ " IRQ_FORMAT "\n",
906 (int_pin ? 'A' + int_pin - 1 : '?'), irq);
911 if (cmd & PCI_COMMAND_MASTER)
912 printf("bus master, ");
913 if (cmd & PCI_COMMAND_VGA_PALETTE)
914 printf("VGA palette snoop, ");
915 if (cmd & PCI_COMMAND_WAIT)
916 printf("stepping, ");
917 if (cmd & PCI_COMMAND_FAST_BACK)
918 printf("fast Back2Back, ");
919 if (status & PCI_STATUS_66MHZ)
921 if (status & PCI_STATUS_UDF)
922 printf("user-definable features, ");
924 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
925 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
926 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??");
927 if (cmd & PCI_COMMAND_MASTER)
928 printf(", latency %d", latency);
930 printf(", IRQ " IRQ_FORMAT, irq);
934 if (bist & PCI_BIST_CAPABLE)
936 if (bist & PCI_BIST_START)
937 printf("\tBIST is running\n");
939 printf("\tBIST result: %02x\n", bist & PCI_BIST_CODE_MASK);
944 case PCI_HEADER_TYPE_NORMAL:
947 case PCI_HEADER_TYPE_BRIDGE:
950 case PCI_HEADER_TYPE_CARDBUS:
957 show_hex_dump(struct device *d)
961 for(i=0; i<d->config_cnt; i++)
965 printf(" %02x", get_conf_byte(d, i));
972 show_machine(struct device *d)
974 struct pci_dev *p = d->dev;
976 word sv_id=0, sd_id=0;
977 char classbuf[128], vendbuf[128], devbuf[128], svbuf[128], sdbuf[128];
979 switch (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f)
981 case PCI_HEADER_TYPE_NORMAL:
982 sv_id = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
983 sd_id = get_conf_word(d, PCI_SUBSYSTEM_ID);
985 case PCI_HEADER_TYPE_CARDBUS:
986 sv_id = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
987 sd_id = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
993 printf("Device:\t%02x:%02x.%x\n", p->bus, p->dev, p->func);
994 printf("Class:\t%s\n",
995 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, get_conf_word(d, PCI_CLASS_DEVICE), 0, 0, 0));
996 printf("Vendor:\t%s\n",
997 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id, 0, 0));
998 printf("Device:\t%s\n",
999 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, 0, 0));
1000 if (sv_id && sv_id != 0xffff)
1002 printf("SVendor:\t%s\n",
1003 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id, sv_id, sd_id));
1004 printf("SDevice:\t%s\n",
1005 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
1007 if (c = get_conf_byte(d, PCI_REVISION_ID))
1008 printf("Rev:\t%02x\n", c);
1009 if (c = get_conf_byte(d, PCI_CLASS_PROG))
1010 printf("ProgIf:\t%02x\n", c);
1014 printf("%02x:%02x.%x ", p->bus, p->dev, p->func);
1015 printf("\"%s\" \"%s\" \"%s\"",
1016 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS,
1017 get_conf_word(d, PCI_CLASS_DEVICE), 0, 0, 0),
1018 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR,
1019 p->vendor_id, p->device_id, 0, 0),
1020 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE,
1021 p->vendor_id, p->device_id, 0, 0));
1022 if (c = get_conf_byte(d, PCI_REVISION_ID))
1023 printf(" -r%02x", c);
1024 if (c = get_conf_byte(d, PCI_CLASS_PROG))
1025 printf(" -p%02x", c);
1026 if (sv_id && sv_id != 0xffff)
1027 printf(" \"%s\" \"%s\"",
1028 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id, sv_id, sd_id),
1029 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
1031 printf(" \"\" \"\"");
1037 show_device(struct device *d)
1039 if (machine_readable)
1047 if (verbose || show_hex)
1056 for(d=first_dev; d; d=d->next)
1063 struct bridge *chain; /* Single-linked list of bridges */
1064 struct bridge *next, *child; /* Tree of bridges */
1065 struct bus *first_bus; /* List of busses connected to this bridge */
1066 unsigned int primary, secondary, subordinate; /* Bus numbers */
1067 struct device *br_dev;
1071 unsigned int number;
1072 struct bus *sibling;
1073 struct device *first_dev, **last_dev;
1076 static struct bridge host_bridge = { NULL, NULL, NULL, NULL, ~0, 0, ~0, NULL };
1079 find_bus(struct bridge *b, unsigned int n)
1083 for(bus=b->first_bus; bus; bus=bus->sibling)
1084 if (bus->number == n)
1090 new_bus(struct bridge *b, unsigned int n)
1092 struct bus *bus = xmalloc(sizeof(struct bus));
1094 bus = xmalloc(sizeof(struct bus));
1096 bus->sibling = b->first_bus;
1097 bus->first_dev = NULL;
1098 bus->last_dev = &bus->first_dev;
1104 insert_dev(struct device *d, struct bridge *b)
1106 struct pci_dev *p = d->dev;
1109 if (! (bus = find_bus(b, p->bus)))
1112 for(c=b->child; c; c=c->next)
1113 if (c->secondary <= p->bus && p->bus <= c->subordinate)
1118 bus = new_bus(b, p->bus);
1120 /* Simple insertion at the end _does_ guarantee the correct order as the
1121 * original device list was sorted by (bus, devfn) lexicographically
1122 * and all devices on the new list have the same bus number.
1125 bus->last_dev = &d->next;
1132 struct device *d, *d2;
1133 struct bridge **last_br, *b;
1135 /* Build list of bridges */
1137 last_br = &host_bridge.chain;
1138 for(d=first_dev; d; d=d->next)
1140 word class = get_conf_word(d, PCI_CLASS_DEVICE);
1141 byte ht = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
1142 if (class == PCI_CLASS_BRIDGE_PCI &&
1143 (ht == PCI_HEADER_TYPE_BRIDGE || ht == PCI_HEADER_TYPE_CARDBUS))
1145 b = xmalloc(sizeof(struct bridge));
1146 if (ht == PCI_HEADER_TYPE_BRIDGE)
1148 b->primary = get_conf_byte(d, PCI_CB_PRIMARY_BUS);
1149 b->secondary = get_conf_byte(d, PCI_CB_CARD_BUS);
1150 b->subordinate = get_conf_byte(d, PCI_CB_SUBORDINATE_BUS);
1154 b->primary = get_conf_byte(d, PCI_PRIMARY_BUS);
1155 b->secondary = get_conf_byte(d, PCI_SECONDARY_BUS);
1156 b->subordinate = get_conf_byte(d, PCI_SUBORDINATE_BUS);
1159 last_br = &b->chain;
1160 b->next = b->child = NULL;
1161 b->first_bus = NULL;
1167 /* Create a bridge tree */
1169 for(b=&host_bridge; b; b=b->chain)
1171 struct bridge *c, *best;
1173 for(c=&host_bridge; c; c=c->chain)
1174 if (c != b && b->primary >= c->secondary && b->primary <= c->subordinate &&
1175 (!best || best->subordinate - best->primary > c->subordinate - c->primary))
1179 b->next = best->child;
1184 /* Insert secondary bus for each bridge */
1186 for(b=&host_bridge; b; b=b->chain)
1187 if (!find_bus(b, b->secondary))
1188 new_bus(b, b->secondary);
1190 /* Create bus structs and link devices */
1192 for(d=first_dev; d;)
1195 insert_dev(d, &host_bridge);
1201 print_it(byte *line, byte *p)
1205 fputs(line, stdout);
1206 for(p=line; *p; p++)
1207 if (*p == '+' || *p == '|')
1213 static void show_tree_bridge(struct bridge *, byte *, byte *);
1216 show_tree_dev(struct device *d, byte *line, byte *p)
1218 struct pci_dev *q = d->dev;
1222 p += sprintf(p, "%02x.%x", q->dev, q->func);
1223 for(b=&host_bridge; b; b=b->chain)
1226 if (b->secondary == b->subordinate)
1227 p += sprintf(p, "-[%02x]-", b->secondary);
1229 p += sprintf(p, "-[%02x-%02x]-", b->secondary, b->subordinate);
1230 show_tree_bridge(b, line, p);
1234 p += sprintf(p, " %s",
1235 pci_lookup_name(pacc, namebuf, sizeof(namebuf),
1236 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
1237 q->vendor_id, q->device_id, 0, 0));
1242 show_tree_bus(struct bus *b, byte *line, byte *p)
1246 else if (!b->first_dev->next)
1250 show_tree_dev(b->first_dev, line, p);
1254 struct device *d = b->first_dev;
1259 show_tree_dev(d, line, p+2);
1264 show_tree_dev(d, line, p+2);
1269 show_tree_bridge(struct bridge *b, byte *line, byte *p)
1272 if (!b->first_bus->sibling)
1274 if (b == &host_bridge)
1275 p += sprintf(p, "[%02x]-", b->first_bus->number);
1276 show_tree_bus(b->first_bus, line, p);
1280 struct bus *u = b->first_bus;
1285 k = p + sprintf(p, "+-[%02x]-", u->number);
1286 show_tree_bus(u, line, k);
1289 k = p + sprintf(p, "\\-[%02x]-", u->number);
1290 show_tree_bus(u, line, k);
1300 show_tree_bridge(&host_bridge, line, line);
1303 /* Bus mapping mode */
1306 struct bus_bridge *next;
1307 byte this, dev, func, first, last, bug;
1313 struct bus_bridge *bridges, *via;
1316 static struct bus_info *bus_info;
1319 map_bridge(struct bus_info *bi, struct device *d, int np, int ns, int nl)
1321 struct bus_bridge *b = xmalloc(sizeof(struct bus_bridge));
1322 struct pci_dev *p = d->dev;
1324 b->next = bi->bridges;
1326 b->this = get_conf_byte(d, np);
1329 b->first = get_conf_byte(d, ns);
1330 b->last = get_conf_byte(d, nl);
1331 printf("## %02x.%02x:%d is a bridge from %02x to %02x-%02x\n",
1332 p->bus, p->dev, p->func, b->this, b->first, b->last);
1333 if (b->this != p->bus)
1334 printf("!!! Bridge points to invalid primary bus.\n");
1335 if (b->first > b->last)
1337 printf("!!! Bridge points to invalid bus range.\n");
1346 int verbose = pacc->debugging;
1347 struct bus_info *bi = bus_info + bus;
1351 printf("Mapping bus %02x\n", bus);
1352 for(dev = 0; dev < 32; dev++)
1353 if (filter.slot < 0 || filter.slot == dev)
1356 for(func = 0; func < func_limit; func++)
1357 if (filter.func < 0 || filter.func == func)
1359 struct pci_dev *p = pci_get_dev(pacc, bus, dev, func);
1360 u16 vendor = pci_read_word(p, PCI_VENDOR_ID);
1361 if (vendor && vendor != 0xffff)
1363 if (!func && (pci_read_byte(p, PCI_HEADER_TYPE) & 0x80))
1366 printf("Discovered device %02x:%02x.%d\n", bus, dev, func);
1368 if (d = scan_device(p))
1371 switch (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f)
1373 case PCI_HEADER_TYPE_BRIDGE:
1374 map_bridge(bi, d, PCI_PRIMARY_BUS, PCI_SECONDARY_BUS, PCI_SUBORDINATE_BUS);
1376 case PCI_HEADER_TYPE_CARDBUS:
1377 map_bridge(bi, d, PCI_CB_PRIMARY_BUS, PCI_CB_CARD_BUS, PCI_CB_SUBORDINATE_BUS);
1383 printf("But it was filtered out.\n");
1391 do_map_bridges(int bus, int min, int max)
1393 struct bus_info *bi = bus_info + bus;
1394 struct bus_bridge *b;
1397 for(b=bi->bridges; b; b=b->next)
1399 if (bus_info[b->first].guestbook)
1401 else if (b->first < min || b->last > max)
1405 bus_info[b->first].via = b;
1406 do_map_bridges(b->first, b->first, b->last);
1416 printf("\nSummary of buses:\n\n");
1417 for(i=0; i<256; i++)
1418 if (bus_info[i].exists && !bus_info[i].guestbook)
1419 do_map_bridges(i, 0, 255);
1420 for(i=0; i<256; i++)
1422 struct bus_info *bi = bus_info + i;
1423 struct bus_bridge *b = bi->via;
1427 printf("%02x: ", i);
1429 printf("Entered via %02x:%02x.%d\n", b->this, b->dev, b->func);
1431 printf("Primary host bus\n");
1433 printf("Secondary host bus (?)\n");
1435 for(b=bi->bridges; b; b=b->next)
1437 printf("\t%02x.%d Bridge to %02x-%02x", b->dev, b->func, b->first, b->last);
1441 printf(" <overlap bug>");
1444 printf(" <crossing bug>");
1455 if (pacc->method == PCI_ACCESS_PROC_BUS_PCI ||
1456 pacc->method == PCI_ACCESS_DUMP)
1457 printf("WARNING: Bus mapping can be reliable only with direct hardware access enabled.\n\n");
1458 else if (!check_root())
1459 die("Only root can map the bus.");
1460 bus_info = xmalloc(sizeof(struct bus_info) * 256);
1461 bzero(bus_info, sizeof(struct bus_info) * 256);
1462 if (filter.bus >= 0)
1463 do_map_bus(filter.bus);
1467 for(bus=0; bus<256; bus++)
1476 main(int argc, char **argv)
1481 if (argc == 2 && !strcmp(argv[1], "--version"))
1483 puts("lspci version " PCIUTILS_VERSION);
1489 pci_filter_init(pacc, &filter);
1491 while ((i = getopt(argc, argv, options)) != -1)
1495 pacc->numeric_ids = 1;
1501 pacc->buscentric = 1;
1502 buscentric_view = 1;
1505 if (msg = pci_filter_parse_slot(&filter, optarg))
1509 if (msg = pci_filter_parse_id(&filter, optarg))
1519 pacc->id_file_name = optarg;
1528 if (parse_generic_option(i, pacc, optarg))
1531 fprintf(stderr, help_msg, pacc->id_file_name);