2 * Linux PCI Utilities -- List All PCI Devices
4 * Copyright (c) 1997--2003 Martin Mares <mj@ucw.cz>
6 * Can be freely distributed and used under the terms of the GNU GPL.
19 static int verbose; /* Show detailed information */
20 static int buscentric_view; /* Show bus addresses/IRQ's instead of CPU-visible ones */
21 static int show_hex; /* Show contents of config space as hexadecimal numbers */
22 static struct pci_filter filter; /* Device filter */
23 static int show_tree; /* Show bus tree */
24 static int machine_readable; /* Generate machine-readable output */
25 static int map_mode; /* Bus mapping mode enabled */
27 static char options[] = "nvbxs:d:ti:mgM" GENERIC_OPTIONS ;
29 static char help_msg[] = "\
30 Usage: lspci [<switches>]\n\
33 -n\t\tShow numeric ID's\n\
34 -b\t\tBus-centric view (PCI addresses and IRQ's instead of those seen by the CPU)\n\
35 -x\t\tShow hex-dump of the standard portion of config space\n\
36 -xxx\t\tShow hex-dump of the whole config space (dangerous; root only)\n\
37 -s [[<bus>]:][<slot>][.[<func>]]\tShow only devices in selected slots\n\
38 -d [<vendor>]:[<device>]\tShow only selected devices\n\
39 -t\t\tShow bus tree\n\
40 -m\t\tProduce machine-readable output\n\
41 -i <file>\tUse specified ID database instead of %s\n\
42 -M\t\tEnable `bus mapping' mode (dangerous; root only)\n"
46 /* Communication with libpci */
48 static struct pci_access *pacc;
50 /* Format strings used for IRQ numbers and memory addresses */
53 #define IRQ_FORMAT "%08x"
55 #define IRQ_FORMAT "%d"
58 #ifdef HAVE_64BIT_ADDRESS
59 #ifdef HAVE_LONG_ADDRESS
60 #define ADDR_FORMAT "%016Lx"
62 #define ADDR_FORMAT "%016lx"
65 #define ADDR_FORMAT "%08lx"
69 #define IO_FORMAT "%016Lx"
70 #elif defined(HAVE_LONG_ADDRESS)
71 #define IO_FORMAT "%04Lx"
73 #define IO_FORMAT "%04lx"
77 * If we aren't being compiled by GCC, use malloc() instead of alloca().
78 * This increases our memory footprint, but only slightly since we don't
86 /* Our view of the PCI bus */
91 unsigned int config_cnt;
95 static struct device *first_dev;
97 static struct device *
98 scan_device(struct pci_dev *p)
100 int how_much = (show_hex > 2) ? 256 : 64;
103 if (!pci_filter_match(&filter, p))
105 d = xmalloc(sizeof(struct device));
106 bzero(d, sizeof(*d));
108 if (!pci_read_block(p, 0, d->config, how_much))
109 die("Unable to read %d bytes of configuration space.", how_much);
110 if (how_much < 128 && (d->config[PCI_HEADER_TYPE] & 0x7f) == PCI_HEADER_TYPE_CARDBUS)
112 /* For cardbus bridges, we need to fetch 64 bytes more to get the full standard header... */
113 if (!pci_read_block(p, 64, d->config+64, 64))
114 die("Unable to read cardbus bridge extension data.");
117 d->config_cnt = how_much;
118 pci_setup_cache(p, d->config, d->config_cnt);
119 pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_IRQ | PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES);
130 for(p=pacc->devices; p; p=p->next)
131 if (d = scan_device(p))
141 static int is_root = -1;
144 is_root = !geteuid();
149 config_fetch(struct device *d, unsigned int pos, unsigned int len)
151 if (pos + len < d->config_cnt)
153 if (pacc->method != PCI_ACCESS_DUMP && !check_root())
155 return pci_read_block(d->dev, pos, d->config + pos, len);
158 /* Config space accesses */
161 get_conf_byte(struct device *d, unsigned int pos)
163 return d->config[pos];
167 get_conf_word(struct device *d, unsigned int pos)
169 return d->config[pos] | (d->config[pos+1] << 8);
173 get_conf_long(struct device *d, unsigned int pos)
175 return d->config[pos] |
176 (d->config[pos+1] << 8) |
177 (d->config[pos+2] << 16) |
178 (d->config[pos+3] << 24);
184 compare_them(const void *A, const void *B)
186 const struct pci_dev *a = (*(const struct device **)A)->dev;
187 const struct pci_dev *b = (*(const struct device **)B)->dev;
197 if (a->func < b->func)
199 if (a->func > b->func)
207 struct device **index, **h, **last_dev;
212 for(d=first_dev; d; d=d->next)
214 h = index = alloca(sizeof(struct device *) * cnt);
215 for(d=first_dev; d; d=d->next)
217 qsort(index, cnt, sizeof(struct device *), compare_them);
218 last_dev = &first_dev;
223 last_dev = &(*h)->next;
231 #define FLAG(x,y) ((x & y) ? '+' : '-')
234 show_terse(struct device *d)
237 struct pci_dev *p = d->dev;
238 byte classbuf[128], devbuf[128];
240 printf("%02x:%02x.%x %s: %s",
244 pci_lookup_name(pacc, classbuf, sizeof(classbuf),
246 get_conf_word(d, PCI_CLASS_DEVICE), 0, 0, 0),
247 pci_lookup_name(pacc, devbuf, sizeof(devbuf),
248 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
249 p->vendor_id, p->device_id, 0, 0));
250 if (c = get_conf_byte(d, PCI_REVISION_ID))
251 printf(" (rev %02x)", c);
255 c = get_conf_byte(d, PCI_CLASS_PROG);
256 x = pci_lookup_name(pacc, devbuf, sizeof(devbuf),
258 get_conf_word(d, PCI_CLASS_DEVICE), c, 0, 0);
261 printf(" (prog-if %02x", c);
271 show_size(pciaddr_t x)
277 printf("%d", (int) x);
278 else if (x < 1048576)
279 printf("%dK", (int)(x / 1024));
280 else if (x < 0x80000000)
281 printf("%dM", (int)(x / 1048576));
283 printf(ADDR_FORMAT, x);
288 show_bases(struct device *d, int cnt)
290 struct pci_dev *p = d->dev;
291 word cmd = get_conf_word(d, PCI_COMMAND);
296 pciaddr_t pos = p->base_addr[i];
297 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->size[i] : 0;
298 u32 flg = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
299 if (flg == 0xffffffff)
301 if (!pos && !flg && !len)
304 printf("\tRegion %d: ", i);
307 if (pos && !flg) /* Reported by the OS, but not by the device */
309 printf("[virtual] ");
312 if (flg & PCI_BASE_ADDRESS_SPACE_IO)
314 pciaddr_t a = pos & PCI_BASE_ADDRESS_IO_MASK;
315 printf("I/O ports at ");
317 printf(IO_FORMAT, a);
318 else if (flg & PCI_BASE_ADDRESS_IO_MASK)
321 printf("<unassigned>");
322 if (!(cmd & PCI_COMMAND_IO))
323 printf(" [disabled]");
327 int t = flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
328 pciaddr_t a = pos & PCI_ADDR_MEM_MASK;
332 printf("Memory at ");
333 if (t == PCI_BASE_ADDRESS_MEM_TYPE_64)
337 printf("<invalid-64bit-slot>");
343 z = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
347 printf("%08x" ADDR_FORMAT, z, a);
349 printf("<unassigned>");
357 printf(ADDR_FORMAT, a);
359 printf(((flg & PCI_BASE_ADDRESS_MEM_MASK) || z) ? "<ignored>" : "<unassigned>");
361 printf(" (%s, %sprefetchable)",
362 (t == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32-bit" :
363 (t == PCI_BASE_ADDRESS_MEM_TYPE_64) ? "64-bit" :
364 (t == PCI_BASE_ADDRESS_MEM_TYPE_1M) ? "low-1M" : "type 3",
365 (flg & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-");
366 if (!(cmd & PCI_COMMAND_MEMORY))
367 printf(" [disabled]");
375 show_pm(struct device *d, int where, int cap)
378 static int pm_aux_current[8] = { 0, 55, 100, 160, 220, 270, 320, 375 };
380 printf("Power Management version %d\n", cap & PCI_PM_CAP_VER_MASK);
383 printf("\t\tFlags: PMEClk%c DSI%c D1%c D2%c AuxCurrent=%dmA PME(D0%c,D1%c,D2%c,D3hot%c,D3cold%c)\n",
384 FLAG(cap, PCI_PM_CAP_PME_CLOCK),
385 FLAG(cap, PCI_PM_CAP_DSI),
386 FLAG(cap, PCI_PM_CAP_D1),
387 FLAG(cap, PCI_PM_CAP_D2),
388 pm_aux_current[(cap >> 6) & 7],
389 FLAG(cap, PCI_PM_CAP_PME_D0),
390 FLAG(cap, PCI_PM_CAP_PME_D1),
391 FLAG(cap, PCI_PM_CAP_PME_D2),
392 FLAG(cap, PCI_PM_CAP_PME_D3_HOT),
393 FLAG(cap, PCI_PM_CAP_PME_D3_COLD));
394 if (!config_fetch(d, where + PCI_PM_CTRL, PCI_PM_SIZEOF - PCI_PM_CTRL))
396 t = get_conf_word(d, where + PCI_PM_CTRL);
397 printf("\t\tStatus: D%d PME-Enable%c DSel=%d DScale=%d PME%c\n",
398 t & PCI_PM_CTRL_STATE_MASK,
399 FLAG(t, PCI_PM_CTRL_PME_ENABLE),
400 (t & PCI_PM_CTRL_DATA_SEL_MASK) >> 9,
401 (t & PCI_PM_CTRL_DATA_SCALE_MASK) >> 13,
402 FLAG(t, PCI_PM_CTRL_PME_STATUS));
403 b = get_conf_byte(d, where + PCI_PM_PPB_EXTENSIONS);
405 printf("\t\tBridge: PM%c B3%c\n",
406 FLAG(t, PCI_PM_BPCC_ENABLE),
407 FLAG(~t, PCI_PM_PPB_B2_B3));
411 format_agp_rate(int rate, char *buf, int agp3)
422 *c++ = '0' + (1 << (i + 2*agp3));
427 strcpy(buf, "<none>");
431 show_agp(struct device *d, int where, int cap)
438 ver = (cap >> 4) & 0x0f;
440 printf("AGP version %x.%x\n", ver, rev);
443 if (!config_fetch(d, where + PCI_AGP_STATUS, PCI_AGP_SIZEOF - PCI_AGP_STATUS))
445 t = get_conf_long(d, where + PCI_AGP_STATUS);
446 if (ver >= 3 && (t & PCI_AGP_STATUS_AGP3))
448 format_agp_rate(t & 7, rate, agp3);
449 printf("\t\tStatus: RQ=%d Iso%c ArqSz=%d Cal=%d SBA%c ITACoh%c GART64%c HTrans%c 64bit%c FW%c AGP3%c Rate=%s\n",
450 ((t & PCI_AGP_STATUS_RQ_MASK) >> 24U) + 1,
451 FLAG(t, PCI_AGP_STATUS_ISOCH),
452 ((t & PCI_AGP_STATUS_ARQSZ_MASK) >> 13),
453 ((t & PCI_AGP_STATUS_CAL_MASK) >> 10),
454 FLAG(t, PCI_AGP_STATUS_SBA),
455 FLAG(t, PCI_AGP_STATUS_ITA_COH),
456 FLAG(t, PCI_AGP_STATUS_GART64),
457 FLAG(t, PCI_AGP_STATUS_HTRANS),
458 FLAG(t, PCI_AGP_STATUS_64BIT),
459 FLAG(t, PCI_AGP_STATUS_FW),
460 FLAG(t, PCI_AGP_STATUS_AGP3),
462 t = get_conf_long(d, where + PCI_AGP_COMMAND);
463 format_agp_rate(t & 7, rate, agp3);
464 printf("\t\tCommand: RQ=%d ArqSz=%d Cal=%d SBA%c AGP%c GART64%c 64bit%c FW%c Rate=%s\n",
465 ((t & PCI_AGP_COMMAND_RQ_MASK) >> 24U) + 1,
466 ((t & PCI_AGP_COMMAND_ARQSZ_MASK) >> 13),
467 ((t & PCI_AGP_COMMAND_CAL_MASK) >> 10),
468 FLAG(t, PCI_AGP_COMMAND_SBA),
469 FLAG(t, PCI_AGP_COMMAND_AGP),
470 FLAG(t, PCI_AGP_COMMAND_GART64),
471 FLAG(t, PCI_AGP_COMMAND_64BIT),
472 FLAG(t, PCI_AGP_COMMAND_FW),
477 show_pcix_nobridge(struct device *d, int where)
482 printf("PCI-X non-bridge device.\n");
487 if (!config_fetch(d, where + PCI_PCIX_STATUS, 4))
490 command = get_conf_word(d, where + PCI_PCIX_COMMAND);
491 status = get_conf_long(d, where + PCI_PCIX_STATUS);
492 printf("\t\tCommand: DPERE%c ERO%c RBC=%d OST=%d\n",
493 FLAG(command, PCI_PCIX_COMMAND_DPERE),
494 FLAG(command, PCI_PCIX_COMMAND_ERO),
495 ((command & PCI_PCIX_COMMAND_MAX_MEM_READ_BYTE_COUNT) >> 2U),
496 ((command & PCI_PCIX_COMMAND_MAX_OUTSTANDING_SPLIT_TRANS) >> 4U));
497 printf("\t\tStatus: Bus=%u Dev=%u Func=%u 64bit%c 133MHz%c SCD%c USC%c, DC=%s, DMMRBC=%u, DMOST=%u, DMCRS=%u, RSCEM%c",
498 ((status >> 8) & 0xffU), // bus
499 ((status >> 3) & 0x1fU), // dev
500 (status & PCI_PCIX_STATUS_FUNCTION), // function
501 FLAG(status, PCI_PCIX_STATUS_64BIT),
502 FLAG(status, PCI_PCIX_STATUS_133MHZ),
503 FLAG(status, PCI_PCIX_STATUS_SC_DISCARDED),
504 FLAG(status, PCI_PCIX_STATUS_UNEXPECTED_SC),
505 ((status & PCI_PCIX_STATUS_DEVICE_COMPLEXITY) ? "bridge" : "simple"),
506 ((status >> 21) & 3U),
507 ((status >> 23) & 7U),
508 ((status >> 26) & 7U),
509 FLAG(status, PCI_PCIX_STATUS_RCVD_SC_ERR_MESS));
513 show_pcix_bridge(struct device *d, int where)
517 u32 status, upstcr, downstcr;
519 printf("PCI-X bridge device.\n");
524 if (!config_fetch(d, where + PCI_PCIX_BRIDGE_STATUS, 12))
527 secstatus = get_conf_word(d, where + PCI_PCIX_BRIDGE_SEC_STATUS);
528 printf("\t\tSecondary Status: 64bit%c, 133MHz%c, SCD%c, USC%c, SCO%c, SRD%c Freq=%d\n",
529 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_64BIT),
530 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_133MHZ),
531 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_SC_DISCARDED),
532 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_UNEXPECTED_SC),
533 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_SC_OVERRUN),
534 FLAG(secstatus, PCI_PCIX_BRIDGE_SEC_STATUS_SPLIT_REQUEST_DELAYED),
535 ((secstatus >> 6) & 7));
536 status = get_conf_long(d, where + PCI_PCIX_BRIDGE_STATUS);
537 printf("\t\tStatus: Bus=%u Dev=%u Func=%u 64bit%c 133MHz%c SCD%c USC%c, SCO%c, SRD%c\n",
538 ((status >> 8) & 0xff), // bus
539 ((status >> 3) & 0x1f), // dev
540 (status & PCI_PCIX_BRIDGE_STATUS_FUNCTION), // function
541 FLAG(status, PCI_PCIX_BRIDGE_STATUS_64BIT),
542 FLAG(status, PCI_PCIX_BRIDGE_STATUS_133MHZ),
543 FLAG(status, PCI_PCIX_BRIDGE_STATUS_SC_DISCARDED),
544 FLAG(status, PCI_PCIX_BRIDGE_STATUS_UNEXPECTED_SC),
545 FLAG(status, PCI_PCIX_BRIDGE_STATUS_SC_OVERRUN),
546 FLAG(status, PCI_PCIX_BRIDGE_STATUS_SPLIT_REQUEST_DELAYED));
547 upstcr = get_conf_long(d, where + PCI_PCIX_BRIDGE_UPSTREAM_SPLIT_TRANS_CTRL);
548 printf("\t\t: Upstream: Capacity=%u, Commitment Limit=%u\n",
549 (upstcr & PCI_PCIX_BRIDGE_STR_CAPACITY),
550 (upstcr >> 16) & 0xffff);
551 downstcr = get_conf_long(d, where + PCI_PCIX_BRIDGE_DOWNSTREAM_SPLIT_TRANS_CTRL);
552 printf("\t\t: Downstream: Capacity=%u, Commitment Limit=%u\n",
553 (downstcr & PCI_PCIX_BRIDGE_STR_CAPACITY),
554 (downstcr >> 16) & 0xffff);
558 show_pcix(struct device *d, int where)
560 switch (d->dev->hdrtype)
562 case PCI_HEADER_TYPE_NORMAL:
563 show_pcix_nobridge(d, where);
565 case PCI_HEADER_TYPE_BRIDGE:
566 show_pcix_bridge(d, where);
572 show_rom(struct device *d)
574 struct pci_dev *p = d->dev;
575 pciaddr_t rom = p->rom_base_addr;
576 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->rom_size : 0;
580 printf("\tExpansion ROM at ");
581 if (rom & PCI_ROM_ADDRESS_MASK)
582 printf(ADDR_FORMAT, rom & PCI_ROM_ADDRESS_MASK);
584 printf("<unassigned>");
585 if (!(rom & PCI_ROM_ADDRESS_ENABLE))
586 printf(" [disabled]");
592 show_msi(struct device *d, int where, int cap)
598 printf("Message Signalled Interrupts: 64bit%c Queue=%d/%d Enable%c\n",
599 FLAG(cap, PCI_MSI_FLAGS_64BIT),
600 (cap & PCI_MSI_FLAGS_QSIZE) >> 4,
601 (cap & PCI_MSI_FLAGS_QMASK) >> 1,
602 FLAG(cap, PCI_MSI_FLAGS_ENABLE));
605 is64 = cap & PCI_MSI_FLAGS_64BIT;
606 if (!config_fetch(d, where + PCI_MSI_ADDRESS_LO, (is64 ? PCI_MSI_DATA_64 : PCI_MSI_DATA_32) + 2 - PCI_MSI_ADDRESS_LO))
608 printf("\t\tAddress: ");
611 t = get_conf_long(d, where + PCI_MSI_ADDRESS_HI);
612 w = get_conf_word(d, where + PCI_MSI_DATA_64);
616 w = get_conf_word(d, where + PCI_MSI_DATA_32);
617 t = get_conf_long(d, where + PCI_MSI_ADDRESS_LO);
618 printf("%08x Data: %04x\n", t, w);
624 int esr = cap & 0xff;
627 printf("Slot ID: %d slots, First%c, chassis %02x\n",
628 esr & PCI_SID_ESR_NSLOTS,
629 FLAG(esr, PCI_SID_ESR_FIC),
634 show_caps(struct device *d)
636 if (get_conf_word(d, PCI_STATUS) & PCI_STATUS_CAP_LIST)
638 int where = get_conf_byte(d, PCI_CAPABILITY_LIST) & ~3;
642 printf("\tCapabilities: ");
643 if (!config_fetch(d, where, 4))
645 puts("<available only to root>");
648 id = get_conf_byte(d, where + PCI_CAP_LIST_ID);
649 next = get_conf_byte(d, where + PCI_CAP_LIST_NEXT) & ~3;
650 cap = get_conf_word(d, where + PCI_CAP_FLAGS);
651 printf("[%02x] ", where);
654 printf("<chain broken>\n");
660 show_pm(d, where, cap);
663 show_agp(d, where, cap);
666 printf("Vital Product Data\n");
668 case PCI_CAP_ID_SLOTID:
672 show_msi(d, where, cap);
674 case PCI_CAP_ID_PCIX:
678 printf("#%02x [%04x]\n", id, cap);
686 show_htype0(struct device *d)
694 show_htype1(struct device *d)
696 u32 io_base = get_conf_byte(d, PCI_IO_BASE);
697 u32 io_limit = get_conf_byte(d, PCI_IO_LIMIT);
698 u32 io_type = io_base & PCI_IO_RANGE_TYPE_MASK;
699 u32 mem_base = get_conf_word(d, PCI_MEMORY_BASE);
700 u32 mem_limit = get_conf_word(d, PCI_MEMORY_LIMIT);
701 u32 mem_type = mem_base & PCI_MEMORY_RANGE_TYPE_MASK;
702 u32 pref_base = get_conf_word(d, PCI_PREF_MEMORY_BASE);
703 u32 pref_limit = get_conf_word(d, PCI_PREF_MEMORY_LIMIT);
704 u32 pref_type = pref_base & PCI_PREF_RANGE_TYPE_MASK;
705 word brc = get_conf_word(d, PCI_BRIDGE_CONTROL);
706 int verb = verbose > 2;
709 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
710 get_conf_byte(d, PCI_PRIMARY_BUS),
711 get_conf_byte(d, PCI_SECONDARY_BUS),
712 get_conf_byte(d, PCI_SUBORDINATE_BUS),
713 get_conf_byte(d, PCI_SEC_LATENCY_TIMER));
715 if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) ||
716 (io_type != PCI_IO_RANGE_TYPE_16 && io_type != PCI_IO_RANGE_TYPE_32))
717 printf("\t!!! Unknown I/O range types %x/%x\n", io_base, io_limit);
720 io_base = (io_base & PCI_IO_RANGE_MASK) << 8;
721 io_limit = (io_limit & PCI_IO_RANGE_MASK) << 8;
722 if (io_type == PCI_IO_RANGE_TYPE_32)
724 io_base |= (get_conf_word(d, PCI_IO_BASE_UPPER16) << 16);
725 io_limit |= (get_conf_word(d, PCI_IO_LIMIT_UPPER16) << 16);
727 if (io_base <= io_limit || verb)
728 printf("\tI/O behind bridge: %08x-%08x\n", io_base, io_limit+0xfff);
731 if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) ||
733 printf("\t!!! Unknown memory range types %x/%x\n", mem_base, mem_limit);
736 mem_base = (mem_base & PCI_MEMORY_RANGE_MASK) << 16;
737 mem_limit = (mem_limit & PCI_MEMORY_RANGE_MASK) << 16;
738 if (mem_base <= mem_limit || verb)
739 printf("\tMemory behind bridge: %08x-%08x\n", mem_base, mem_limit + 0xfffff);
742 if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) ||
743 (pref_type != PCI_PREF_RANGE_TYPE_32 && pref_type != PCI_PREF_RANGE_TYPE_64))
744 printf("\t!!! Unknown prefetchable memory range types %x/%x\n", pref_base, pref_limit);
747 pref_base = (pref_base & PCI_PREF_RANGE_MASK) << 16;
748 pref_limit = (pref_limit & PCI_PREF_RANGE_MASK) << 16;
749 if (pref_base <= pref_limit || verb)
751 if (pref_type == PCI_PREF_RANGE_TYPE_32)
752 printf("\tPrefetchable memory behind bridge: %08x-%08x\n", pref_base, pref_limit + 0xfffff);
754 printf("\tPrefetchable memory behind bridge: %08x%08x-%08x%08x\n",
755 get_conf_long(d, PCI_PREF_BASE_UPPER32),
757 get_conf_long(d, PCI_PREF_LIMIT_UPPER32),
762 if (get_conf_word(d, PCI_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
763 printf("\tSecondary status: SERR\n");
768 printf("\tBridgeCtl: Parity%c SERR%c NoISA%c VGA%c MAbort%c >Reset%c FastB2B%c\n",
769 FLAG(brc, PCI_BRIDGE_CTL_PARITY),
770 FLAG(brc, PCI_BRIDGE_CTL_SERR),
771 FLAG(brc, PCI_BRIDGE_CTL_NO_ISA),
772 FLAG(brc, PCI_BRIDGE_CTL_VGA),
773 FLAG(brc, PCI_BRIDGE_CTL_MASTER_ABORT),
774 FLAG(brc, PCI_BRIDGE_CTL_BUS_RESET),
775 FLAG(brc, PCI_BRIDGE_CTL_FAST_BACK));
781 show_htype2(struct device *d)
784 word cmd = get_conf_word(d, PCI_COMMAND);
785 word brc = get_conf_word(d, PCI_CB_BRIDGE_CONTROL);
786 word exca = get_conf_word(d, PCI_CB_LEGACY_MODE_BASE);
787 int verb = verbose > 2;
790 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
791 get_conf_byte(d, PCI_CB_PRIMARY_BUS),
792 get_conf_byte(d, PCI_CB_CARD_BUS),
793 get_conf_byte(d, PCI_CB_SUBORDINATE_BUS),
794 get_conf_byte(d, PCI_CB_LATENCY_TIMER));
798 u32 base = get_conf_long(d, PCI_CB_MEMORY_BASE_0 + p);
799 u32 limit = get_conf_long(d, PCI_CB_MEMORY_LIMIT_0 + p);
800 if (limit > base || verb)
801 printf("\tMemory window %d: %08x-%08x%s%s\n", i, base, limit,
802 (cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]",
803 (brc & (PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 << i)) ? " (prefetchable)" : "");
808 u32 base = get_conf_long(d, PCI_CB_IO_BASE_0 + p);
809 u32 limit = get_conf_long(d, PCI_CB_IO_LIMIT_0 + p);
810 if (!(base & PCI_IO_RANGE_TYPE_32))
815 base &= PCI_CB_IO_RANGE_MASK;
816 limit = (limit & PCI_CB_IO_RANGE_MASK) + 3;
817 if (base <= limit || verb)
818 printf("\tI/O window %d: %08x-%08x%s\n", i, base, limit,
819 (cmd & PCI_COMMAND_IO) ? "" : " [disabled]");
822 if (get_conf_word(d, PCI_CB_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
823 printf("\tSecondary status: SERR\n");
825 printf("\tBridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c\n",
826 FLAG(brc, PCI_CB_BRIDGE_CTL_PARITY),
827 FLAG(brc, PCI_CB_BRIDGE_CTL_SERR),
828 FLAG(brc, PCI_CB_BRIDGE_CTL_ISA),
829 FLAG(brc, PCI_CB_BRIDGE_CTL_VGA),
830 FLAG(brc, PCI_CB_BRIDGE_CTL_MASTER_ABORT),
831 FLAG(brc, PCI_CB_BRIDGE_CTL_CB_RESET),
832 FLAG(brc, PCI_CB_BRIDGE_CTL_16BIT_INT),
833 FLAG(brc, PCI_CB_BRIDGE_CTL_POST_WRITES));
835 printf("\t16-bit legacy interface ports at %04x\n", exca);
839 show_verbose(struct device *d)
841 struct pci_dev *p = d->dev;
842 word status = get_conf_word(d, PCI_STATUS);
843 word cmd = get_conf_word(d, PCI_COMMAND);
844 word class = get_conf_word(d, PCI_CLASS_DEVICE);
845 byte bist = get_conf_byte(d, PCI_BIST);
846 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
847 byte latency = get_conf_byte(d, PCI_LATENCY_TIMER);
848 byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE);
849 byte max_lat, min_gnt;
850 byte int_pin = get_conf_byte(d, PCI_INTERRUPT_PIN);
851 unsigned int irq = p->irq;
852 word subsys_v, subsys_d;
859 case PCI_HEADER_TYPE_NORMAL:
860 if (class == PCI_CLASS_BRIDGE_PCI)
861 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
862 max_lat = get_conf_byte(d, PCI_MAX_LAT);
863 min_gnt = get_conf_byte(d, PCI_MIN_GNT);
864 subsys_v = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
865 subsys_d = get_conf_word(d, PCI_SUBSYSTEM_ID);
867 case PCI_HEADER_TYPE_BRIDGE:
868 if (class != PCI_CLASS_BRIDGE_PCI)
869 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
870 irq = int_pin = min_gnt = max_lat = 0;
871 subsys_v = subsys_d = 0;
873 case PCI_HEADER_TYPE_CARDBUS:
874 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
875 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
876 min_gnt = max_lat = 0;
877 subsys_v = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
878 subsys_d = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
881 printf("\t!!! Unknown header type %02x\n", htype);
885 if (subsys_v && subsys_v != 0xffff)
886 printf("\tSubsystem: %s\n",
887 pci_lookup_name(pacc, ssnamebuf, sizeof(ssnamebuf),
888 PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
889 p->vendor_id, p->device_id, subsys_v, subsys_d));
893 printf("\tControl: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c\n",
894 FLAG(cmd, PCI_COMMAND_IO),
895 FLAG(cmd, PCI_COMMAND_MEMORY),
896 FLAG(cmd, PCI_COMMAND_MASTER),
897 FLAG(cmd, PCI_COMMAND_SPECIAL),
898 FLAG(cmd, PCI_COMMAND_INVALIDATE),
899 FLAG(cmd, PCI_COMMAND_VGA_PALETTE),
900 FLAG(cmd, PCI_COMMAND_PARITY),
901 FLAG(cmd, PCI_COMMAND_WAIT),
902 FLAG(cmd, PCI_COMMAND_SERR),
903 FLAG(cmd, PCI_COMMAND_FAST_BACK));
904 printf("\tStatus: Cap%c 66Mhz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c >SERR%c <PERR%c\n",
905 FLAG(status, PCI_STATUS_CAP_LIST),
906 FLAG(status, PCI_STATUS_66MHZ),
907 FLAG(status, PCI_STATUS_UDF),
908 FLAG(status, PCI_STATUS_FAST_BACK),
909 FLAG(status, PCI_STATUS_PARITY),
910 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
911 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
912 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
913 FLAG(status, PCI_STATUS_SIG_TARGET_ABORT),
914 FLAG(status, PCI_STATUS_REC_TARGET_ABORT),
915 FLAG(status, PCI_STATUS_REC_MASTER_ABORT),
916 FLAG(status, PCI_STATUS_SIG_SYSTEM_ERROR),
917 FLAG(status, PCI_STATUS_DETECTED_PARITY));
918 if (cmd & PCI_COMMAND_MASTER)
920 printf("\tLatency: %d", latency);
921 if (min_gnt || max_lat)
925 printf("%dns min", min_gnt*250);
926 if (min_gnt && max_lat)
929 printf("%dns max", max_lat*250);
933 printf(", cache line size %02x", cache_line);
937 printf("\tInterrupt: pin %c routed to IRQ " IRQ_FORMAT "\n",
938 (int_pin ? 'A' + int_pin - 1 : '?'), irq);
943 if (cmd & PCI_COMMAND_MASTER)
944 printf("bus master, ");
945 if (cmd & PCI_COMMAND_VGA_PALETTE)
946 printf("VGA palette snoop, ");
947 if (cmd & PCI_COMMAND_WAIT)
948 printf("stepping, ");
949 if (cmd & PCI_COMMAND_FAST_BACK)
950 printf("fast Back2Back, ");
951 if (status & PCI_STATUS_66MHZ)
953 if (status & PCI_STATUS_UDF)
954 printf("user-definable features, ");
956 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
957 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
958 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??");
959 if (cmd & PCI_COMMAND_MASTER)
960 printf(", latency %d", latency);
962 printf(", IRQ " IRQ_FORMAT, irq);
966 if (bist & PCI_BIST_CAPABLE)
968 if (bist & PCI_BIST_START)
969 printf("\tBIST is running\n");
971 printf("\tBIST result: %02x\n", bist & PCI_BIST_CODE_MASK);
976 case PCI_HEADER_TYPE_NORMAL:
979 case PCI_HEADER_TYPE_BRIDGE:
982 case PCI_HEADER_TYPE_CARDBUS:
989 show_hex_dump(struct device *d)
993 for(i=0; i<d->config_cnt; i++)
997 printf(" %02x", get_conf_byte(d, i));
1004 show_machine(struct device *d)
1006 struct pci_dev *p = d->dev;
1008 word sv_id=0, sd_id=0;
1009 char classbuf[128], vendbuf[128], devbuf[128], svbuf[128], sdbuf[128];
1011 switch (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f)
1013 case PCI_HEADER_TYPE_NORMAL:
1014 sv_id = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
1015 sd_id = get_conf_word(d, PCI_SUBSYSTEM_ID);
1017 case PCI_HEADER_TYPE_CARDBUS:
1018 sv_id = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
1019 sd_id = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
1025 printf("Device:\t%02x:%02x.%x\n", p->bus, p->dev, p->func);
1026 printf("Class:\t%s\n",
1027 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, get_conf_word(d, PCI_CLASS_DEVICE), 0, 0, 0));
1028 printf("Vendor:\t%s\n",
1029 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id, 0, 0));
1030 printf("Device:\t%s\n",
1031 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, 0, 0));
1032 if (sv_id && sv_id != 0xffff)
1034 printf("SVendor:\t%s\n",
1035 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id, sv_id, sd_id));
1036 printf("SDevice:\t%s\n",
1037 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
1039 if (c = get_conf_byte(d, PCI_REVISION_ID))
1040 printf("Rev:\t%02x\n", c);
1041 if (c = get_conf_byte(d, PCI_CLASS_PROG))
1042 printf("ProgIf:\t%02x\n", c);
1046 printf("%02x:%02x.%x ", p->bus, p->dev, p->func);
1047 printf("\"%s\" \"%s\" \"%s\"",
1048 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS,
1049 get_conf_word(d, PCI_CLASS_DEVICE), 0, 0, 0),
1050 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR,
1051 p->vendor_id, p->device_id, 0, 0),
1052 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE,
1053 p->vendor_id, p->device_id, 0, 0));
1054 if (c = get_conf_byte(d, PCI_REVISION_ID))
1055 printf(" -r%02x", c);
1056 if (c = get_conf_byte(d, PCI_CLASS_PROG))
1057 printf(" -p%02x", c);
1058 if (sv_id && sv_id != 0xffff)
1059 printf(" \"%s\" \"%s\"",
1060 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id, sv_id, sd_id),
1061 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
1063 printf(" \"\" \"\"");
1069 show_device(struct device *d)
1071 if (machine_readable)
1079 if (verbose || show_hex)
1088 for(d=first_dev; d; d=d->next)
1095 struct bridge *chain; /* Single-linked list of bridges */
1096 struct bridge *next, *child; /* Tree of bridges */
1097 struct bus *first_bus; /* List of busses connected to this bridge */
1098 unsigned int primary, secondary, subordinate; /* Bus numbers */
1099 struct device *br_dev;
1103 unsigned int number;
1104 struct bus *sibling;
1105 struct device *first_dev, **last_dev;
1108 static struct bridge host_bridge = { NULL, NULL, NULL, NULL, ~0, 0, ~0, NULL };
1111 find_bus(struct bridge *b, unsigned int n)
1115 for(bus=b->first_bus; bus; bus=bus->sibling)
1116 if (bus->number == n)
1122 new_bus(struct bridge *b, unsigned int n)
1124 struct bus *bus = xmalloc(sizeof(struct bus));
1126 bus = xmalloc(sizeof(struct bus));
1128 bus->sibling = b->first_bus;
1129 bus->first_dev = NULL;
1130 bus->last_dev = &bus->first_dev;
1136 insert_dev(struct device *d, struct bridge *b)
1138 struct pci_dev *p = d->dev;
1141 if (! (bus = find_bus(b, p->bus)))
1144 for(c=b->child; c; c=c->next)
1145 if (c->secondary <= p->bus && p->bus <= c->subordinate)
1150 bus = new_bus(b, p->bus);
1152 /* Simple insertion at the end _does_ guarantee the correct order as the
1153 * original device list was sorted by (bus, devfn) lexicographically
1154 * and all devices on the new list have the same bus number.
1157 bus->last_dev = &d->next;
1164 struct device *d, *d2;
1165 struct bridge **last_br, *b;
1167 /* Build list of bridges */
1169 last_br = &host_bridge.chain;
1170 for(d=first_dev; d; d=d->next)
1172 word class = get_conf_word(d, PCI_CLASS_DEVICE);
1173 byte ht = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
1174 if (class == PCI_CLASS_BRIDGE_PCI &&
1175 (ht == PCI_HEADER_TYPE_BRIDGE || ht == PCI_HEADER_TYPE_CARDBUS))
1177 b = xmalloc(sizeof(struct bridge));
1178 if (ht == PCI_HEADER_TYPE_BRIDGE)
1180 b->primary = get_conf_byte(d, PCI_CB_PRIMARY_BUS);
1181 b->secondary = get_conf_byte(d, PCI_CB_CARD_BUS);
1182 b->subordinate = get_conf_byte(d, PCI_CB_SUBORDINATE_BUS);
1186 b->primary = get_conf_byte(d, PCI_PRIMARY_BUS);
1187 b->secondary = get_conf_byte(d, PCI_SECONDARY_BUS);
1188 b->subordinate = get_conf_byte(d, PCI_SUBORDINATE_BUS);
1191 last_br = &b->chain;
1192 b->next = b->child = NULL;
1193 b->first_bus = NULL;
1199 /* Create a bridge tree */
1201 for(b=&host_bridge; b; b=b->chain)
1203 struct bridge *c, *best;
1205 for(c=&host_bridge; c; c=c->chain)
1206 if (c != b && b->primary >= c->secondary && b->primary <= c->subordinate &&
1207 (!best || best->subordinate - best->primary > c->subordinate - c->primary))
1211 b->next = best->child;
1216 /* Insert secondary bus for each bridge */
1218 for(b=&host_bridge; b; b=b->chain)
1219 if (!find_bus(b, b->secondary))
1220 new_bus(b, b->secondary);
1222 /* Create bus structs and link devices */
1224 for(d=first_dev; d;)
1227 insert_dev(d, &host_bridge);
1233 print_it(byte *line, byte *p)
1237 fputs(line, stdout);
1238 for(p=line; *p; p++)
1239 if (*p == '+' || *p == '|')
1245 static void show_tree_bridge(struct bridge *, byte *, byte *);
1248 show_tree_dev(struct device *d, byte *line, byte *p)
1250 struct pci_dev *q = d->dev;
1254 p += sprintf(p, "%02x.%x", q->dev, q->func);
1255 for(b=&host_bridge; b; b=b->chain)
1258 if (b->secondary == b->subordinate)
1259 p += sprintf(p, "-[%02x]-", b->secondary);
1261 p += sprintf(p, "-[%02x-%02x]-", b->secondary, b->subordinate);
1262 show_tree_bridge(b, line, p);
1266 p += sprintf(p, " %s",
1267 pci_lookup_name(pacc, namebuf, sizeof(namebuf),
1268 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
1269 q->vendor_id, q->device_id, 0, 0));
1274 show_tree_bus(struct bus *b, byte *line, byte *p)
1278 else if (!b->first_dev->next)
1282 show_tree_dev(b->first_dev, line, p);
1286 struct device *d = b->first_dev;
1291 show_tree_dev(d, line, p+2);
1296 show_tree_dev(d, line, p+2);
1301 show_tree_bridge(struct bridge *b, byte *line, byte *p)
1304 if (!b->first_bus->sibling)
1306 if (b == &host_bridge)
1307 p += sprintf(p, "[%02x]-", b->first_bus->number);
1308 show_tree_bus(b->first_bus, line, p);
1312 struct bus *u = b->first_bus;
1317 k = p + sprintf(p, "+-[%02x]-", u->number);
1318 show_tree_bus(u, line, k);
1321 k = p + sprintf(p, "\\-[%02x]-", u->number);
1322 show_tree_bus(u, line, k);
1332 show_tree_bridge(&host_bridge, line, line);
1335 /* Bus mapping mode */
1338 struct bus_bridge *next;
1339 byte this, dev, func, first, last, bug;
1345 struct bus_bridge *bridges, *via;
1348 static struct bus_info *bus_info;
1351 map_bridge(struct bus_info *bi, struct device *d, int np, int ns, int nl)
1353 struct bus_bridge *b = xmalloc(sizeof(struct bus_bridge));
1354 struct pci_dev *p = d->dev;
1356 b->next = bi->bridges;
1358 b->this = get_conf_byte(d, np);
1361 b->first = get_conf_byte(d, ns);
1362 b->last = get_conf_byte(d, nl);
1363 printf("## %02x.%02x:%d is a bridge from %02x to %02x-%02x\n",
1364 p->bus, p->dev, p->func, b->this, b->first, b->last);
1365 if (b->this != p->bus)
1366 printf("!!! Bridge points to invalid primary bus.\n");
1367 if (b->first > b->last)
1369 printf("!!! Bridge points to invalid bus range.\n");
1378 int verbose = pacc->debugging;
1379 struct bus_info *bi = bus_info + bus;
1383 printf("Mapping bus %02x\n", bus);
1384 for(dev = 0; dev < 32; dev++)
1385 if (filter.slot < 0 || filter.slot == dev)
1388 for(func = 0; func < func_limit; func++)
1389 if (filter.func < 0 || filter.func == func)
1391 struct pci_dev *p = pci_get_dev(pacc, bus, dev, func);
1392 u16 vendor = pci_read_word(p, PCI_VENDOR_ID);
1393 if (vendor && vendor != 0xffff)
1395 if (!func && (pci_read_byte(p, PCI_HEADER_TYPE) & 0x80))
1398 printf("Discovered device %02x:%02x.%d\n", bus, dev, func);
1400 if (d = scan_device(p))
1403 switch (get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f)
1405 case PCI_HEADER_TYPE_BRIDGE:
1406 map_bridge(bi, d, PCI_PRIMARY_BUS, PCI_SECONDARY_BUS, PCI_SUBORDINATE_BUS);
1408 case PCI_HEADER_TYPE_CARDBUS:
1409 map_bridge(bi, d, PCI_CB_PRIMARY_BUS, PCI_CB_CARD_BUS, PCI_CB_SUBORDINATE_BUS);
1415 printf("But it was filtered out.\n");
1423 do_map_bridges(int bus, int min, int max)
1425 struct bus_info *bi = bus_info + bus;
1426 struct bus_bridge *b;
1429 for(b=bi->bridges; b; b=b->next)
1431 if (bus_info[b->first].guestbook)
1433 else if (b->first < min || b->last > max)
1437 bus_info[b->first].via = b;
1438 do_map_bridges(b->first, b->first, b->last);
1448 printf("\nSummary of buses:\n\n");
1449 for(i=0; i<256; i++)
1450 if (bus_info[i].exists && !bus_info[i].guestbook)
1451 do_map_bridges(i, 0, 255);
1452 for(i=0; i<256; i++)
1454 struct bus_info *bi = bus_info + i;
1455 struct bus_bridge *b = bi->via;
1459 printf("%02x: ", i);
1461 printf("Entered via %02x:%02x.%d\n", b->this, b->dev, b->func);
1463 printf("Primary host bus\n");
1465 printf("Secondary host bus (?)\n");
1467 for(b=bi->bridges; b; b=b->next)
1469 printf("\t%02x.%d Bridge to %02x-%02x", b->dev, b->func, b->first, b->last);
1473 printf(" <overlap bug>");
1476 printf(" <crossing bug>");
1487 if (pacc->method == PCI_ACCESS_PROC_BUS_PCI ||
1488 pacc->method == PCI_ACCESS_DUMP)
1489 printf("WARNING: Bus mapping can be reliable only with direct hardware access enabled.\n\n");
1490 else if (!check_root())
1491 die("Only root can map the bus.");
1492 bus_info = xmalloc(sizeof(struct bus_info) * 256);
1493 bzero(bus_info, sizeof(struct bus_info) * 256);
1494 if (filter.bus >= 0)
1495 do_map_bus(filter.bus);
1499 for(bus=0; bus<256; bus++)
1508 main(int argc, char **argv)
1513 if (argc == 2 && !strcmp(argv[1], "--version"))
1515 puts("lspci version " PCIUTILS_VERSION);
1521 pci_filter_init(pacc, &filter);
1523 while ((i = getopt(argc, argv, options)) != -1)
1527 pacc->numeric_ids = 1;
1533 pacc->buscentric = 1;
1534 buscentric_view = 1;
1537 if (msg = pci_filter_parse_slot(&filter, optarg))
1541 if (msg = pci_filter_parse_id(&filter, optarg))
1551 pacc->id_file_name = optarg;
1560 if (parse_generic_option(i, pacc, optarg))
1563 fprintf(stderr, help_msg, pacc->id_file_name);