2 * The PCI Utilities -- List All PCI Devices
4 * Copyright (c) 1997--2020 Martin Mares <mj@ucw.cz>
6 * Can be freely distributed and used under the terms of the GNU GPL.
18 int verbose; /* Show detailed information */
19 static int opt_hex; /* Show contents of config space as hexadecimal numbers */
20 struct pci_filter filter; /* Device filter */
21 static int opt_filter; /* Any filter was given */
22 static int opt_tree; /* Show bus tree */
23 static int opt_path; /* Show bridge path */
24 static int opt_machine; /* Generate machine-readable output */
25 static int opt_map_mode; /* Bus mapping mode enabled */
26 static int opt_domains; /* Show domain numbers (0=disabled, 1=auto-detected, 2=requested) */
27 static int opt_kernel; /* Show kernel drivers */
28 static int opt_query_dns; /* Query the DNS (0=disabled, 1=enabled, 2=refresh cache) */
29 static int opt_query_all; /* Query the DNS for all entries */
30 char *opt_pcimap; /* Override path to Linux modules.pcimap */
32 const char program_name[] = "lspci";
34 static char options[] = "nvbxs:d:tPi:mgp:qkMDQ" GENERIC_OPTIONS ;
36 static char help_msg[] =
37 "Usage: lspci [<switches>]\n"
39 "Basic display modes:\n"
40 "-mm\t\tProduce machine-readable output (single -m for an obsolete format)\n"
41 "-t\t\tShow bus tree\n"
44 "-v\t\tBe verbose (-vv or -vvv for higher verbosity)\n"
46 "-k\t\tShow kernel drivers handling each device\n"
48 "-x\t\tShow hex-dump of the standard part of the config space\n"
49 "-xxx\t\tShow hex-dump of the whole config space (dangerous; root only)\n"
50 "-xxxx\t\tShow hex-dump of the 4096-byte extended config space (root only)\n"
51 "-b\t\tBus-centric view (addresses and IRQ's as seen by the bus)\n"
52 "-D\t\tAlways show domain numbers\n"
53 "-P\t\tDisplay bridge path in addition to bus and device number\n"
54 "-PP\t\tDisplay bus path in addition to bus and device number\n"
56 "Resolving of device ID's to names:\n"
57 "-n\t\tShow numeric ID's\n"
58 "-nn\t\tShow both textual and numeric ID's (names & numbers)\n"
60 "-q\t\tQuery the PCI ID database for unknown ID's via DNS\n"
61 "-qq\t\tAs above, but re-query locally cached entries\n"
62 "-Q\t\tQuery the PCI ID database for all ID's via DNS\n"
65 "Selection of devices:\n"
66 "-s [[[[<domain>]:]<bus>]:][<slot>][.[<func>]]\tShow only devices in selected slots\n"
67 "-d [<vendor>]:[<device>][:<class>]\t\tShow only devices with specified ID's\n"
70 "-i <file>\tUse specified ID database instead of %s\n"
72 "-p <file>\tLook up kernel modules in a given file instead of default modules.pcimap\n"
74 "-M\t\tEnable `bus mapping' mode (dangerous; root only)\n"
76 "PCI access options:\n"
80 /*** Our view of the PCI bus ***/
82 struct pci_access *pacc;
83 struct device *first_dev;
84 static int seen_errors;
85 static int need_topology;
88 config_fetch(struct device *d, unsigned int pos, unsigned int len)
90 unsigned int end = pos+len;
93 while (pos < d->config_bufsize && len && d->present[pos])
95 while (pos+len <= d->config_bufsize && len && d->present[pos+len-1])
100 if (end > d->config_bufsize)
102 int orig_size = d->config_bufsize;
103 while (end > d->config_bufsize)
104 d->config_bufsize *= 2;
105 d->config = xrealloc(d->config, d->config_bufsize);
106 d->present = xrealloc(d->present, d->config_bufsize);
107 memset(d->present + orig_size, 0, d->config_bufsize - orig_size);
109 result = pci_read_block(d->dev, pos, d->config + pos, len);
111 memset(d->present + pos, 1, len);
116 scan_device(struct pci_dev *p)
120 if (p->domain && !opt_domains)
122 if (!pci_filter_match(&filter, p) && !need_topology)
124 d = xmalloc(sizeof(struct device));
125 memset(d, 0, sizeof(*d));
127 d->config_cached = d->config_bufsize = 64;
128 d->config = xmalloc(64);
129 d->present = xmalloc(64);
130 memset(d->present, 1, 64);
131 if (!pci_read_block(p, 0, d->config, 64))
133 fprintf(stderr, "lspci: Unable to read the standard configuration space header of device %04x:%02x:%02x.%d\n",
134 p->domain, p->bus, p->dev, p->func);
138 if ((d->config[PCI_HEADER_TYPE] & 0x7f) == PCI_HEADER_TYPE_CARDBUS)
140 /* For cardbus bridges, we need to fetch 64 bytes more to get the
141 * full standard header... */
142 if (config_fetch(d, 64, 64))
143 d->config_cached += 64;
145 pci_setup_cache(p, d->config, d->config_cached);
146 pci_fill_info(p, PCI_FILL_IDENT | PCI_FILL_CLASS);
157 for (p=pacc->devices; p; p=p->next)
158 if (d = scan_device(p))
165 /*** Config space accesses ***/
168 check_conf_range(struct device *d, unsigned int pos, unsigned int len)
171 if (!d->present[pos])
172 die("Internal bug: Accessing non-read configuration byte at position %x", pos);
178 get_conf_byte(struct device *d, unsigned int pos)
180 check_conf_range(d, pos, 1);
181 return d->config[pos];
185 get_conf_word(struct device *d, unsigned int pos)
187 check_conf_range(d, pos, 2);
188 return d->config[pos] | (d->config[pos+1] << 8);
192 get_conf_long(struct device *d, unsigned int pos)
194 check_conf_range(d, pos, 4);
195 return d->config[pos] |
196 (d->config[pos+1] << 8) |
197 (d->config[pos+2] << 16) |
198 (d->config[pos+3] << 24);
204 compare_them(const void *A, const void *B)
206 const struct pci_dev *a = (*(const struct device **)A)->dev;
207 const struct pci_dev *b = (*(const struct device **)B)->dev;
209 if (a->domain < b->domain)
211 if (a->domain > b->domain)
221 if (a->func < b->func)
223 if (a->func > b->func)
231 struct device **index, **h, **last_dev;
236 for (d=first_dev; d; d=d->next)
238 h = index = alloca(sizeof(struct device *) * cnt);
239 for (d=first_dev; d; d=d->next)
241 qsort(index, cnt, sizeof(struct device *), compare_them);
242 last_dev = &first_dev;
247 last_dev = &(*h)->next;
253 /*** Normal output ***/
256 show_slot_path(struct device *d)
258 struct pci_dev *p = d->dev;
262 struct bus *bus = d->parent_bus;
263 struct bridge *br = bus->parent_bridge;
265 if (br && br->br_dev)
267 show_slot_path(br->br_dev);
269 printf("/%02x:%02x.%d", p->bus, p->dev, p->func);
271 printf("/%02x.%d", p->dev, p->func);
275 printf("%02x:%02x.%d", p->bus, p->dev, p->func);
279 show_slot_name(struct device *d)
281 struct pci_dev *p = d->dev;
283 if (!opt_machine ? opt_domains : (p->domain || opt_domains >= 2))
284 printf("%04x:", p->domain);
289 get_subid(struct device *d, word *subvp, word *subdp)
291 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
293 if (htype == PCI_HEADER_TYPE_NORMAL)
295 *subvp = get_conf_word(d, PCI_SUBSYSTEM_VENDOR_ID);
296 *subdp = get_conf_word(d, PCI_SUBSYSTEM_ID);
298 else if (htype == PCI_HEADER_TYPE_CARDBUS && d->config_cached >= 128)
300 *subvp = get_conf_word(d, PCI_CB_SUBSYSTEM_VENDOR_ID);
301 *subdp = get_conf_word(d, PCI_CB_SUBSYSTEM_ID);
304 *subvp = *subdp = 0xffff;
308 show_terse(struct device *d)
311 struct pci_dev *p = d->dev;
312 char classbuf[128], devbuf[128];
316 pci_lookup_name(pacc, classbuf, sizeof(classbuf),
319 pci_lookup_name(pacc, devbuf, sizeof(devbuf),
320 PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
321 p->vendor_id, p->device_id));
322 if (c = get_conf_byte(d, PCI_REVISION_ID))
323 printf(" (rev %02x)", c);
327 c = get_conf_byte(d, PCI_CLASS_PROG);
328 x = pci_lookup_name(pacc, devbuf, sizeof(devbuf),
329 PCI_LOOKUP_PROGIF | PCI_LOOKUP_NO_NUMBERS,
333 printf(" (prog-if %02x", c);
341 if (verbose || opt_kernel)
343 word subsys_v, subsys_d;
346 pci_fill_info(p, PCI_FILL_LABEL);
349 printf("\tDeviceName: %s", p->label);
350 get_subid(d, &subsys_v, &subsys_d);
351 if (subsys_v && subsys_v != 0xffff)
352 printf("\tSubsystem: %s\n",
353 pci_lookup_name(pacc, ssnamebuf, sizeof(ssnamebuf),
354 PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR | PCI_LOOKUP_DEVICE,
355 p->vendor_id, p->device_id, subsys_v, subsys_d));
359 /*** Verbose output ***/
364 static const char suffix[][2] = { "", "K", "M", "G", "T" };
368 for (i = 0; i < (sizeof(suffix) / sizeof(*suffix) - 1); i++) {
373 printf(" [size=%u%s]", (unsigned)x, suffix[i]);
377 show_range(char *prefix, u64 base, u64 limit, int bits)
379 printf("%s:", prefix);
380 if (base <= limit || verbose > 2)
381 printf(" %0*" PCI_U64_FMT_X "-%0*" PCI_U64_FMT_X, (bits+3)/4, base, (bits+3)/4, limit);
383 show_size(limit - base + 1);
385 printf(" [disabled]");
386 printf(" [%d-bit]", bits);
391 show_bases(struct device *d, int cnt)
393 struct pci_dev *p = d->dev;
394 word cmd = get_conf_word(d, PCI_COMMAND);
398 for (i=0; i<cnt; i++)
400 pciaddr_t pos = p->base_addr[i];
401 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->size[i] : 0;
402 pciaddr_t ioflg = (p->known_fields & PCI_FILL_IO_FLAGS) ? p->flags[i] : 0;
403 u32 flg = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
408 if (flg == 0xffffffff)
410 if (!pos && !flg && !len)
414 printf("\tRegion %d: ", i);
418 /* Read address as seen by the hardware */
419 if (flg & PCI_BASE_ADDRESS_SPACE_IO)
420 hw_lower = flg & PCI_BASE_ADDRESS_IO_MASK;
423 hw_lower = flg & PCI_BASE_ADDRESS_MEM_MASK;
424 if ((flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == PCI_BASE_ADDRESS_MEM_TYPE_64)
431 hw_upper = get_conf_long(d, PCI_BASE_ADDRESS_0 + 4*i);
436 /* Detect virtual regions, which are reported by the OS, but unassigned in the device */
437 if (pos && !hw_lower && !hw_upper && !(ioflg & PCI_IORESOURCE_PCI_EA_BEI))
443 /* Print base address */
444 if (flg & PCI_BASE_ADDRESS_SPACE_IO)
446 pciaddr_t a = pos & PCI_BASE_ADDRESS_IO_MASK;
447 printf("I/O ports at ");
448 if (a || (cmd & PCI_COMMAND_IO))
449 printf(PCIADDR_PORT_FMT, a);
453 printf("<unassigned>");
455 printf(" [virtual]");
456 else if (!(cmd & PCI_COMMAND_IO))
457 printf(" [disabled]");
461 int t = flg & PCI_BASE_ADDRESS_MEM_TYPE_MASK;
462 pciaddr_t a = pos & PCI_ADDR_MEM_MASK;
464 printf("Memory at ");
466 printf("<broken-64-bit-slot>");
468 printf(PCIADDR_T_FMT, a);
469 else if (hw_lower || hw_upper)
472 printf("<unassigned>");
473 printf(" (%s, %sprefetchable)",
474 (t == PCI_BASE_ADDRESS_MEM_TYPE_32) ? "32-bit" :
475 (t == PCI_BASE_ADDRESS_MEM_TYPE_64) ? "64-bit" :
476 (t == PCI_BASE_ADDRESS_MEM_TYPE_1M) ? "low-1M" : "type 3",
477 (flg & PCI_BASE_ADDRESS_MEM_PREFETCH) ? "" : "non-");
479 printf(" [virtual]");
480 else if (!(cmd & PCI_COMMAND_MEMORY))
481 printf(" [disabled]");
484 if (ioflg & PCI_IORESOURCE_PCI_EA_BEI)
485 printf(" [enhanced]");
493 show_rom(struct device *d, int reg)
495 struct pci_dev *p = d->dev;
496 pciaddr_t rom = p->rom_base_addr;
497 pciaddr_t len = (p->known_fields & PCI_FILL_SIZES) ? p->rom_size : 0;
498 pciaddr_t ioflg = (p->known_fields & PCI_FILL_IO_FLAGS) ? p->rom_flags : 0;
499 u32 flg = get_conf_long(d, reg);
500 word cmd = get_conf_word(d, PCI_COMMAND);
503 if (!rom && !flg && !len)
506 if ((rom & PCI_ROM_ADDRESS_MASK) && !(flg & PCI_ROM_ADDRESS_MASK) && !(ioflg & PCI_IORESOURCE_PCI_EA_BEI))
512 printf("\tExpansion ROM at ");
513 if (rom & PCI_ROM_ADDRESS_MASK)
514 printf(PCIADDR_T_FMT, rom & PCI_ROM_ADDRESS_MASK);
515 else if (flg & PCI_ROM_ADDRESS_MASK)
518 printf("<unassigned>");
521 printf(" [virtual]");
523 if (!(flg & PCI_ROM_ADDRESS_ENABLE))
524 printf(" [disabled]");
525 else if (!virtual && !(cmd & PCI_COMMAND_MEMORY))
526 printf(" [disabled by cmd]");
528 if (ioflg & PCI_IORESOURCE_PCI_EA_BEI)
529 printf(" [enhanced]");
536 show_htype0(struct device *d)
539 show_rom(d, PCI_ROM_ADDRESS);
540 show_caps(d, PCI_CAPABILITY_LIST);
544 show_htype1(struct device *d)
546 u32 io_base = get_conf_byte(d, PCI_IO_BASE);
547 u32 io_limit = get_conf_byte(d, PCI_IO_LIMIT);
548 u32 io_type = io_base & PCI_IO_RANGE_TYPE_MASK;
549 u32 mem_base = get_conf_word(d, PCI_MEMORY_BASE);
550 u32 mem_limit = get_conf_word(d, PCI_MEMORY_LIMIT);
551 u32 mem_type = mem_base & PCI_MEMORY_RANGE_TYPE_MASK;
552 u32 pref_base = get_conf_word(d, PCI_PREF_MEMORY_BASE);
553 u32 pref_limit = get_conf_word(d, PCI_PREF_MEMORY_LIMIT);
554 u32 pref_type = pref_base & PCI_PREF_RANGE_TYPE_MASK;
555 word sec_stat = get_conf_word(d, PCI_SEC_STATUS);
556 word brc = get_conf_word(d, PCI_BRIDGE_CONTROL);
559 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
560 get_conf_byte(d, PCI_PRIMARY_BUS),
561 get_conf_byte(d, PCI_SECONDARY_BUS),
562 get_conf_byte(d, PCI_SUBORDINATE_BUS),
563 get_conf_byte(d, PCI_SEC_LATENCY_TIMER));
565 if (io_type != (io_limit & PCI_IO_RANGE_TYPE_MASK) ||
566 (io_type != PCI_IO_RANGE_TYPE_16 && io_type != PCI_IO_RANGE_TYPE_32))
567 printf("\t!!! Unknown I/O range types %x/%x\n", io_base, io_limit);
570 io_base = (io_base & PCI_IO_RANGE_MASK) << 8;
571 io_limit = (io_limit & PCI_IO_RANGE_MASK) << 8;
572 if (io_type == PCI_IO_RANGE_TYPE_32)
574 io_base |= (get_conf_word(d, PCI_IO_BASE_UPPER16) << 16);
575 io_limit |= (get_conf_word(d, PCI_IO_LIMIT_UPPER16) << 16);
577 show_range("\tI/O behind bridge", io_base, io_limit+0xfff, (io_type == PCI_IO_RANGE_TYPE_32) ? 32 : 16);
580 if (mem_type != (mem_limit & PCI_MEMORY_RANGE_TYPE_MASK) ||
582 printf("\t!!! Unknown memory range types %x/%x\n", mem_base, mem_limit);
585 mem_base = (mem_base & PCI_MEMORY_RANGE_MASK) << 16;
586 mem_limit = (mem_limit & PCI_MEMORY_RANGE_MASK) << 16;
587 show_range("\tMemory behind bridge", mem_base, mem_limit + 0xfffff, 32);
590 if (pref_type != (pref_limit & PCI_PREF_RANGE_TYPE_MASK) ||
591 (pref_type != PCI_PREF_RANGE_TYPE_32 && pref_type != PCI_PREF_RANGE_TYPE_64))
592 printf("\t!!! Unknown prefetchable memory range types %x/%x\n", pref_base, pref_limit);
595 u64 pref_base_64 = (pref_base & PCI_PREF_RANGE_MASK) << 16;
596 u64 pref_limit_64 = (pref_limit & PCI_PREF_RANGE_MASK) << 16;
597 if (pref_type == PCI_PREF_RANGE_TYPE_64)
599 pref_base_64 |= (u64) get_conf_long(d, PCI_PREF_BASE_UPPER32) << 32;
600 pref_limit_64 |= (u64) get_conf_long(d, PCI_PREF_LIMIT_UPPER32) << 32;
602 show_range("\tPrefetchable memory behind bridge", pref_base_64, pref_limit_64 + 0xfffff, (pref_type == PCI_PREF_RANGE_TYPE_64) ? 64 : 32);
606 printf("\tSecondary status: 66MHz%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c <SERR%c <PERR%c\n",
607 FLAG(sec_stat, PCI_STATUS_66MHZ),
608 FLAG(sec_stat, PCI_STATUS_FAST_BACK),
609 FLAG(sec_stat, PCI_STATUS_PARITY),
610 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
611 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
612 ((sec_stat & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
613 FLAG(sec_stat, PCI_STATUS_SIG_TARGET_ABORT),
614 FLAG(sec_stat, PCI_STATUS_REC_TARGET_ABORT),
615 FLAG(sec_stat, PCI_STATUS_REC_MASTER_ABORT),
616 FLAG(sec_stat, PCI_STATUS_SIG_SYSTEM_ERROR),
617 FLAG(sec_stat, PCI_STATUS_DETECTED_PARITY));
619 show_rom(d, PCI_ROM_ADDRESS1);
623 printf("\tBridgeCtl: Parity%c SERR%c NoISA%c VGA%c VGA16%c MAbort%c >Reset%c FastB2B%c\n",
624 FLAG(brc, PCI_BRIDGE_CTL_PARITY),
625 FLAG(brc, PCI_BRIDGE_CTL_SERR),
626 FLAG(brc, PCI_BRIDGE_CTL_NO_ISA),
627 FLAG(brc, PCI_BRIDGE_CTL_VGA),
628 FLAG(brc, PCI_BRIDGE_CTL_VGA_16BIT),
629 FLAG(brc, PCI_BRIDGE_CTL_MASTER_ABORT),
630 FLAG(brc, PCI_BRIDGE_CTL_BUS_RESET),
631 FLAG(brc, PCI_BRIDGE_CTL_FAST_BACK));
632 printf("\t\tPriDiscTmr%c SecDiscTmr%c DiscTmrStat%c DiscTmrSERREn%c\n",
633 FLAG(brc, PCI_BRIDGE_CTL_PRI_DISCARD_TIMER),
634 FLAG(brc, PCI_BRIDGE_CTL_SEC_DISCARD_TIMER),
635 FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_STATUS),
636 FLAG(brc, PCI_BRIDGE_CTL_DISCARD_TIMER_SERR_EN));
639 show_caps(d, PCI_CAPABILITY_LIST);
643 show_htype2(struct device *d)
646 word cmd = get_conf_word(d, PCI_COMMAND);
647 word brc = get_conf_word(d, PCI_CB_BRIDGE_CONTROL);
649 int verb = verbose > 2;
652 printf("\tBus: primary=%02x, secondary=%02x, subordinate=%02x, sec-latency=%d\n",
653 get_conf_byte(d, PCI_CB_PRIMARY_BUS),
654 get_conf_byte(d, PCI_CB_CARD_BUS),
655 get_conf_byte(d, PCI_CB_SUBORDINATE_BUS),
656 get_conf_byte(d, PCI_CB_LATENCY_TIMER));
660 u32 base = get_conf_long(d, PCI_CB_MEMORY_BASE_0 + p);
661 u32 limit = get_conf_long(d, PCI_CB_MEMORY_LIMIT_0 + p);
662 limit = limit + 0xfff;
663 if (base <= limit || verb)
664 printf("\tMemory window %d: %08x-%08x%s%s\n", i, base, limit,
665 (cmd & PCI_COMMAND_MEMORY) ? "" : " [disabled]",
666 (brc & (PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 << i)) ? " (prefetchable)" : "");
671 u32 base = get_conf_long(d, PCI_CB_IO_BASE_0 + p);
672 u32 limit = get_conf_long(d, PCI_CB_IO_LIMIT_0 + p);
673 if (!(base & PCI_IO_RANGE_TYPE_32))
678 base &= PCI_CB_IO_RANGE_MASK;
679 limit = (limit & PCI_CB_IO_RANGE_MASK) + 3;
680 if (base <= limit || verb)
681 printf("\tI/O window %d: %08x-%08x%s\n", i, base, limit,
682 (cmd & PCI_COMMAND_IO) ? "" : " [disabled]");
685 if (get_conf_word(d, PCI_CB_SEC_STATUS) & PCI_STATUS_SIG_SYSTEM_ERROR)
686 printf("\tSecondary status: SERR\n");
688 printf("\tBridgeCtl: Parity%c SERR%c ISA%c VGA%c MAbort%c >Reset%c 16bInt%c PostWrite%c\n",
689 FLAG(brc, PCI_CB_BRIDGE_CTL_PARITY),
690 FLAG(brc, PCI_CB_BRIDGE_CTL_SERR),
691 FLAG(brc, PCI_CB_BRIDGE_CTL_ISA),
692 FLAG(brc, PCI_CB_BRIDGE_CTL_VGA),
693 FLAG(brc, PCI_CB_BRIDGE_CTL_MASTER_ABORT),
694 FLAG(brc, PCI_CB_BRIDGE_CTL_CB_RESET),
695 FLAG(brc, PCI_CB_BRIDGE_CTL_16BIT_INT),
696 FLAG(brc, PCI_CB_BRIDGE_CTL_POST_WRITES));
698 if (d->config_cached < 128)
700 printf("\t<access denied to the rest>\n");
704 exca = get_conf_word(d, PCI_CB_LEGACY_MODE_BASE);
706 printf("\t16-bit legacy interface ports at %04x\n", exca);
707 show_caps(d, PCI_CB_CAPABILITY_LIST);
711 show_verbose(struct device *d)
713 struct pci_dev *p = d->dev;
714 word status = get_conf_word(d, PCI_STATUS);
715 word cmd = get_conf_word(d, PCI_COMMAND);
716 word class = p->device_class;
717 byte bist = get_conf_byte(d, PCI_BIST);
718 byte htype = get_conf_byte(d, PCI_HEADER_TYPE) & 0x7f;
719 byte latency = get_conf_byte(d, PCI_LATENCY_TIMER);
720 byte cache_line = get_conf_byte(d, PCI_CACHE_LINE_SIZE);
721 byte max_lat, min_gnt;
722 byte int_pin = get_conf_byte(d, PCI_INTERRUPT_PIN);
724 char *dt_node, *iommu_group;
728 pci_fill_info(p, PCI_FILL_IRQ | PCI_FILL_BASES | PCI_FILL_ROM_BASE | PCI_FILL_SIZES |
729 PCI_FILL_PHYS_SLOT | PCI_FILL_NUMA_NODE | PCI_FILL_DT_NODE | PCI_FILL_IOMMU_GROUP);
734 case PCI_HEADER_TYPE_NORMAL:
735 if (class == PCI_CLASS_BRIDGE_PCI)
736 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
737 max_lat = get_conf_byte(d, PCI_MAX_LAT);
738 min_gnt = get_conf_byte(d, PCI_MIN_GNT);
740 case PCI_HEADER_TYPE_BRIDGE:
741 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
742 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
743 min_gnt = max_lat = 0;
745 case PCI_HEADER_TYPE_CARDBUS:
746 if ((class >> 8) != PCI_BASE_CLASS_BRIDGE)
747 printf("\t!!! Invalid class %04x for header type %02x\n", class, htype);
748 min_gnt = max_lat = 0;
751 printf("\t!!! Unknown header type %02x\n", htype);
756 printf("\tPhysical Slot: %s\n", p->phy_slot);
758 if (dt_node = pci_get_string_property(p, PCI_FILL_DT_NODE))
759 printf("\tDevice tree node: %s\n", dt_node);
763 printf("\tControl: I/O%c Mem%c BusMaster%c SpecCycle%c MemWINV%c VGASnoop%c ParErr%c Stepping%c SERR%c FastB2B%c DisINTx%c\n",
764 FLAG(cmd, PCI_COMMAND_IO),
765 FLAG(cmd, PCI_COMMAND_MEMORY),
766 FLAG(cmd, PCI_COMMAND_MASTER),
767 FLAG(cmd, PCI_COMMAND_SPECIAL),
768 FLAG(cmd, PCI_COMMAND_INVALIDATE),
769 FLAG(cmd, PCI_COMMAND_VGA_PALETTE),
770 FLAG(cmd, PCI_COMMAND_PARITY),
771 FLAG(cmd, PCI_COMMAND_WAIT),
772 FLAG(cmd, PCI_COMMAND_SERR),
773 FLAG(cmd, PCI_COMMAND_FAST_BACK),
774 FLAG(cmd, PCI_COMMAND_DISABLE_INTx));
775 printf("\tStatus: Cap%c 66MHz%c UDF%c FastB2B%c ParErr%c DEVSEL=%s >TAbort%c <TAbort%c <MAbort%c >SERR%c <PERR%c INTx%c\n",
776 FLAG(status, PCI_STATUS_CAP_LIST),
777 FLAG(status, PCI_STATUS_66MHZ),
778 FLAG(status, PCI_STATUS_UDF),
779 FLAG(status, PCI_STATUS_FAST_BACK),
780 FLAG(status, PCI_STATUS_PARITY),
781 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
782 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
783 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??",
784 FLAG(status, PCI_STATUS_SIG_TARGET_ABORT),
785 FLAG(status, PCI_STATUS_REC_TARGET_ABORT),
786 FLAG(status, PCI_STATUS_REC_MASTER_ABORT),
787 FLAG(status, PCI_STATUS_SIG_SYSTEM_ERROR),
788 FLAG(status, PCI_STATUS_DETECTED_PARITY),
789 FLAG(status, PCI_STATUS_INTx));
790 if (cmd & PCI_COMMAND_MASTER)
792 printf("\tLatency: %d", latency);
793 if (min_gnt || max_lat)
797 printf("%dns min", min_gnt*250);
798 if (min_gnt && max_lat)
801 printf("%dns max", max_lat*250);
805 printf(", Cache Line Size: %d bytes", cache_line * 4);
809 printf("\tInterrupt: pin %c routed to IRQ " PCIIRQ_FMT "\n",
810 (int_pin ? 'A' + int_pin - 1 : '?'), irq);
811 if (p->numa_node != -1)
812 printf("\tNUMA node: %d\n", p->numa_node);
813 if (iommu_group = pci_get_string_property(p, PCI_FILL_IOMMU_GROUP))
814 printf("\tIOMMU group: %s\n", iommu_group);
819 if (cmd & PCI_COMMAND_MASTER)
820 printf("bus master, ");
821 if (cmd & PCI_COMMAND_VGA_PALETTE)
822 printf("VGA palette snoop, ");
823 if (cmd & PCI_COMMAND_WAIT)
824 printf("stepping, ");
825 if (cmd & PCI_COMMAND_FAST_BACK)
826 printf("fast Back2Back, ");
827 if (status & PCI_STATUS_66MHZ)
829 if (status & PCI_STATUS_UDF)
830 printf("user-definable features, ");
832 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_SLOW) ? "slow" :
833 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_MEDIUM) ? "medium" :
834 ((status & PCI_STATUS_DEVSEL_MASK) == PCI_STATUS_DEVSEL_FAST) ? "fast" : "??");
835 if (cmd & PCI_COMMAND_MASTER)
836 printf(", latency %d", latency);
838 printf(", IRQ " PCIIRQ_FMT, irq);
839 if (p->numa_node != -1)
840 printf(", NUMA node %d", p->numa_node);
841 if (iommu_group = pci_get_string_property(p, PCI_FILL_IOMMU_GROUP))
842 printf(", IOMMU group %s", iommu_group);
846 if (bist & PCI_BIST_CAPABLE)
848 if (bist & PCI_BIST_START)
849 printf("\tBIST is running\n");
851 printf("\tBIST result: %02x\n", bist & PCI_BIST_CODE_MASK);
856 case PCI_HEADER_TYPE_NORMAL:
859 case PCI_HEADER_TYPE_BRIDGE:
862 case PCI_HEADER_TYPE_CARDBUS:
868 /*** Machine-readable dumps ***/
871 show_hex_dump(struct device *d)
875 cnt = d->config_cached;
876 if (opt_hex >= 3 && config_fetch(d, cnt, 256-cnt))
879 if (opt_hex >= 4 && config_fetch(d, 256, 4096-256))
883 for (i=0; i<cnt; i++)
887 printf(" %02x", get_conf_byte(d, i));
894 print_shell_escaped(char *c)
899 if (*c == '"' || *c == '\\')
907 show_machine(struct device *d)
909 struct pci_dev *p = d->dev;
912 char classbuf[128], vendbuf[128], devbuf[128], svbuf[128], sdbuf[128];
913 char *dt_node, *iommu_group;
915 get_subid(d, &sv_id, &sd_id);
919 pci_fill_info(p, PCI_FILL_PHYS_SLOT | PCI_FILL_NUMA_NODE | PCI_FILL_DT_NODE | PCI_FILL_IOMMU_GROUP);
920 printf((opt_machine >= 2) ? "Slot:\t" : "Device:\t");
923 printf("Class:\t%s\n",
924 pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, p->device_class));
925 printf("Vendor:\t%s\n",
926 pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id));
927 printf("Device:\t%s\n",
928 pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id));
929 if (sv_id && sv_id != 0xffff)
931 printf("SVendor:\t%s\n",
932 pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, sv_id));
933 printf("SDevice:\t%s\n",
934 pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
937 printf("PhySlot:\t%s\n", p->phy_slot);
938 if (c = get_conf_byte(d, PCI_REVISION_ID))
939 printf("Rev:\t%02x\n", c);
940 if (c = get_conf_byte(d, PCI_CLASS_PROG))
941 printf("ProgIf:\t%02x\n", c);
943 show_kernel_machine(d);
944 if (p->numa_node != -1)
945 printf("NUMANode:\t%d\n", p->numa_node);
946 if (dt_node = pci_get_string_property(p, PCI_FILL_DT_NODE))
947 printf("DTNode:\t%s\n", dt_node);
948 if (iommu_group = pci_get_string_property(p, PCI_FILL_IOMMU_GROUP))
949 printf("IOMMUGroup:\t%s\n", iommu_group);
954 print_shell_escaped(pci_lookup_name(pacc, classbuf, sizeof(classbuf), PCI_LOOKUP_CLASS, p->device_class));
955 print_shell_escaped(pci_lookup_name(pacc, vendbuf, sizeof(vendbuf), PCI_LOOKUP_VENDOR, p->vendor_id, p->device_id));
956 print_shell_escaped(pci_lookup_name(pacc, devbuf, sizeof(devbuf), PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id));
957 if (c = get_conf_byte(d, PCI_REVISION_ID))
958 printf(" -r%02x", c);
959 if (c = get_conf_byte(d, PCI_CLASS_PROG))
960 printf(" -p%02x", c);
961 if (sv_id && sv_id != 0xffff)
963 print_shell_escaped(pci_lookup_name(pacc, svbuf, sizeof(svbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_VENDOR, sv_id));
964 print_shell_escaped(pci_lookup_name(pacc, sdbuf, sizeof(sdbuf), PCI_LOOKUP_SUBSYSTEM | PCI_LOOKUP_DEVICE, p->vendor_id, p->device_id, sv_id, sd_id));
967 printf(" \"\" \"\"");
972 /*** Main show function ***/
975 show_device(struct device *d)
985 if (opt_kernel || verbose)
990 if (verbose || opt_hex)
999 for (d=first_dev; d; d=d->next)
1000 if (pci_filter_match(&filter, d->dev))
1007 main(int argc, char **argv)
1012 if (argc == 2 && !strcmp(argv[1], "--version"))
1014 puts("lspci version " PCIUTILS_VERSION);
1020 pci_filter_init(pacc, &filter);
1022 while ((i = getopt(argc, argv, options)) != -1)
1026 pacc->numeric_ids++;
1032 pacc->buscentric = 1;
1035 if (msg = pci_filter_parse_slot(&filter, optarg))
1040 if (msg = pci_filter_parse_id(&filter, optarg))
1056 pci_set_name_list_path(pacc, optarg, 0);
1062 opt_pcimap = optarg;
1085 die("DNS queries are not available in this version");
1088 if (parse_generic_option(i, pacc, optarg))
1091 fprintf(stderr, help_msg, pacc->id_file_name);
1099 pacc->id_lookup_mode |= PCI_LOOKUP_NETWORK;
1100 if (opt_query_dns > 1)
1101 pacc->id_lookup_mode |= PCI_LOOKUP_REFRESH_CACHE;
1104 pacc->id_lookup_mode |= PCI_LOOKUP_NETWORK | PCI_LOOKUP_SKIP_LOCAL;
1110 die("Bus mapping mode does not recognize bus topology");
1120 show_forest(opt_filter ? &filter : NULL);
1124 show_kernel_cleanup();
1127 return (seen_errors ? 2 : 0);